Re: [PATCH v2 32/40] bsd-user/signal.c: handle_pending_signal

On 1/25/22 12:29, Warner Losh wrote: Handle a queued signal. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/qemu.h | 7 bsd-user/signal.c | 87 +++ 2 files changed, 94 insertions(+)

Re: [PATCH v2 30/40] bsd-user/signal.c: sigset manipulation routines.

On 1/25/22 12:29, Warner Losh wrote: target_sigemptyset: resets a set to having no bits set target_sigaddset: adds a signal to a set target_sigismember: returns true when signal is a member host_to_target_sigset_internal: convert host sigset to target host_to_target_sigset: convert host sigset

Re: [PATCH v2 29/40] bsd-user/signal.c: Fill in queue_signal

On 1/25/22 12:29, Warner Losh wrote: Fill in queue signal implementation, as well as routines allocate and delete elements of the signal queue. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/qemu.h | 1 + bsd-user/signal.c | 13 -

Re: [PATCH v2 31/40] bsd-user/signal.c: setup_frame

On 1/25/22 12:29, Warner Losh wrote: setup_frame sets up a signalled stack frame. Associated routines to extract the pointer to the stack frame and to support alternate stacks. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/main.c | 5 +++

Re: [PATCH v2 19/40] bsd-user/host/arm/host-signal.h: Implement host_signal_*

On 1/25/22 12:29, Warner Losh wrote: Implement host_signal_pc, host_signal_set_pc and host_signal_write for arm. Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/host/arm/host-signal.h | 35 + 1 file changed, 35 insertions(+) create mode

Re: [PATCH v6 3/7] qapi/commands: Optionally generate trace for QMP commands

Vladimir Sementsov-Ogievskiy writes: > Add trace generation disabled by default and new option --gen-trace to > enable it. The next commit will enable it for qapi/, but not for qga/ > and tests/. Making it work for the latter two would involve some Meson > hackery to ensure we generate the

Re: [PATCH v2 26/40] bsd-user/signal.c: Implement host_signal_handler

On 1/25/22 12:29, Warner Losh wrote: Implement host_signal_handler to handle signals generated by the host and to do safe system calls. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh --- bsd-user/signal.c | 105 ++ 1

Re: [PATCH v6 0/7] trace qmp commands

Vladimir Sementsov-Ogievskiy writes: > This series aims to add trace points for each qmp command with help of > qapi code generator. Logging QMP traffic has worked well enough for me, but I can understand why you'd like to use tracing. Other uses of tracing might come up in the future. I

[PATCH 3/4] target/arm: Fix {fp, sve}_exception_el for VHE mode running

When HCR_EL2.E2H is set, the format of CPTR_EL2 changes to look more like CPACR_EL1, with ZEN and FPEN fields instead of TZ and TFP fields. Reported-by: Zenghui Yu Signed-off-by: Richard Henderson --- target/arm/helper.c | 77 +++-- 1 file changed, 60

[PATCH 4/4] target/arm: Use CPTR_TFP with CPTR_EL3 in fp_exception_el

Use the named bit rather than a bare extract32. Signed-off-by: Richard Henderson --- target/arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index ca916139e8..5610879680 100644 --- a/target/arm/helper.c +++

Re: [PATCH v6 6/7] meson: document, why we don't generate trace events for tests/ and qga/

Nitpick: drop the comma in the title.

[PATCH 2/4] target/arm: Tidy sve_exception_el for CPACR_EL1 access

Extract entire fields for ZEN and FPEN, rather than testing specific bits. This makes it easier to follow the code versus the ARM spec. Signed-off-by: Richard Henderson --- target/arm/helper.c | 36 +--- 1 file changed, 17 insertions(+), 19 deletions(-) diff

Re: [PATCH v2 18/40] bsd-user/signal.c: Add si_type argument to queue_signal

On 1/25/22 12:29, Warner Losh wrote: Mirror the linux-user practice and add a si_type argument to queue signal. This will be transported as the upper 8 bits in the si_type element of siginfo so that we know what bits of the structure are valid and so we can properly implement

[PATCH 0/4] target/arm: SVE fixes versus VHE

Fix two problems described in https://lore.kernel.org/qemu-devel/6cdfd5de-2465-adca-73b3-9c66945cf...@huawei.com/ with some other minor code cleanup. r~ Richard Henderson (4): target/arm: Fix sve_zcr_len_for_el for VHE mode running target/arm: Tidy sve_exception_el for CPACR_EL1 access

[PATCH 1/4] target/arm: Fix sve_zcr_len_for_el for VHE mode running

When HCR_EL2.{E2H,TGE} == '11', ZCR_EL1 is unused. Reported-by: Zenghui Yu Signed-off-by: Richard Henderson --- target/arm/helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index cfca0f5ba6..d9ee2ba5f4 100644 ---

Re: [PATCH v2 16/40] bsd-user/signal.c: implement abstract target / host signal translation

On 1/25/22 12:29, Warner Losh wrote: Implement host_to_target_signal and target_to_host_signal. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Peter Maydell --- bsd-user/signal-common.h | 2 ++ bsd-user/signal.c| 16 2

Re: [PATCH v2 14/40] bsd-user/arm/target_arch_cpu.h: Use force_sig_fault for EXCP_UDEF

On 1/25/22 12:29, Warner Losh wrote: +case EXCP_NOCP: +case EXCP_INVSTATE: +/* + * See arm/arm/undefined.c undefinedinstruction(); + * + * A number of details aren't emulated (they likely don't matter): + * o Misaligned

Re: [PATCH v2 09/40] bsd-user/signal-common.h: Move signal functions prototypes to here

On 1/25/22 12:29, Warner Losh wrote: Signed-off-by: Warner Losh --- bsd-user/qemu.h | 8 bsd-user/signal-common.h | 6 ++ 2 files changed, 6 insertions(+), 8 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 06/40] bsd-user: Bring in docs from linux-user for signal_pending

On 1/25/22 12:29, Warner Losh wrote: This is currently unused, so no code adjustments are needed. Signed-off-by: Warner Losh --- bsd-user/qemu.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v2 05/40] bsd-user: Remove vestiges of signal queueing code

On 1/25/22 12:29, Warner Losh wrote: bsd-user was copied from linux-user at a time when it queued signals. Remove those vestiges of thse code. Retain the init function, even though it's now empty since other stuff will likely be added there. Make it static since it's not called from outside of

Re: [PATCH v2 04/40] bsd-user/arm/signal.c: get_mcontext should zero vfp data

On 1/25/22 12:29, Warner Losh wrote: FreeBSD's get_mcontext doesn't return any vfp data. Instead, it zeros out the vfp feilds (and all the spare fields). Impelement this behavior. We're still missing the sysarch(ARM_GET_VFPCONTEXT) syscall, though. Signed-off-by: Warner Losh ---

Re: [PATCH v2 03/40] bsd-user/arm/signal.c: Implement setup_sigframe_arch for arm

On 1/25/22 12:29, Warner Losh wrote: Fix the broken context setting for arm. FreeBSD's get_mcontext does not fill in the vfp info. It's filled in in sigframe(). This corresponds to the new setup_sigframe_arch which fills in mcontext, then adjusts it to point to the vfp context in the sigframe

Re: [PATCH v2 02/40] bsd-user: Create setup_sigframe_arch to setup sigframe context

On 1/25/22 12:29, Warner Losh wrote: Define setup_sigframe_arch whose job it is to setup the mcontext for the sigframe. Implement for x86 to just call mcontext. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_signal.h | 3 +++ bsd-user/i386/signal.c | 13 +

Re: [PATCH v2 01/40] bsd-user: Complete FreeBSD siginfo

On 1/25/22 12:29, Warner Losh wrote: Fill in the missing FreeBSD siginfo fields, and add some comments. Signed-off-by: Warner Losh --- bsd-user/freebsd/target_os_siginfo.h | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

[PATCH V2 3/3] migration/migration.c: Remove the MIGRATION_STATUS_ACTIVE when migration finished

The MIGRATION_STATUS_ACTIVE indicates that migration is running. Remove it to be handled by the default operation, It should be part of the unknown ending states. Signed-off-by: Zhang Chen Reviewed-by: Juan Quintela --- migration/migration.c | 6 -- 1 file changed, 6 deletions(-) diff

[PATCH V2 1/3] migration/migration.c: Add missed default error handler for migration state

In the migration_completion() no other status is expected, for example MIGRATION_STATUS_CANCELLING, MIGRATION_STATUS_CANCELLED, etc. Signed-off-by: Zhang Chen Reviewed-by: Juan Quintela Reviewed-by: Dr. David Alan Gilbert --- migration/migration.c | 2 +- 1 file changed, 1 insertion(+), 1

RE: [PATCH 2/3] migration/migration.c: Avoid COLO boot in postcopy migration

> -Original Message- > From: Juan Quintela > Sent: Thursday, January 27, 2022 3:30 AM > To: Zhang, Chen > Cc: Dr. David Alan Gilbert ; qemu-dev de...@nongnu.org> > Subject: Re: [PATCH 2/3] migration/migration.c: Avoid COLO boot in postcopy > migration > > Zhang Chen wrote: > > COLO

[PATCH V2 2/3] migration/migration.c: Avoid COLO boot in postcopy migration

COLO does not support postcopy migration and remove the Fixme. Signed-off-by: Zhang Chen Reviewed-by: Juan Quintela --- migration/migration.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/migration/migration.c b/migration/migration.c index

[PATCH V2 0/3] Some minor fixes for migration states

This series solved some fixme and comments in code. Please see the details in each patch commit message. --V2: -Fix typo. Zhang Chen (3): migration/migration.c: Add missed default error handler for migration state migration/migration.c: Avoid COLO boot in postcopy migration

Re: [PATCH] hw/sensor: Add SB-TSI Temperature Sensor Interface

Hi, Sorry for the late reply. I'm not sure what "auto-increment" means here. The kernel driver at https://lkml.org/lkml/2020/12/11/968 only has byte-size read/write operations, so I don't see a problem here. The values are extracted from the datasheet. On Tue, Jan 18, 2022 at 9:10 AM Patrick

Re: [PATCH v3 0/2] tpm: CRB: Use ram_device for "tpm-crb-cmd" region

On Thu, 20 Jan 2022 01:12:40 +0100 Philippe Mathieu-Daudé wrote: > This is a respin of Eric's work, but not making tpm_crb.c target > specific. > > Based-on: <2022012836.229419-1-f4...@amsat.org> > "exec/cpu: Make host pages variables / macros 'target agnostic'" >

Re: [PATCH 0/2] Adds designware i2c module and adds it to virt arm

+Enrico Weigelt On 26/1/22 19:03, Peter Maydell wrote: On Wed, 26 Jan 2022 at 17:12, Chris Rauer wrote: I need to see a pretty strong justification for why we should be adding new kinds of devices to the virt machine, The designware i2c controller is a very common controller on many ARM

Re: [Virtio-fs] [PATCH v4 1/2] virtiofsd: Track mounts

On Wed, Jan 26, 2022 at 05:47:09PM -0500, Vivek Goyal wrote: > On Tue, Jan 25, 2022 at 03:12:11PM +0100, Greg Kurz wrote: > > The upcoming implementation of ->sync_fs() needs to know about all > > submounts in order to call syncfs() on them when virtiofsd is started > > without '-o

Re: [PATCH v4 1/2] virtiofsd: Track mounts

On Tue, Jan 25, 2022 at 03:12:11PM +0100, Greg Kurz wrote: > The upcoming implementation of ->sync_fs() needs to know about all > submounts in order to call syncfs() on them when virtiofsd is started > without '-o announce_submounts'. > > Track every inode that comes up with a new mount id in a

Re: [PATCH v2 07/14] target/ppc: 405: External exception cleanup

Richard Henderson writes: > On 1/19/22 5:44 AM, Fabiano Rosas wrote: >> 405 has no MSR_HV and EPR is BookE only so we can remove it all. >> >> Signed-off-by: Fabiano Rosas >> Reviewed-by: David Gibson >> --- >> target/ppc/excp_helper.c | 37 - >> 1 file

Re: [PATCH v2 08/14] target/ppc: 405: System call exception cleanup

On 1/19/22 5:44 AM, Fabiano Rosas wrote: There's no sc 1. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 21 ++--- 1 file changed, 2 insertions(+), 19 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH 0/2] Adds designware i2c module and adds it to virt arm

>>> I need to see a pretty strong justification for why we should be >>> adding new kinds of devices to the virt machine, >> >> The designware i2c controller is a very common controller on many >> ARM SoCs. It has device tree bindings and ACPI bindings which >> makes it ideal for this

Re: [PATCH v2 05/14] target/ppc: 405: Critical exceptions cleanup

On 1/19/22 5:44 AM, Fabiano Rosas wrote: In powerpc_excp_40x the Critical exception is now for 405 only, so we can remove the BookE and G2 blocks. Signed-off-by: Fabiano Rosas Reviewed-by: David Gibson --- target/ppc/excp_helper.c | 17 ++--- 1 file changed, 2 insertions(+), 15

Re: [PATCH v2 07/14] target/ppc: 405: External exception cleanup

On 1/19/22 5:44 AM, Fabiano Rosas wrote: 405 has no MSR_HV and EPR is BookE only so we can remove it all. Signed-off-by: Fabiano Rosas Reviewed-by: David Gibson --- target/ppc/excp_helper.c | 37 - 1 file changed, 37 deletions(-) diff --git

Re: [PATCH v2 03/14] target/ppc: Introduce powerpc_excp_40x

On 1/19/22 5:44 AM, Fabiano Rosas wrote: Introduce a new powerpc_excp function specific for 40x CPUs. This commit copies powerpc_excp_legacy verbatim so the next one has a clean diff. Signed-off-by: Fabiano Rosas --- target/ppc/excp_helper.c | 474 +++ 1

Re: [PATCH 0/8] target/ppc: powerpc_excp improvements [74xx] (5/n)

BALATON Zoltan writes: > On Wed, 26 Jan 2022, Fabiano Rosas wrote: >> This handles the exception code for the 74xx family, i.e. 7400, 7410, >> 7440, 7445, 7450, 7455, 7457. >> >> This is another family that is quite well known, so it should be >> straight-forward as well. > > I guess this is

RE: [RFC v4 12/21] vfio-user: region read/write

> -Original Message- > From: Qemu-devel bounces+thanos.makatos=nutanix@nongnu.org> On Behalf Of John > Johnson > Sent: 12 January 2022 00:44 > To: qemu-devel@nongnu.org > Subject: [RFC v4 12/21] vfio-user: region read/write > > Add support for posted writes on remote devices > >

Re: [RFC PATCH] linux-user: expand reserved brk space for 64bit guests

On 1/14/22 3:55 AM, Alex Bennée wrote: A recent change to fix commpage allocation issues on 32bit hosts revealed another intermittent issue on s390x. The root cause was the headroom we give for the brk space wasn't enough causing the guest to attempt to map something on top of QEMUs own pages.

Re: [PATCH 2/2] qemu-timer: Skip empty timer lists before locking in qemu_clock_deadline_ns_all

On 1/14/22 11:43 AM, Idan Horowitz wrote: This decreases qemu_clock_deadline_ns_all's share from 23.2% to 13% in a profile of icount-enabled aarch64-softmmu. Signed-off-by: Idan Horowitz --- util/qemu-timer.c | 3 +++ 1 file changed, 3 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH 1/2] softmmu/cpus: Check if the cpu work list is empty atomically

On 1/14/22 11:43 AM, Idan Horowitz wrote: Instead of taking the lock of the cpu work list in order to check if it's empty, we can just read the head pointer atomically. This decreases cpu_work_list_empty's share from 5% to 1.3% in a profile of icount-enabled aarch64-softmmu. Signed-off-by: Idan

Re: [PATCH v1 21/22] target/i386: use CPU_LOG_INT for IRQ servicing

On 1/25/22 7:16 AM, Alex Bennée wrote: I think these have been wrong since f193c7979c (do not depend on thunk.h - more log items). Fix them so as not to confuse other debugging. Signed-off-by: Alex Bennée --- target/i386/tcg/sysemu/seg_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH v3 0/2] linux-user: check read permissions before how

In sigprocmask check the read permissions first before checking the `how`. This is done for both: TARGET_NR_sigprocmask and TARGET_NR_rt_sigprocmask v3: * Added missing signature from venture v2: * Update code style during code change * Also update check order for TARGET_NR_sigprocmask

[PATCH v3 1/2] linux-user: rt_sigprocmask, check read perms first

From: Shu-Chun Weng Linux kernel does it this way (checks read permission before validating `how`) and the latest version of ABSL's `AddressIsReadable()` depends on this behavior. c.f. https://github.com/torvalds/linux/blob/9539ba4308ad5bdca6cb41c7b73cbb9f796dcdd7/kernel/signal.c#L3147

[PATCH v3 2/2] linux-user: sigprocmask check read perms first

Linux kernel now checks the read permissions before validating `how` Suggested-by: Laurent Vivier Signed-off-by: Patrick Venture Reviewed-by: Laurent Vivier --- linux-user/syscall.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/linux-user/syscall.c

Re: [PATCH] migration: Don't return for postcopy_send_discard_bm_ram()

Philippe Mathieu-Daudé wrote: > postcopy_send_discard_bm_ram() always return zero. Since it can't > fail, simplify and do not return anything. > > Signed-off-by: Philippe Mathieu-Daudé > --- > Based-on: <20211224065000.97572-1-pet...@redhat.com> And here, I learn to read Based-on: Reviewed-by:

Re: [PATCH 5/7] migration: Drop return code for disgard ram process

Peter Xu wrote: > It will just never fail. Drop those return values where they're constantly > zeros. > > A tiny touch-up on the tracepoint so trace_ram_postcopy_send_discard_bitmap() > is called after the logic itself (which sounds more reasonable). > > Signed-off-by: Peter Xu Reviewed-by:

Re: [PATCH 4/7] migration: Do chunk page in postcopy_each_ram_send_discard()

Peter Xu wrote: > Right now we loop ramblocks for twice, the 1st time chunk the dirty bits with > huge page information; the 2nd time we send the discard ranges. That's not > necessary - we can do them in a single loop. > > Signed-off-by: Peter Xu Reviewed-by: Juan Quintela queued

Re: [PATCH 3/7] migration: Drop postcopy_chunk_hostpages()

Peter Xu wrote: > This function calls three functions: > > - postcopy_discard_send_init(ms, block->idstr); > - postcopy_chunk_hostpages_pass(ms, block); > - postcopy_discard_send_finish(ms); > > However only the 2nd function call is meaningful. It's major role is to make > sure dirty bits

Re: [PATCH v5 03/18] pci: isolated address space for PCI bus

On Wed, Jan 26, 2022 at 08:07:36PM +, Dr. David Alan Gilbert wrote: > * Stefan Hajnoczi (stefa...@redhat.com) wrote: > > On Wed, Jan 26, 2022 at 05:27:32AM +, Jag Raman wrote: > > > > > > > > > > On Jan 25, 2022, at 1:38 PM, Dr. David Alan Gilbert > > > > wrote: > > > > > > > > * Jag

Re: [PATCH v2 1/2] linux-user: rt_sigprocmask, check read perms first

On Wed, Jan 26, 2022 at 11:26 AM Laurent Vivier wrote: > Le 26/01/2022 à 18:58, Patrick Venture a écrit : > > From: Shu-Chun Weng > > > > Linux kernel does it this way (checks read permission before validating > `how`) > > and the latest version of ABSL's `AddressIsReadable()` depends on this >

Re: [PATCH 2/7] migration: Don't return for postcopy_chunk_hostpages()

Peter Xu wrote: > It always return zero, because it just can't go wrong so far. Simplify the > code with no functional change. > > Signed-off-by: Peter Xu Reviewed-by: Juan Quintela queued

[PATCH] linux-user: Fix inotify on aarch64

The inotify implementation originally called the raw host syscalls. Commit 3b3f24add0 changed this to use the glibc wrappers. However ifdefs in syscall.c still test for presence of the raw syscalls. This causes a problem on e.g. aarch64 hosts which never had the inotify_init syscall - it had been

Re: [PATCH 1/7] migration: Drop dead code of ram_debug_dump_bitmap()

Peter Xu wrote: > I planned to add "#ifdef DEBUG_POSTCOPY" around the function too because > otherwise it'll be compiled into qemu binary even if it'll never be used. > Then > I found that maybe it's easier to just drop it for good.. > > Signed-off-by: Peter Xu Reviewed-by: Juan Quintela

Re: [PATCH] migration/ram: clean up unused comment.

Xu Zheng wrote: > Just a removal of an unused comment. > a0a8aa147aa did many fixes and removed the parameter named "ms", but > forget to remove the corresponding comment in function named > "ram_save_host_page". > > Signed-off-by: Xu Zheng > Signed-off-by: Mao Zhongyi Reviewed-by: Juan

Re: [PATCH v2 3/3] migration: Perform vmsd structure check during tests

"Dr. David Alan Gilbert (git)" wrote: > From: "Dr. David Alan Gilbert" > > Perform a check on vmsd structures during test runs in the hope > of catching any missing terminators and other simple screwups. > > Signed-off-by: Dr. David Alan Gilbert Reviewed-by: Juan Quintela queued.

Re: [PATCH v2 1/3] ppc: Fix vmstate_pbr403 subsection name

"Dr. David Alan Gilbert (git)" wrote: > From: "Dr. David Alan Gilbert" > > The pbr403 subsection is part of the tlb6xx state, so I believe it's > name needs to be: > > .name = "cpu/tlb6xx/pbr403", > > Signed-off-by: Dr. David Alan Gilbert Dropped as code don't exist anymore. > --- >

Re: [PATCH] migration/colo.c: Add missed return in error handling

Rao Lei wrote: > When doing failover and checkpoint, some returns are missed in error > handling. Let's add it. > > Signed-off-by: Lei Rao > --- > migration/colo.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/migration/colo.c b/migration/colo.c > index

Re: [PATCH] migration: Report the error returned when save_live_iterate fails

David Edmondson wrote: > Should qemu_savevm_state_iterate() encounter a failure when calling a > particular save_live_iterate function, report the error code returned > by the function. > > Signed-off-by: David Edmondson Reviewed-by: Juan Quintela queued

[PATCH v2 2/2] ppc/pnv: use a do-while() loop in pnv_phb4_translate_tve()

pnv_phb4_translate_tve() is quite similar to pnv_phb3_translate_tve(), and that includes the fact that 'taddr' can be considered uninitialized when throwing the "TCE access fault" error because, in theory, the loop that sets 'taddr' can be skippable due to 'lev' being an signed int. No one

[PATCH v2 1/2] ppc/pnv: use a do-while() loop in pnv_phb3_translate_tve()

The 'taddr' variable is left unintialized, being set only inside the "while ((lev--) >= 0)" loop where we get the TCE address. The 'lev' var is an int32_t that is being initiliazed by the GETFIELD() macro, which returns an uint64_t. For a human reader this means that 'lev' will always be positive

[PATCH v2 0/2] use a do-while() loop in pnv_phbX_translate_tve()

Hi, This second version implemented Matheus' suggestion of using a do-while() loop instead of initializing variables. v1 link: https://lists.gnu.org/archive/html/qemu-devel/2022-01/msg05475.html Daniel Henrique Barboza (2): ppc/pnv: use a do-while() loop in pnv_phb3_translate_tve() ppc/pnv:

Re: [PATCH 1/2] ppc/pnv: initialize 'taddr' in pnv_phb3_translate_tve()

On 1/26/22 14:28, Matheus K. Ferst wrote: On 26/01/2022 10:41, Daniel Henrique Barboza wrote: The 'taddr' variable is left unintialized, being set only inside the "while ((lev--) >= 0)" loop where we get the TCE address. The 'lev' var is an int32_t that is being initiliazed by the GETFIELD()

Re: [PATCH v5 03/18] pci: isolated address space for PCI bus

* Stefan Hajnoczi (stefa...@redhat.com) wrote: > On Wed, Jan 26, 2022 at 05:27:32AM +, Jag Raman wrote: > > > > > > > On Jan 25, 2022, at 1:38 PM, Dr. David Alan Gilbert > > > wrote: > > > > > > * Jag Raman (jag.ra...@oracle.com) wrote: > > >> > > >> > > >>> On Jan 19, 2022, at 7:12 PM,

Re: [PATCH 0/8] target/ppc: powerpc_excp improvements [74xx] (5/n)

On Wed, 26 Jan 2022, Cédric Le Goater wrote: On 1/26/22 18:55, BALATON Zoltan wrote: On Wed, 26 Jan 2022, Fabiano Rosas wrote: This handles the exception code for the 74xx family, i.e. 7400, 7410, 7440, 7445, 7450, 7455, 7457. This is another family that is quite well known, so it should be

Re: [PATCH 3/3] migration/migration.c: Remove the MIGRATION_STATUS_ACTIVE when migration finished

Zhang Chen wrote: > The MIGRATION_STATUS_ACTIVE indicates that migration is running. > Remove it to be handled by the default operation, > It should be part of the unknown ending states. > > Signed-off-by: Zhang Chen Reviewed-by: Juan Quintela queued

Re: [PATCH v2 2/2] linux-user: sigprocmask check read perms first

Le 26/01/2022 à 18:58, Patrick Venture a écrit : Linux kernel now checks the read permissions before validating `how` Suggested-by: Laurent Vivier Signed-off-by: Patrick Venture Reviewed-by: Laurent Vivier --- linux-user/syscall.c | 12 +++- 1 file changed, 7 insertions(+), 5

Re: [PATCH 2/3] migration/migration.c: Avoid COLO boot in postcopy migration

Zhang Chen wrote: > COLO dose not support postcopy migration and remove the Fixme. > > Signed-off-by: Zhang Chen Reviewed-by: Juan Quintela fixed the typo.

Re: [PATCH v2 1/2] linux-user: rt_sigprocmask, check read perms first

Le 26/01/2022 à 18:58, Patrick Venture a écrit : From: Shu-Chun Weng Linux kernel does it this way (checks read permission before validating `how`) and the latest version of ABSL's `AddressIsReadable()` depends on this behavior. c.f.

Re: [PATCH 1/3] migration/migration.c: Add missed default error handler for migration state

Zhang Chen wrote: > In the migration_completion() no other status is expected, for > example MIGRATION_STATUS_CANCELLING, MIGRATION_STATUS_CANCELLED, etc. > > Signed-off-by: Zhang Chen Reviewed-by: Juan Quintela queued

Re: [PATCH v7 05/10] hw/dma/xlnx_csu_dma: Support starting a read transfer through a class method

On 16:11 Fri 21 Jan , Francisco Iglesias wrote: > An option on real hardware when embedding a DMA engine into a peripheral > is to make the peripheral control the engine through a custom DMA control > (hardware) interface between the two. Software drivers in this scenario > configure and

Notes on Generating Python signatures for QMP RPCs

Hiya, I was experimenting with $subject and ran into a few points of interest. This is basically an informal status report from me. I've CC'd some of the usual suspects for people who care about SDKs and API design and such. This is just a list of some observations I had, so not everything below

Re: [PATCH v7 06/10] hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller

Hi Francisco, On 16:11 Fri 21 Jan , Francisco Iglesias wrote: > Add a model of Xilinx Versal's OSPI flash memory controller. > > Signed-off-by: Francisco Iglesias > --- > include/hw/ssi/xlnx-versal-ospi.h | 111 +++ > hw/ssi/xlnx-versal-ospi.c | 1853 >

Re: [PATCH v4 06/42] hw/cxl/device: Implement basic mailbox (8.2.8.4)

Jonathan Cameron writes: > From: Ben Widawsky > > This is the beginning of implementing mailbox support for CXL 2.0 > devices. The implementation recognizes when the doorbell is rung, > handles the command/payload, clears the doorbell while returning error > codes and data. > > Generally the

Re: [PATCH v4 01/15] pcie: Add support for Single Root I/O Virtualization (SR/IOV)

On Wed, 2022-01-26 at 18:11 +0100, Lukasz Maniak wrote: > From: Knut Omang > > This patch provides the building blocks for creating an SR/IOV > PCIe Extended Capability header and register/unregister > SR/IOV Virtual Functions. > > Signed-off-by: Knut Omang > --- >  hw/pci/meson.build 

Re: [PATCH 0/8] target/ppc: powerpc_excp improvements [74xx] (5/n)

On 1/26/22 18:55, BALATON Zoltan wrote: On Wed, 26 Jan 2022, Fabiano Rosas wrote: This handles the exception code for the 74xx family, i.e. 7400, 7410, 7440, 7445, 7450, 7455, 7457. This is another family that is quite well known, so it should be straight-forward as well. I guess this is

Re: [PATCH v4 04/42] hw/cxl/device: Introduce a CXL device (8.2.8)

Jonathan Cameron writes: > From: Ben Widawsky > > A CXL device is a type of CXL component. Conceptually, a CXL device > would be a leaf node in a CXL topology. From an emulation perspective, > CXL devices are the most complex and so the actual implementation is > reserved for discrete

Re: [PATCH 0/2] Adds designware i2c module and adds it to virt arm

On Wed, 26 Jan 2022 at 17:12, Chris Rauer wrote: > >> I need to see a pretty strong justification for why we should be >> adding new kinds of devices to the virt machine, > > The designware i2c controller is a very common controller on many > ARM SoCs. It has device tree bindings and ACPI

Re: [PATCH v4 05/42] hw/cxl/device: Implement the CAP array (8.2.8.1-2)

Jonathan Cameron writes: > From: Ben Widawsky > > This implements all device MMIO up to the first capability. That > includes the CXL Device Capabilities Array Register, as well as all of > the CXL Device Capability Header Registers. The latter are filled in as > they are implemented in the

Re: [PATCH v5 03/18] pci: isolated address space for PCI bus

* Jag Raman (jag.ra...@oracle.com) wrote: > > > > On Jan 25, 2022, at 1:38 PM, Dr. David Alan Gilbert > > wrote: > > > > * Jag Raman (jag.ra...@oracle.com) wrote: > >> > >> > >>> On Jan 19, 2022, at 7:12 PM, Michael S. Tsirkin wrote: > >>> > >>> On Wed, Jan 19, 2022 at 04:41:52PM -0500,

[PATCH v2 2/2] linux-user: sigprocmask check read perms first

Linux kernel now checks the read permissions before validating `how` Suggested-by: Laurent Vivier Signed-off-by: Patrick Venture --- linux-user/syscall.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index

Re: [PATCH 0/8] target/ppc: powerpc_excp improvements [74xx] (5/n)

On Wed, 26 Jan 2022, Fabiano Rosas wrote: This handles the exception code for the 74xx family, i.e. 7400, 7410, 7440, 7445, 7450, 7455, 7457. This is another family that is quite well known, so it should be straight-forward as well. I guess this is what may break VOF on pegasos2. Was

[PATCH v2 1/2] linux-user: rt_sigprocmask, check read perms first

From: Shu-Chun Weng Linux kernel does it this way (checks read permission before validating `how`) and the latest version of ABSL's `AddressIsReadable()` depends on this behavior. c.f. https://github.com/torvalds/linux/blob/9539ba4308ad5bdca6cb41c7b73cbb9f796dcdd7/kernel/signal.c#L3147

Re: [PATCH v4 03/42] MAINTAINERS: Add entry for Compute Express Link Emulation

Jonathan Cameron writes: > From: Jonathan Cameron > > The CXL emulation will be jointly maintained by Ben Widawsky > and Jonathan Cameron. Broken out as a separate patch > to improve visibility. > > Signed-off-by: Jonathan Cameron Reviewed-by: Alex Bennée -- Alex Bennée

Re: [PATCH 1/2] ppc/pnv: initialize 'taddr' in pnv_phb3_translate_tve()

On 26/01/2022 10:41, Daniel Henrique Barboza wrote: The 'taddr' variable is left unintialized, being set only inside the "while ((lev--) >= 0)" loop where we get the TCE address. The 'lev' var is an int32_t that is being initiliazed by the GETFIELD() macro, which returns an uint64_t. For a

[PATCH v2 0/2] linux-user: check read permissions before how

In sigprocmask check the read permissions first before checking the `how`. This is done for both: TARGET_NR_sigprocmask and TARGET_NR_rt_sigprocmask v2: * Update code style during code change * Also update check order for TARGET_NR_sigprocmask Patrick Venture (1): linux-user: sigprocmask

Re: [PATCH v4 01/15] pcie: Add support for Single Root I/O Virtualization (SR/IOV)

On Wed, Jan 26, 2022 at 06:11:06PM +0100, Lukasz Maniak wrote: > From: Knut Omang > > This patch provides the building blocks for creating an SR/IOV > PCIe Extended Capability header and register/unregister > SR/IOV Virtual Functions. > > Signed-off-by: Knut Omang Hi Knut, We have edited the

[PATCH v4 15/15] hw/nvme: Update the initalization place for the AER queue

From: Łukasz Gieryk This patch updates the initialization place for the AER queue, so it’s initialized once, at controller initialization, and not every time controller is enabled. While the original version works for a non-SR-IOV device, as it’s hard to interact with the controller if it’s not

Re: [PATCH] linux-user: rt_sigprocmask, check read perms first

On Tue, Jan 11, 2022 at 3:06 PM Patrick Venture wrote: > > > On Tue, Jan 11, 2022 at 12:50 PM Laurent Vivier wrote: > >> Hi Patrick, >> >> Le 11/01/2022 à 21:14, Patrick Venture a écrit : >> > >> > >> > On Sat, Jan 8, 2022 at 10:16 AM Laurent Vivier > > wrote: >> > >>

[PATCH v4 12/15] hw/nvme: Initialize capability structures for primary/secondary controllers

From: Łukasz Gieryk With four new properties: - sriov_v{i,q}_flexible, - sriov_max_v{i,q}_per_vf, one can configure the number of available flexible resources, as well as the limits. The primary and secondary controller capability structures are initialized accordingly. Since the number of

[PATCH v4 10/15] hw/nvme: Remove reg_size variable and update BAR0 size calculation

From: Łukasz Gieryk The n->reg_size parameter unnecessarily splits the BAR0 size calculation in two phases; removed to simplify the code. With all the calculations done in one place, it seems the pow2ceil, applied originally to reg_size, is unnecessary. The rounding should happen as the last

[PATCH v4 14/15] docs: Add documentation for SR-IOV and Virtualization Enhancements

Signed-off-by: Lukasz Maniak --- docs/system/devices/nvme.rst | 36 1 file changed, 36 insertions(+) diff --git a/docs/system/devices/nvme.rst b/docs/system/devices/nvme.rst index b5acb2a9c1..166a11abc6 100644 --- a/docs/system/devices/nvme.rst +++

[PATCH v4 11/15] hw/nvme: Calculate BAR attributes in a function

From: Łukasz Gieryk An NVMe device with SR-IOV capability calculates the BAR size differently for PF and VF, so it makes sense to extract the common code to a separate function. Signed-off-by: Łukasz Gieryk --- hw/nvme/ctrl.c | 45 +++-- 1 file changed,

[PATCH v4 09/15] hw/nvme: Make max_ioqpairs and msix_qsize configurable in runtime

From: Łukasz Gieryk The NVMe device defines two properties: max_ioqpairs, msix_qsize. Having them as constants is problematic for SR-IOV support. SR-IOV introduces virtual resources (queues, interrupts) that can be assigned to PF and its dependent VFs. Each device, following a reset, should

[PATCH v4 13/15] hw/nvme: Add support for the Virtualization Management command

From: Łukasz Gieryk With the new command one can: - assign flexible resources (queues, interrupts) to primary and secondary controllers, - toggle the online/offline state of given controller. Signed-off-by: Łukasz Gieryk --- hw/nvme/ctrl.c | 257

[PATCH v4 07/15] hw/nvme: Add support for Secondary Controller List

Introduce handling for Secondary Controller List (Identify command with CNS value of 15h). Secondary controller ids are unique in the subsystem, hence they are reserved by it upon initialization of the primary controller to the number of sriov_max_vfs. ID reservation requires the addition of an

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