Zicsr/Zifencei is not in 'I' since ISA version 20190608,
thus to fully express the capability of the CPU,
they should be exposed in isa_string.
Signed-off-by: Hongren (Zenithal) Zheng
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c
On Fri, Apr 08, 2022 at 08:02:14PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> Checking success by hand every time is tedious. Let's use cmd() method
> instead which does this check for us.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> 31 files changed, 773 insertions(+), 1205
On 5/18/22 14:28, Emanuele Giuseppe Esposito wrote:
For example, all callers of bdrv_open() always take the AioContext lock.
Often it is taken very high in the call stack, but it's always taken.
I think it's actually not a problem of who takes the AioContext lock or
where; the requirements
Victor Toso writes:
> Hi,
>
> On Wed, May 11, 2022 at 04:17:35PM +0200, Markus Armbruster wrote:
>> Daniel P. Berrangé writes:
>> > Caller
>> >
>> > block_resize(device="dev0", size=1*GiB)
>> > block_resize(node_name="devnode0", size=1*GiB)
>> >
>> >
>> > In golang definition
>> >
>> >
Am 17/05/2022 um 12:59 schrieb Stefan Hajnoczi:
> On Wed, May 04, 2022 at 02:39:05PM +0100, Stefan Hajnoczi wrote:
>> On Tue, Apr 26, 2022 at 04:51:06AM -0400, Emanuele Giuseppe Esposito wrote:
>>> This is a new attempt to replace the need to take the AioContext lock to
>>> protect graph
On 18/05/2022 12:36, Ani Sinha wrote:
On Wed, May 18, 2022 at 4:38 PM Mark Cave-Ayland
wrote:
This is in preparation for separating out the VIOT ACPI table build from the
PCI host bridge numeration.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 4 ++--
1 file changed, 2
Hi,
On 5/18/22 11:55, jokenzhang via wrote:
> Hi Eric,
>
> Have you ever tested the value reported by the PL031 RTC_CHANGE when
> the qemu clock is using the virtual clock, which is not identical to
> mc146818.
>
> For instance, adding 20s to the guest RTC value, the expected value should be
>
Avihai Horon wrote:
> On 5/16/2022 2:31 PM, Juan Quintela wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> Avihai Horon wrote:
>>> Add new function qemu_file_get_to_fd() that allows reading data from
>>> QEMUFile and writing it straight into a given fd.
>>>
>>> This
On Wed, May 18, 2022 at 4:38 PM Mark Cave-Ayland
wrote:
>
> Instead of generating each table entry inline, move the individual PCI host
> bridge
> table entry generation to a separate build_pci_host_range() function.
>
> Signed-off-by: Mark Cave-Ayland
Reviewed-by: Ani Sinha
> ---
>
Jason Gunthorpe wrote:
> On Tue, May 17, 2022 at 10:00:45AM -0600, Alex Williamson wrote:
>
>> > This is really intended to be a NOP from where things are now, as if
>> > you use mlx5 live migration without a patch like this then it causes a
>> > botched pre-copy since everything just ends up
On Wed, May 18, 2022 at 4:38 PM Mark Cave-Ayland
wrote:
>
> This is in preparation for separating out the VIOT ACPI table build from the
> PCI host bridge numeration.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> hw/acpi/viot.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff
Avihai Horon wrote:
> On 5/16/2022 2:15 PM, Juan Quintela wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> Avihai Horon wrote:
>>> As part of its error flow, vfio_vmstate_change() accesses
>>> MigrationState->to_dst_file without any checks. This can cause a NULL
>>>
KVM Forum 2022
September 12-14, 2022
Dublin, Ireland & Virtual
All submissions must be received before
*** Friday June 3rd, 2022 at 23:59 PDT ***
KVM Forum is an
Differences between disassembled ASL files for VIOT:
+++ /tmp/asl-V69GM1.dsl 2022-05-18 10:22:27.239796759 +0100
@@ -36,11 +36,11 @@
[041h 0065 1] Reserved : 00
[042h 0066 2] Length : 0018
-[044h 0068 4] Endpoint start : 3000
Perform the generation of the VIOT ACPI table in 2 separate passes: the first
pass
enumerates all of the PCI host bridges and adds the min_bus and max_bus
information
to an array.
Once this is done the VIOT table header is generated using the size of the array
to calculate the node count, which
I was working away at some improvements for PS2 devices when I noticed that one
small change to the instantiation of a PS2 mouse device caused a regression in
tests/qtest/bios-tables-test, specifically the /x86_64/acpi/q35/viot subtest.
Closer examination of the failed test output showed the
Instead of generating each table entry inline, move the individual PCI host
bridge
table entry generation to a separate build_pci_host_range() function.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 48 +++-
1 file changed, 27 insertions(+),
This ensures that the VIOT ACPI table output is always stable for a given PCI
topology by ensuring that entries are ordered according to min_bus.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/hw/acpi/viot.c
This is in preparation for separating out the VIOT ACPI table build from the
PCI host bridge numeration.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
index c1af75206e..2897aa8c88 100644
Signed-off-by: Mark Cave-Ayland
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..8367ffe1d4 100644
---
On Mon, May 16, 2022 at 8:57 PM Igor Mammedov wrote:
>
> expected move of tmp-tis device description directly under
> Device(ISA) node.
>
> for tpm-tis 2.0:
>
> @@ -145,6 +145,189 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC",
> 0x0001)
>{
>Name (_ADR,
On Wed, 18 May 2022 at 09:25, Daniel P. Berrangé wrote:
> The fact that RISC-V ecosystem is so young & has relatively few
> users, and even fewer expecting long term stability, is precisely
> why we should just modify the existing 'virt' machine now rather
> than introducing a new 'virt-pcie'.
On Mon, May 16, 2022 at 8:57 PM Igor Mammedov wrote:
>
> .. and clean up not longer needed conditionals in DSTD build code
> tpm-tis AML will be fetched and included when ISA bridge will
> build its own AML code (including attached devices).
>
> Expected AML change:
> the device under
On 5/18/22 01:51, John Snow wrote:
pkg install python3 on fbsd 13.0-R gives you /usr/bin/python3 fwiw. do
you know in what circumstances you get only a point release binary?
Aha, tests/vm/freebsd installs python37, not python3. But I guess it's
still a plausible configuration for this
On Wed, 18 May 2022 at 09:26, Dr. David Alan Gilbert
wrote:
> This one is more curious:
> > *** CID 1488869: Insecure data handling (TAINTED_SCALAR)
> > /qemu/io/channel-socket.c: 716 in qio_channel_socket_flush()
> > 710 int ret = 1;
> > 711
> > 712 msg.msg_control = control;
>
On 5/17/22 21:47, BALATON Zoltan wrote:
On Mon, 9 May 2022, BALATON Zoltan wrote:
On Mon, 2 May 2022, BALATON Zoltan wrote:
On Sat, 23 Apr 2022, BALATON Zoltan wrote:
During trying to implement via-ac97 I did some small clean ups to ac97
which is in this series. The via-ac97 is not working
On Wed, 18 May 2022 at 00:24, ishii.shuuic...@fujitsu.com
wrote:
>
> Hi, Peter.
>
> > Shuuichirou, Itaru: this is another patch where we need to know
> > an A64FX register value...
>
> Sorry for the late reply.
>
> The initial value of the pmcr_el0 register in A64FX is 0x46014040.
>
> After
On Tue, 17 May 2022 20:46:50 +0200
Paolo Bonzini wrote:
> On 5/17/22 14:38, dzej...@gmail.com wrote:
> > From: Jaroslav Jindrak
> >
> > Prior to the introduction of the prealloc-threads property, the amount
> > of threads used to preallocate memory was derived from the value of
> > smp-cpus
On Mon, May 16, 2022 at 8:56 PM Igor Mammedov wrote:
>
> Signed-off-by: Igor Mammedov
Acked-by: Ani Sinha
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
>
On Mon, May 16, 2022 at 8:56 PM Igor Mammedov wrote:
>
> To allow incremental conversion from ISADeviceClass::build_aml
> to AcpiDevAmlIf, add support for the later without removing
> the former. Once conversion is complete, another commit will
> drop ISADeviceClass::build_aml related code.
>
>
On Tue, 17 May 2022 17:33:54 +0100
Daniel P. Berrangé wrote:
> On Tue, May 17, 2022 at 05:12:28PM +0200, Igor Mammedov wrote:
> > On Tue, 17 May 2022 14:38:58 +0200
> > dzej...@gmail.com wrote:
> >
> > > From: Jaroslav Jindrak
> > >
> > > Prior to the introduction of the prealloc-threads
On 5/17/22 23:51, Alexey Kardashevskiy wrote:
On 5/18/22 04:58, Daniel Henrique Barboza wrote:
Alexey,
I had to amend your commit due to Gitlab CI complaining about ...
On 5/4/22 03:55, Alexey Kardashevskiy wrote:
tl;dr: This allows Big Endian zImage booting via -kernel + x-vof=on.
On Mon, May 16, 2022 at 8:56 PM Igor Mammedov wrote:
>
> There is already ISADeviceClass::build_aml() callback which
> builds device specific AML blob for some ISA devices.
> To extend the same idea to other devices, add TYPE_ACPI_DEV_AML_IF
> Interface that will provide a more generic callback
Hi Eric,
Have you ever tested the value reported by the PL031 RTC_CHANGE when
the qemu clock is using the virtual clock, which is not identical to
mc146818.
For instance, adding 20s to the guest RTC value, the expected value should be
20, but the actual value is 1652863291:
{"timestamp":
This allows PPTT ACPI table changes in "tests/data/acpi/virt/PPTT".
Signed-off-by: Gavin Shan
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index
Differences between disassembled ASL files for PPTT:
@@ -13,7 +13,7 @@
[000h 4]Signature : "PPTT"[Processor Properties
Topology Table]
[004h 0004 4] Table Length : 0060
[008h 0008 1] Revision : 02
-[009h 0009 1]
The {socket, cluster, core} IDs detected from Linux guest aren't
matching with what have been provided in PPTT. The flag used for
'ACPI Processor ID valid' is missed for {socket, cluster, core}
nodes. In this case, Linux guest takes the offset between the
node and PPTT header as the corresponding
The {socket, cluster, core} IDs detected from Linux guest aren't
matching with what have been provided in PPTT. The flag used for
'ACPI Processor ID valid' is missed for {socket, cluster, core}
nodes. In this case, Linux guest takes the offset between the
node and PPTT header as the corresponding
The Capstone library that is shipped with NetBSD and OpenBSD works
fine when compiling QEMU, so let's enable this in our build-test
VMs to get a little bit more build-test coverage.
Message-Id: <20220516145823.148450-2-th...@redhat.com>
Reviewed-by: Richard Henderson
Signed-off-by: Thomas Huth
Hi Richard!
The following changes since commit eec398119fc6911d99412c37af06a6bc27871f85:
Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu
into staging (2022-05-16 16:31:01 -0700)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git
From: Daniel P. Berrangé
Although we register a ABRT handler to kill off QEMU when g_assert()
triggers, we want an extra safety net. The QEMU process might be
non-functional and thus not have responded to SIGTERM. The test script
might also have crashed with SEGV, in which case the cleanup
Our support statement for Windows currently talks about "Vista / Server
2008" - which is related to the API of Windows, and this is not easy
to understand for the non-technical users. Additionally, glib sets the
_WIN32_WINNT macro to 0x0601 already, which indicates the Windows 7 API,
so QEMU
Hi!
Here's an interesting bug. Interesting because qemu-user does not run under
qemu-system.
Running 7.0.0 qemu-aarch64-static under 7.0.0 qemu-system-x86_64 -enable-kvm
with
default cpu type, getting:
Thread 1 "qemu-aarch64-static" received signal SIGSEGV, Segmentation fault.
According to our "Supported build platforms" policy, we now do not support
Ubuntu 18.04 anymore. Remove the related container files and entries from
our CI.
Message-Id: <20220516115912.120951-1-th...@redhat.com>
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Thomas Huth
---
Now that we allow compiling with Capstone v3.0.5 again, all our supported
build hosts should provide at least this version of the disassembler
library, so we do not need to ship this as a submodule anymore.
Message-Id: <20220516145823.148450-4-th...@redhat.com>
Reviewed-by: Richard Henderson
According to
https://lore.kernel.org/qemu-devel/20200921174118.39352-1-richard.hender...@linaro.org/
there was an issue with Capstone 3.0.4 from Ubuntu 18, which was the reason
for bumping our minimum Capstone requirement to version 4.0. And indeed,
compiling with that version 3.0.4 from
The 'check-patch' and 'check-dco' jobs only need Python and git for
checking the patches, so it's not really necessary to use a container
here that has all the other build dependencies installed. By using a
lightweight Alpine container, we can improve the runtime here quite a
bit, cutting it down
HI,
On Wed, May 18, 2022 at 09:51:56AM +0100, Daniel P. Berrangé wrote:
> On Wed, May 18, 2022 at 10:10:48AM +0200, Victor Toso wrote:
> > Hi,
> >
> > On Wed, May 11, 2022 at 04:50:35PM +0100, Daniel P. Berrangé wrote:
> > > On Wed, May 11, 2022 at 08:38:04AM -0700, Andrea Bolognani wrote:
> > >
From: Daniel P. Berrangé
qtest_init registers a hook to cleanup the running QEMU process
should g_assert() fire before qtest_quit is called. When the first
hook is registered, it is supposed to triggere registration of the
SIGABRT handler. Unfortunately the logic in hook_list_is_empty is
Hi,
On Wed, May 11, 2022 at 04:17:35PM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
> > Caller
> >
> > block_resize(device="dev0", size=1*GiB)
> > block_resize(node_name="devnode0", size=1*GiB)
> >
> >
> > In golang definition
> >
> >type BlockResizeArguments struct {
On Mon, May 16, 2022 at 8:57 PM Igor Mammedov wrote:
>
> tpm-tis, is not a PCI device but ISA one, move it
> under ISA scope to fix incorrect placement.
This description is a little misleading. What we fix here is for
TPM-tis 2.0 only. TPM 1.2 was already previously under ISA scope.
>
> Fixes:
On Tue, May 17, 2022 at 03:57:24PM -0400, Peter Xu wrote:
> Add migrate_channel_requires_tls() to detect whether the specific channel
> requires TLS, leveraging the recently introduced migrate_use_tls(). No
> functional change intended.
>
> Reviewed-by: Dr. David Alan Gilbert
> Signed-off-by:
On Wed, May 18, 2022 at 10:10:48AM +0200, Victor Toso wrote:
> Hi,
>
> On Wed, May 11, 2022 at 04:50:35PM +0100, Daniel P. Berrangé wrote:
> > On Wed, May 11, 2022 at 08:38:04AM -0700, Andrea Bolognani wrote:
> > > On Tue, May 10, 2022 at 01:51:05PM +0100, Daniel P. Berrangé wrote:
> > > > In
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> We were calling qemu_target_page_size() left and right.
>>
>> Signed-off-by: Juan Quintela
[Adding Richard]
> (Copying in Peter Maydell)
> Your problem here is most of these files are target independent
> so you
On Wed, May 18, 2022 at 09:15:12AM +0100, Dr. David Alan Gilbert wrote:
> Hi Dan, Leo,
> There are a few coverity warns from that last series:
>
>
> Two moans about not checking mkdir in the tls tests:
Those mkdir()s can just be wrapped with an assert()
> > ** CID 1488871: Error handling
On Mon, May 16, 2022 at 8:56 PM Igor Mammedov wrote:
>
> Signed-off-by: Igor Mammedov
Reviewed-by: Ani Sinha
> ---
> hw/i386/acpi-build.c | 10 ++
> 1 file changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> Reorder the structures so we can know if the fields are:
>> - Read only
>> - Their own locking (i.e. sems)
>> - Protected by 'mutex'
>> - Only for the multifd channel
>>
>> Signed-off-by: Juan Quintela
>> ---
>>
On Tue, May 17, 2022 at 10:50:02AM +, Rajesh A wrote:
> Hi QEMU dev
>
> Virt Manager is able to configure a QEMU VM with more CPU sockets
> than the physical host has.
> For example, in the below VM, when I request 16 vCPU cores, by
> default it takes as 16 Sockets with 1 core each. The host
On Tue, May 17, 2022 at 11:38:39PM -0700, Atish Patra wrote:
> On Tue, May 17, 2022 at 1:54 PM Alistair Francis wrote:
> >
> > On Tue, May 17, 2022 at 6:52 PM Daniel P. Berrangé
> > wrote:
> > >
> > > On Tue, May 17, 2022 at 03:03:38PM +1000, Alistair Francis wrote:
> > > > On Sat, May 7, 2022
(Resend with correct address)
Hi Dan, Leo,
There are a few coverity warns from that last series:
Two moans about not checking mkdir in the tls tests:
> ** CID 1488871: Error handling issues (CHECKED_RETURN)
> /qemu/tests/qtest/migration-test.c: 782 in
> test_migrate_tls_x509_start_common()
On 04/04/2022 20.17, Matthew Rosato wrote:
In order to interface with the underlying host zPCI device, we need
to know it's function handle. Add a routine to grab this from the
vfio CLP capabilities chain.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-pci-vfio.c | 83
Hi,
On Wed, May 11, 2022 at 04:50:35PM +0100, Daniel P. Berrangé wrote:
> On Wed, May 11, 2022 at 08:38:04AM -0700, Andrea Bolognani wrote:
> > On Tue, May 10, 2022 at 01:51:05PM +0100, Daniel P. Berrangé wrote:
> > > In 7.0.0 we can now generate
> > >
> > >type BlockResizeArguments struct {
On Wed, May 18, 2022 at 09:04:35AM +0200, Thomas Huth wrote:
> On 15/03/2022 16.54, Kashyap Chamarthy wrote:
> > Missed this during the initial conversion.
> >
> > Signed-off-by: Kashyap Chamarthy
> > ---
> > This patch should be merged on top of this[1]. Otherwise Sphinx will
> > complain
On 04/04/2022 20.17, Matthew Rosato wrote:
The zpci-interp feature is used to specify whether zPCI interpretation is
to be used for this guest.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio-ccw.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
On 18/05/2022 10.01, Thomas Huth wrote:
On 04/04/2022 20.17, Matthew Rosato wrote:
The zpci-interp feature is used to specify whether zPCI interpretation is
to be used for this guest.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio-ccw.c | 1 +
On 04/04/2022 20.17, Matthew Rosato wrote:
The zpci-interp feature is used to specify whether zPCI interpretation is
to be used for this guest.
Signed-off-by: Matthew Rosato
---
hw/s390x/s390-virtio-ccw.c | 1 +
target/s390x/cpu_features_def.h.inc | 1 +
V2 version of the previous patch ensures to keep compatibility with non-Apple
platforms to avoid any potential compatibility issues with e.g. Windows
mentioned in the review.
> On 18 May 2022, at 10:39, Vitaly Cheptsov wrote:
>
> Cc: Jason Wang
> Cc: Daniel P. Berrange
> Cc: Philippe
Cc: Jason Wang
Cc: Daniel P. Berrange
Cc: Philippe Mathieu-Daudé
Signed-off-by: Vitaly Cheptsov
---
net/socket.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/net/socket.c b/net/socket.c
index bfd8596250..583f788a22 100644
--- a/net/socket.c
+++ b/net/socket.c
@@
On Mon, 2022-05-02 at 01:08 -0700, Peter Delevoryas wrote:
> I was setting gpioV4-7 to "1110" using the QOM pin property handler
> and
> noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.
>
> (qemu) qom-set /machine/soc/gpio gpioV4 true
> (qemu) qom-set
On 07/04/2022 17.00, Alex Bennée wrote:
When trying to work out what the virtio-net-tests where doing it was
hard because the g_test_trap_subprocess redirects all output to
/dev/null. Lift this restriction by using the appropriate flags so you
can see something similar to what the vhost-user-blk
On 2022/5/17 下午4:55, Yi Liu wrote:
Hi Zhangfei,
On 2022/5/12 17:01, zhangfei@foxmail.com wrote:
Hi, Yi
On 2022/5/11 下午10:17, zhangfei@foxmail.com wrote:
On 2022/5/10 下午10:08, Yi Liu wrote:
On 2022/5/10 20:45, Jason Gunthorpe wrote:
On Tue, May 10, 2022 at 08:35:00PM +0800,
On 15/03/2022 16.54, Kashyap Chamarthy wrote:
Missed this during the initial conversion.
Signed-off-by: Kashyap Chamarthy
---
This patch should be merged on top of this[1]. Otherwise Sphinx will
complain (correctly so).
[1]
On Tue, May 17, 2022 at 1:54 PM Alistair Francis wrote:
>
> On Tue, May 17, 2022 at 6:52 PM Daniel P. Berrangé
> wrote:
> >
> > On Tue, May 17, 2022 at 03:03:38PM +1000, Alistair Francis wrote:
> > > On Sat, May 7, 2022 at 6:30 AM Atish Kumar Patra
> > > wrote:
> > > >
> > > > On Fri, May 6,
Hi Kirill,
I saw your "[PATCH 0/4] dm: Introduce dm-qcow2 driver to attach QCOW2
files as block device" patch series:
https://lore.kernel.org/linux-kernel/ykme5zs2cpxun...@infradead.org/T/
There has been recent work in vDPA (VIRTIO Data Path Acceleration) to
achieve similar functionality. The
Hi Peter
Thanks. Yes, I believe (Sockets,Cores,Threads) = (1,16,1) should be the best
performance, as the VM does not need to access the memory of another NUMA node.
So, is it a bug that Virt Manager uses more Sockets by default, when i choose
"Copy host CPU Configuration" ?
regards,
Rajesh
On Sat, May 14, 2022 at 12:46 AM Frank Chang wrote:
>
> On Fri, May 13, 2022 at 11:58 PM Atish Kumar Patra
> wrote:
>>
>> On Thu, May 12, 2022 at 11:29 PM Frank Chang wrote:
>> >
>> > On Thu, May 12, 2022 at 6:01 AM Atish Patra wrote:
>> >>
>> >> From: Atish Patra
>> >>
>> >> mcycle/minstret
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