Hi, Andrew & Naoya
I would appreciate it if you could give me any hint about the changes of
memory/memory-failure!
On 5/20/22 15:06, zhenwei pi wrote:
Hi,
I'm trying to recover hardware corrupted page by virtio balloon, the
workflow of this feature like this:
Guest 5.MF ->
On 2022/5/26 0:19, Philippe Mathieu-Daudé wrote:
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 86710509d2..1fdc5eef92 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -17,6 +17,7 @@
#include "sysemu/hvf_int.h"
#include "sysemu/hw_accel.h"
#include "hvf_arm.h"
CPU: AMD Ryzen 7 5800H
Windows Version: Microsoft Windows [Version 10.0.22621.1]
QEMU Versions
D:\dev\qemu-toby>D:/dev/qemu/qemu-system-x86_64.exe -version
QEMU emulator version 7.0.0 (v7.0.0-11902-g1d935f4a02-dirty)
Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project
On 5/27/22 03:18, Michael S. Tsirkin wrote:
On Fri, May 20, 2022 at 03:06:48PM +0800, zhenwei pi wrote:
Introduce a new queue 'recover VQ', this allows guest to recover
hardware corrupted page:
Guest 5.MF -> 6.RVQ FE10.Unpoison page
/ \
On Tue, May 24, 2022 at 2:54 PM Weiwei Li wrote:
>
> - includes all multiplication operations for M extension
>
> Signed-off-by: Weiwei Li
> Signed-off-by: Junqiang Wang
Reviewed-by: Alistair Francis
Alistair
>
> v2:
> * disable M when both M and Zmmul are enabled
>
> ---
>
On Thu, May 26, 2022 at 5:16 PM Atish Patra wrote:
>
> On Wed, May 25, 2022 at 10:11 PM Alistair Francis
> wrote:
> >
> > On Sat, May 14, 2022 at 4:39 AM Atish Patra wrote:
> > >
> > > stimecmp allows the supervisor mode to update stimecmp CSR directly
> > > to program the next timer
Recent changes to pcie_host corrected size of its internal region to
match what it expects - only the low 28 bits are ever decoded. Previous
code just ignored bit 29 (if size was 1 << 29) in the address which does
not make much sense. We are now asserting on size > 1 << 28 instead,
but it so
On 5/26/22 16:42, Igor Mammedov wrote:
On Tue, 24 May 2022 16:18:01 +0800
Xiaojuan Yang wrote:
commit message needs pointers to specification,
+ in patch comments that point to specific chapters
within the spec for newly introduced registers
Igor,
Thanks for reviewing the patch and
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
xvbf16ger2: VSX Vector bfloat16 GER (rank-2 update)
xvbf16ger2nn: VSX Vector bfloat16 GER (rank-2 update) Negative multiply,
Negative accumulate
xvbf16ger2np: VSX Vector bfloat16 GER (rank-2 update)
Hey QEMU developers,
Cedric mentioned here[1] that QEMU can support emulating a
more complete board, e.g. a machine with an AST2600 *and* an AST1030.
I read through the memory API docs[2] and it mostly makes sense to me,
but what I don’t understand is, what does system_memory represent?
Or, what
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
xvf16ger2: VSX Vector 16-bit Floating-Point GER (rank-2 update)
xvf16ger2nn: VSX Vector 16-bit Floating-Point GER (rank-2 update) Negative
multiply, Negative accumulate
xvf16ger2np: VSX Vector 16-bit
From: Nicholas Piggin
This allows an x86 host to no-op lwsyncs, and ppc host can use lwsync
rather than sync.
Signed-off-by: Nicholas Piggin
Reviewed-by: Richard Henderson
Message-Id: <20220519135908.21282-5-npig...@gmail.com>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/cpu.h
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
xvi4ger8: VSX Vector 8-bit Signed/Unsigned Integer GER (rank-4 update)
xvi4ger8pp: VSX Vector 8-bit Signed/Unsigned Integer GER (rank-4 update)
Positive multiply, Positive accumulate
xvi8ger4: VSX
From: Joel Stanley
These are new hwcap bits added for power10.
Signed-off-by: Joel Stanley
Signed-off-by: Lucas Mateus Castro (alqotel)
Reviewed-by: Richard Henderson
Message-Id: <20220524140537.27451-9-lucas.ara...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
From: Nicholas Piggin
lwsync orders more than just LD_LD, importantly it matches x86 and
s390 default memory ordering.
Signed-off-by: Nicholas Piggin
Reviewed-by: Richard Henderson
Message-Id: <20220519135908.21282-4-npig...@gmail.com>
Signed-off-by: Daniel Henrique Barboza
---
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
pmxvi4ger8: Prefixed Masked VSX Vector 8-bit Signed/Unsigned Integer
GER (rank-4 update)
pmxvi4ger8pp: Prefixed Masked VSX Vector 8-bit Signed/Unsigned Integer
GER (rank-4 update) Positive multiply,
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
pmxvf16ger2: Prefixed Masked VSX Vector 16-bit Floating-Point GER
(rank-2 update)
pmxvf16ger2nn: Prefixed Masked VSX Vector 16-bit Floating-Point GER
(rank-2 update) Negative multiply, Negative accumulate
From: Nicholas Piggin
eieio does not provide ordering between stores to CI memory and stores
to cacheable memory so it can't be used as a general ST_ST barrier.
Reviewed-by: Richard Henderson
Signed-of-by: Nicholas Piggin
Message-Id: <20220519135908.21282-3-npig...@gmail.com>
Signed-off-by:
From: Matheus Ferst
Move vmsumuhm and vmsumuhs to decodetree, declare vmsumuhm helper with
TCG_CALL_NO_RWG, and drop the unused env argument.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-12-matheus.fe...@eldorado.org.br>
[danielhb: added
From: Matheus Ferst
Move vmsumubm and vmsummbm to decodetree, declare both helpers with
TCG_CALL_NO_RWG, and drop the unused env argument.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-11-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
xvf32ger: VSX Vector 32-bit Floating-Point GER (rank-1 update)
xvf32gernn: VSX Vector 32-bit Floating-Point GER (rank-1 update) Negative
multiply, Negative accumulate
xvf32gernp: VSX Vector 32-bit
From: Matheus Ferst
Move vmsumshm and vmsumshs to decodetree, declare vmsumshm helper with
TCG_CALL_NO_RWG, and drop the unused env argument.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-13-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel
From: Matheus Ferst
Move xxextractuw and xxinsertw to decodetree, declare both helpers with
TCG_CALL_NO_RWG, and drop the unused env argument.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-9-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel
From: Frederic Barrat
When writing a register from the TCTXT memory region (4th page within
the IC BAR), we were overwriting the Presentation Controller (PC)
register at the same offset. It looks like a silly cut and paste
error.
We were somehow lucky: the TCTXT registers being touched are
From: "Lucas Mateus Castro (alqotel)"
Implement the following PowerISA v3.1 instructions:
xxmfacc: VSX Move From Accumulator
xxmtacc: VSX Move To Accumulator
xxsetaccz: VSX Set Accumulator to Zero
The PowerISA 3.1 mentions that for the current version of the
architecture, "the hardware
From: Matheus Ferst
Move xvxsigsp to decodetree, declare helper_xvxsigsp with
TCG_CALL_NO_RWG, and drop the unused env argument.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-8-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique
From: Nicholas Piggin
The generated eieio memory ordering semantics do not match the
instruction definition in the architecture. Add a big comment to
explain this strange instruction and correct the memory ordering
behaviour.
Signed-off: Nicholas Piggin
Reviewed-by: Richard Henderson
From: Matheus Ferst
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-10-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/translate/vmx-impl.c.inc | 32 +
1 file changed, 5
From: Víctor Colombo
This patch fixes another not-so-clear situation in Power ISA
regarding the inexact bits in FPSCR. The ISA states that:
"""
When Overflow Exception is disabled (OE=0) and an
Overflow Exception occurs, the following actions are
taken:
...
2. Inexact Exception is set
XX <- 1
From: Matheus Ferst
Move xscvspdpn to decodetree, declare helper_xscvspdpn with
TCG_CALL_NO_RWG_SE and drop the unused env argument.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-7-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique
From: Matheus Ferst
Helpers of vector instructions without cpu_env as an argument do not
access globals.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-3-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
From: Víctor Colombo
According to Power ISA, the FI bit in FPSCR is non-sticky.
This means that if an instruction is said to modify the FI bit, then
it should be set or cleared depending on the result of the
instruction. Otherwise, it should be kept as was before.
However, the following
From: Matheus Ferst
fsel doesn't change FPSCR and CR1 is handled by gen_set_cr1_from_fpscr,
so helper_fsel doesn't need the env argument and can be declared with
TCG_CALL_NO_RWG_SE. We also take this opportunity to move the insn to
decodetree.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard
From: Matheus Ferst
Helpers of BCD instructions only access the VSRs supplied by the
TCGv_ptr arguments, no globals are accessed.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-4-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique
From: Leandro Lupori
Commit 74c4912f097bab98 changed check_tlb_flush() to use
tlb_flush_all_cpus_synced() instead of calling tlb_flush() on each
CPU. However, as side effect of this, a CPU executing a ptesync
after a tlbie will have its TLB flushed only after exiting its
current Translation
From: Alexey Kardashevskiy
tl;dr: This allows Big Endian zImage booting via -kernel + x-vof=on.
QEMU loads the kernel at 0x40 by default which works most of
the time as Linux kernels are relocatable, 64bit and compiled with "-pie"
(position independent code). This works for a little endian
From: Matheus Ferst
Helpers of VSX instructions without cpu_env as an argument do not access
globals.
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-5-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
From: Víctor Colombo
The bit FI fix used the sfprf flag as a flag for the set_fi parameter
in do_float_check_status where applicable. Now, this patch rename this
flag to sfifprf to state this dual usage.
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
Reviewed-by: Rashmica Gupta
From: Alexey Kardashevskiy
The alternative small firmware needs a few words of what it can and
absolutely cannot do; this adds those words.
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Alexey Kardashevskiy
Message-Id: <20220506055124.3822112-1-...@ozlabs.ru>
[danielhb: added linebreaks
From: Bernhard Beschow
Commit 28290f37e20cda27574f15be9e9499493e3d0fe8 'PPC: E500: Generate
device tree on reset' improved device tree generation and made
BINARY_DEVICE_TREE_FILE obsolete.
Signed-off-by: Bernhard Beschow
Reviewed-by: Daniel Henrique Barboza
Message-Id:
From: Matheus Ferst
Signed-off-by: Matheus Ferst
Reviewed-by: Richard Henderson
Message-Id: <20220517123929.284511-2-matheus.fe...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/helper.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Murilo Opsfelder Araujo
When CONFIG_MOS6522 is not set, building ppc64-softmmu target fails:
/usr/bin/ld: libqemu-ppc64-softmmu.fa.p/monitor_misc.c.o:(.data+0x1158):
undefined reference to `hmp_info_via'
Make devices configuration available in hmp-commands*.hx and check for
From: Paolo Bonzini
-machine graphics=off is the usual way to tell the firmware or the OS that the
user wants a serial console. The pseries machine however does not support
this, and never adds the stdout-path node to the device tree if a VGA device
is provided. This is in addition to the
The following changes since commit 2417cbd5916d043e0c56408221fbe9935d0bc8da:
Merge tag 'ak-pull-request' of https://gitlab.com/berrange/qemu into staging
(2022-05-26 07:00:04 -0700)
are available in the Git repository at:
https://gitlab.com/danielhb/qemu.git tags/pull-ppc-20220526
for you
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 5/20/22 15:01, Bernhard Beschow wrote:
Commit 28290f37e20cda27574f15be9e9499493e3d0fe8 'PPC: E500: Generate
device tree on reset' improved device tree generation and made
BINARY_DEVICE_TREE_FILE obsolete.
Signed-off-by:
On Thu, 26 May 2022, Michael S. Tsirkin wrote:
On Thu, May 26, 2022 at 09:34:08PM +0200, BALATON Zoltan wrote:
On Thu, 26 May 2022, Michael S. Tsirkin wrote:
On Thu, May 26, 2022 at 06:43:25PM +0200, BALATON Zoltan wrote:
On Thu, 26 May 2022, BALATON Zoltan wrote:
Hello,
On Thu, 26 May
fw_cfg DT node is generated after the create_fdt without any check
if the DT is being loaded from the commandline. This results in
FDT_ERR_EXISTS error if dtb is loaded from the commandline.
Generate fw_cfg node only if the DT is not loaded from the commandline.
Signed-off-by: Atish Patra
---
On Thu, May 26, 2022 at 4:17 PM John Snow wrote:
>> > - $(call quiet-command, \
>> > -$(TESTS_PYTHON) -m pip -q --disable-pip-version-check install
>> > \
>> > --r $(TESTS_VENV_REQ), PIP, $(TESTS_VENV_REQ))
>> > + $(call quiet-command, $(PYTHON) -m venv $@, VENV,
On Thu, May 26, 2022 at 09:34:08PM +0200, BALATON Zoltan wrote:
> On Thu, 26 May 2022, Michael S. Tsirkin wrote:
> > On Thu, May 26, 2022 at 06:43:25PM +0200, BALATON Zoltan wrote:
> > > On Thu, 26 May 2022, BALATON Zoltan wrote:
> > > > Hello,
> > > >
> > > > On Thu, 26 May 2022, Daniel Henrique
Author: John Snow - https://gitlab.com/jsnow
Merge Request:
https://gitlab.com/qemu-project/python-qemu-qmp/-/merge_requests/6
... from: jsnow/python-qemu-qmp:install_python_311
... into: qemu-project/python-qemu-qmp:main
*Actually* install Python 3.11 to the container that is used during the
On Thu, 26 May 2022, Michael S. Tsirkin wrote:
On Thu, May 26, 2022 at 06:43:25PM +0200, BALATON Zoltan wrote:
On Thu, 26 May 2022, BALATON Zoltan wrote:
Hello,
On Thu, 26 May 2022, Daniel Henrique Barboza wrote:
Hi,
This patch broke the boot of the sam460ex ppc machine:
qemu-system-ppc -M
On Thu, May 26, 2022 at 9:55 AM Stefan Hajnoczi wrote:
> The bdrv_pread()/bdrv_pwrite() errno for negative bytes changes from
> EINVAL to EIO. Did you audit the code to see if it matters?
I don't believe I had, but I checked all calls now. There's ~140 of
them, so the probability of me having
On Fri, May 20, 2022 at 03:06:48PM +0800, zhenwei pi wrote:
> Introduce a new queue 'recover VQ', this allows guest to recover
> hardware corrupted page:
>
> Guest 5.MF -> 6.RVQ FE10.Unpoison page
> / \/
>
On Thu, May 26, 2022 at 06:43:25PM +0200, BALATON Zoltan wrote:
> On Thu, 26 May 2022, BALATON Zoltan wrote:
> > Hello,
> >
> > On Thu, 26 May 2022, Daniel Henrique Barboza wrote:
> > > Hi,
> > >
> > > This patch broke the boot of the sam460ex ppc machine:
> > >
> > > qemu-system-ppc -M
In two places in gdbstub.c we look at gdbserver_state.init to decide
whether we're going to do a semihosting syscall via the gdb remote
protocol:
* when setting up, if the user didn't explicitly select either
native semihosting or gdb semihosting, we autoselect, with the
intended behaviour
Currently we mishandle the --semihosting-config option if the
user specifies it on the command line more than once. For
example with:
--semihosting-config target=gdb --semihosting-config arg=foo,arg=bar
the function qemu_semihosting_config_options() is called twice, once
for each argument. But
This patchset fixes a couple of bugs reported by
Liviu Ionescu related to semihosting syscall handling.
Firstly, if the user sets up the gdbstub but doesn't connect a gdb
(ie passes '-s' but not '-S'), and we try to use gdb for semihosting
syscalls (either because the user explicitly set
On 5/26/22 19:46, Vladimir Sementsov-Ogievskiy wrote:
On 4/7/22 16:27, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
v4: Now based on master
01: add assertion and r-b
02: s/7.0/7.1/ and r-b
03: switch to QEMUMachine, touch-up pylintrc, drop r-b
04,05,06: add r-b
07: switch to QEMUMachine
Here
On Thu, May 26, 2022 at 03:33:10PM +0800,
Xiaoyao Li wrote:
> On 5/24/2022 3:37 PM, Gerd Hoffmann wrote:
> > I think all this can be simplified, by
> >(1) Change the existing entry to cover the accepted ram range.
> >(2) If there is room before the accepted ram range add a
> >
On Tue, 24 May 2022 14:18:35 +0800
Lei Rao wrote:
> Migration of a VFIO passthrough device can be supported by using a device
> specific kernel driver to save/restore the device state thru device specific
> interfaces. But this approach doesn't work for devices that lack a state
> migration
On Wed, May 25, 2022 at 01:16:34PM -0700, Jue Wang wrote:
> The hypervisor _must_ emulate poisons identified in guest physical
> address space (could be transported from the source VM), this is to
> prevent silent data corruption in the guest. With a paravirtual
> approach like this patch series,
On 5/26/22 8:06 PM, Claudio Fontana wrote:
> Hi all,
>
> I am seeing intermittent failures of make -j check on master.
>
> I am using gcc 7.5.0, make 4.2.1, meson 0.61.4, ninja-1.10.0
>
> I tried these two configurations:
>
> $ ../configure
>
> $ ../configure --disable-tcg --enable-kvm
>
>
On Thu, 26 May 2022 at 18:14, Joe Nosay wrote:
>
> The errors occur at the end of the attached file.
...which is to say:
../net/eth.c: In function ‘eth_parse_ipv6_hdr’:
../net/eth.c:410:15: error: array subscript ‘struct
ip6_ext_hdr_routing[0]’ is partly outside array bounds of ‘struct
Hi all,
I am seeing intermittent failures of make -j check on master.
I am using gcc 7.5.0, make 4.2.1, meson 0.61.4, ninja-1.10.0
I tried these two configurations:
$ ../configure
$ ../configure --disable-tcg --enable-kvm
and the errors seem to appear in both cases, saltuarily, triggering in
The errors occur at the end of the attached file.
changing dir to build for make ""...
make[1]: Entering directory '/home/sossego/elbrus/qemu-e2k/build'
/usr/bin/ninja build.ninja && touch build.ninja.stamp
ninja: no work to do.
/usr/bin/python3 -B /home/sossego/elbrus/qemu-e2k/meson/meson.py
Daniel P. Berrangé writes:
> To preserve CI shared runner credits we don't want to run
> pipelines on every push.
>
> This sets up the config to that pipelines are never created
> for contributors by default. To override this the QEMU_CI
> variable can be set to a non-zero value. If set to 1,
Le 30/04/2022 à 19:02, Richard Henderson a écrit :
While looking at semihosting, I noticed that 060 does have halt.
Then I was a bit surprised that it wasn't being disassembled and
thought trying to exactly match disassembly to cpu was a bit
frought with peril -- one also wants to know what the
Paolo Bonzini writes:
> This is the next part of the firmware cross compilation story. It only
> looks at firmware that's strictly part of QEMU (optionrom, s390-ccw,
> vof), and does not do docker cross compilers yet; but it takes the
> infrastructure from tests/tcg/configure.sh and moves it
On 4/7/22 16:27, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
v4: Now based on master
01: add assertion and r-b
02: s/7.0/7.1/ and r-b
03: switch to QEMUMachine, touch-up pylintrc, drop r-b
04,05,06: add r-b
07: switch to QEMUMachine
Here are two new options for copy-before-write filter:
On Thu, 26 May 2022, BALATON Zoltan wrote:
Hello,
On Thu, 26 May 2022, Daniel Henrique Barboza wrote:
Hi,
This patch broke the boot of the sam460ex ppc machine:
qemu-system-ppc -M sam460ex -kernel
./buildroot/qemu_ppc_sam460ex-latest/vmlinux \
-device virtio-net-pci,netdev=net0 -netdev
On Thu, May 26, 2022 at 8:54 AM Peter Maydell
wrote:
> On Fri, 25 Feb 2022 at 17:45, Hao Wu wrote:
> >
> > From: Shengtan Mao
> >
> > Reviewed-by: Hao Wu
> > Reviewed-by: Chris Rauer
> > Signed-off-by: Shengtan Mao
> > Signed-off-by: Patrick Venture
>
> Hi; John Snow tells me that this
On 5/26/22 03:45, Daniel P. Berrangé wrote:
The following changes since commit 58b53669e87fed0d70903e05cd42079fbbdbc195:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-05-25 13:46:29 -0700)
are available in the Git repository at:
Hi,
On Wed, Mar 2, 2022 at 4:03 PM Peter Maydell wrote:
>
> From: Shengtan Mao
>
> Reviewed-by: Hao Wu
> Reviewed-by: Chris Rauer
> Signed-off-by: Shengtan Mao
> Signed-off-by: Patrick Venture
> Message-id: 20220225174451.192304-1-wuhao...@google.com
> Signed-off-by: Peter Maydell
> ---
>
Hello,
On Thu, 26 May 2022, Daniel Henrique Barboza wrote:
Hi,
This patch broke the boot of the sam460ex ppc machine:
qemu-system-ppc -M sam460ex -kernel
./buildroot/qemu_ppc_sam460ex-latest/vmlinux \
-device virtio-net-pci,netdev=net0 -netdev user,id=net0 -serial mon:stdio \
-nographic
On Fri, 25 Feb 2022 at 17:45, Hao Wu wrote:
>
> From: Shengtan Mao
>
> Reviewed-by: Hao Wu
> Reviewed-by: Chris Rauer
> Signed-off-by: Shengtan Mao
> Signed-off-by: Patrick Venture
Hi; John Snow tells me that this test fails in the tests/vm/netbsd
VM (you can test this with 'make
Hi
On Thu, May 26, 2022 at 1:28 PM Daniel P. Berrangé
wrote:
> To preserve CI shared runner credits we don't want to run
> pipelines on every push.
>
> This sets up the config to that pipelines are never created
>
to/so ?
> for contributors by default. To override this the QEMU_CI
> variable
On Thu, May 26, 2022 at 11:20:18AM -0400, John Snow wrote:
> On Thu, May 26, 2022 at 10:21 AM John Snow wrote:
> >
> >
> >
> > On Thu, May 26, 2022, 3:54 AM Daniel P. Berrangé
> > wrote:
> >>
> >> On Wed, May 25, 2022 at 08:25:12PM -0400, John Snow wrote:
> >> > If you invoke the check script
On Thu, May 26, 2022 at 10:21 AM John Snow wrote:
>
>
>
> On Thu, May 26, 2022, 3:54 AM Daniel P. Berrangé wrote:
>>
>> On Wed, May 25, 2022 at 08:25:12PM -0400, John Snow wrote:
>> > If you invoke the check script from outside of the tests/qemu-iotests
>> > directory, the directories
On Thu, May 19, 2022 at 02:30:43AM -0400, Jonah Palmer wrote:
>
> On 5/16/22 16:26, Michael S. Tsirkin wrote:
>
> On Fri, Apr 01, 2022 at 09:23:22AM -0400, Jonah Palmer wrote:
>
> From: Laurent Vivier
>
> Display feature names instead of bitmaps for host, guest, and
>
On Thu, May 26, 2022, 10:31 AM Vladimir Sementsov-Ogievskiy <
vsement...@yandex-team.ru> wrote:
> On 4/8/22 20:02, Vladimir Sementsov-Ogievskiy wrote:
> > The method is not popular, we prefer use vm.qmp() and then check
>
> Suddenly I found, that I missed a lot of existing users: in scripts, in
>
On 5/26/22 8:27 PM, Igor Mammedov wrote:
On Thu, 26 May 2022 19:37:47 +0800
Gavin Shan wrote:
On 5/18/22 5:21 PM, Gavin Shan wrote:
The {socket, cluster, core} IDs detected from Linux guest aren't
matching with what have been provided in PPTT. The flag used for
'ACPI Processor ID valid' is
Hi Igor,
On 5/26/22 8:25 PM, Igor Mammedov wrote:
On Wed, 18 May 2022 17:21:40 +0800
Gavin Shan wrote:
The {socket, cluster, core} IDs detected from Linux guest aren't
matching with what have been provided in PPTT. The flag used for
'ACPI Processor ID valid' is missed for {socket, cluster,
On Wed, May 25, 2022, 8:09 PM John Snow wrote:
> GitLab CI: https://gitlab.com/jsnow/qemu/-/pipelines/548326343
>
> This series collects some of the uncontroversial elements that serve as
> pre-requisites for a later series that seeks to generate a testing venv
> by default.
>
> This series
On 4/8/22 20:02, Vladimir Sementsov-Ogievskiy wrote:
The method is not popular, we prefer use vm.qmp() and then check
Suddenly I found, that I missed a lot of existing users: in scripts, in avocado
tests.
Do you prefer to rename the method to "cmd()", and change all the occurrences, or keep
On Wed, May 25, 2022 at 06:32:26PM +0100, Mark Cave-Ayland wrote:
> I was working away at some improvements for PS2 devices when I noticed that
> one
> small change to the instantiation of a PS2 mouse device caused a regression in
> tests/qtest/bios-tables-test, specifically the
On Thu, May 26, 2022, 3:54 AM Daniel P. Berrangé
wrote:
> On Wed, May 25, 2022 at 08:25:12PM -0400, John Snow wrote:
> > If you invoke the check script from outside of the tests/qemu-iotests
> > directory, the directories initialized as source_iotests and
> > build_iotests will be incorrect.
> >
On Thu, May 26, 2022, 8:14 AM Paolo Bonzini wrote:
> On 5/26/22 02:09, John Snow wrote:
> > Remove the sys.path hacking from device-crash-test, and add in a little
> > user-friendly message for anyone who was used to running this script
> > directly from the source tree.
> >
> > Modify the
On Thu, May 26, 2022, 8:16 AM Paolo Bonzini wrote:
> On 5/26/22 02:09, John Snow wrote:
> > Factor out the "test venv pip" macro; rewrite the "check-venv" rule to
> > be a little more compact. Replace the "PIP" pseudo-command output with
> > "VENVPIP" to make it 1% more clear that we are talking
On Wed, 18 May 2022 12:29:25 -0400
"Michael S. Tsirkin" wrote:
> On Tue, May 17, 2022 at 10:13:51AM +0200, Gerd Hoffmann wrote:
> > That problem isn't new and we already have a bunch of aml_* stubs
> > because of that. I expect it'll work just fine, at worst we'll
> > have to add a stub or two
> -Original Message-
> From: Lei He [mailto:helei.si...@bytedance.com]
> Sent: Wednesday, May 25, 2022 5:01 PM
> To: m...@redhat.com; Gonglei (Arei) ;
> berra...@redhat.com
> Cc: qemu-devel@nongnu.org; virtualizat...@lists.linux-foundation.org;
> linux-cry...@vger.kernel.org;
Hi,
This patch broke the boot of the sam460ex ppc machine:
qemu-system-ppc -M sam460ex -kernel
./buildroot/qemu_ppc_sam460ex-latest/vmlinux \
-device virtio-net-pci,netdev=net0 -netdev user,id=net0 -serial mon:stdio \
-nographic -snapshot
qemu-system-ppc: ../hw/pci/pcie_host.c:97:
On Thu, 26 May 2022 19:37:47 +0800
Gavin Shan wrote:
> Hi Igor, Yanan and maintainers,
>
> On 5/18/22 5:21 PM, Gavin Shan wrote:
> > The {socket, cluster, core} IDs detected from Linux guest aren't
> > matching with what have been provided in PPTT. The flag used for
> > 'ACPI Processor ID
Le 24/04/2022 à 18:49, Mark Cave-Ayland a écrit :
By default quirk_mode_page_apple_vendor should be enabled for all scsi-hd
devices
connected to the q800 machine to enable MacOS to detect and use them.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 6 ++
1 file changed, 6
Le 24/04/2022 à 18:49, Mark Cave-Ayland a écrit :
One of the mechanisms MacOS uses to identify drives compatible with MacOS is to
send a custom MODE SELECT command for page 0x30 to the drive. The response to
this is a hard-coded manufacturer string which must match in order for the
drive to be
Le 24/04/2022 à 18:49, Mark Cave-Ayland a écrit :
By default quirk_mode_sense_rom_force_dbd should be enabled for all scsi-cd
devices
connected to the q800 machine to correctly report the CDROM block descriptor
back
to A/UX.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 1 +
1 file
On 5/26/22 02:09, John Snow wrote:
Factor out the "test venv pip" macro; rewrite the "check-venv" rule to
be a little more compact. Replace the "PIP" pseudo-command output with
"VENVPIP" to make it 1% more clear that we are talking about using pip
to install something into a venv.
On 5/26/22 02:09, John Snow wrote:
This is needed to be able to add a venv-building step to 'make check';
the clang-user job in particular needs this to be able to run
check-unit.
Signed-off-by: John Snow
---
tests/docker/dockerfiles/debian10.docker | 1 +
1 file changed, 1 insertion(+)
Le 24/04/2022 à 18:49, Mark Cave-Ayland a écrit :
The MacOS CDROM driver uses a SCSI INQUIRY command to check that any SCSI CDROMs
detected match a whitelist of vendors and products before adding them to the
list of available devices.
Add known-good default vendor and product information using
On 5/26/22 02:09, John Snow wrote:
Remove the sys.path hacking from device-crash-test, and add in a little
user-friendly message for anyone who was used to running this script
directly from the source tree.
Modify the GitLab job recipes to create the tests/venv first, then run
device-crash-test
On 5/26/22 11:51, Pavel Dovgalyuk wrote:
At least aio_bh_schedule_oneshot_full should have the same effect, so
should this be done at a lower level, in aio_bh_enqueue() or even
aio_notify()?
Not sure about aio_notify. It can operate with different contexts.
Can some of them be not related
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