)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-la-20220808
for you to fetch changes up to 10dcb08b03863221faa41f4f1aa835cdca441b96:
target/loongarch: Remove cpu_fcsr0 (2022-08-08 19:42:53 -0700
If smstateen is implemented and sstateen0.fcsr is clear then the floating point
operations must return illegal instruction exception or virtual instruction
trap, if relevant.
Signed-off-by: Mayuresh Chitale
---
target/riscv/csr.c| 23 +
Add knobs to allow users to enable smstateen and also export it via the
ISA extension string.
Signed-off-by: Mayuresh Chitale
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d4635c7df4..d8a0f4e700 100644
---
Accesses to henvcfg, henvcfgh and senvcfg are allowed only if the corresponding
bit in mstateen0/hstateen0 is enabled. Otherwise an illegal instruction trap is
generated.
Signed-off-by: Mayuresh Chitale
---
target/riscv/csr.c | 87 ++
1 file changed,
Smstateen extension specifies a mechanism to close
the potential covert channels that could cause security issues.
This patch adds the CSRs defined in the specification and
the corresponding predicates and read/write functions.
Signed-off-by: Mayuresh Chitale
---
target/riscv/cpu.h | 4
This series adds support for the Smstateen specification which provides a
mechanism to plug the potential covert channels which are opened by extensions
that add to processor state that may not get context-switched. Currently access
to *envcfg registers and floating point(fcsr) is controlled via
When enable the virtio-net-pci, guest network packet will
load the vnet_hdr. In COLO status, the primary VM's network
packet maybe redirect to another VM, it need filter-redirect
enable the vnet_hdr flag at the same time, COLO-proxy will
correctly parse the original network packet. If have any
> -Original Message-
> From: Peter Maydell
> Sent: Friday, August 5, 2022 5:57 PM
> To: Zhang, Chen
> Cc: Jason Wang ; Li Zhijian ;
> qemu-dev
> Subject: Re: [PATCH V2] net/colo.c: Fix the pointer issuse reported by
> Coverity.
>
> On Fri, 5 Aug 2022 at 10:53, Zhang Chen wrote:
> >
at:
https://gitlab.com/rth7680/qemu.git tags/pull-la-20220808
for you to fetch changes up to 10dcb08b03863221faa41f4f1aa835cdca441b96:
target/loongarch: Remove cpu_fcsr0 (2022-08-08 19:42:53 -0700)
loongarch: fix emulation of fcsr
All of the fpu operations are defined with TCG_CALL_NO_WG, but they
all modify FCSR0. The most efficient way to fix this is to remove
cpu_fcsr0, and instead use explicit load and store operations for the
two instructions that manipulate that value.
Acked-by: Qi Hu
Reviewed-by: Song Gao
On 8/8/22 15:33, Philippe Mathieu-Daudé via wrote:
The following changes since commit 8a1337e60400ef54432e063164faf5043a5d:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-08-08 09:57:37 -0700)
are available in the Git repository at:
Hi, Juan,
You are right, this v3 and previous v3 are identical except the link to
previous discussion. The previous [patch v3 0/2] was sent failed as shown in my
mail, so I resend this patch. Sorry for the ambiguity of resending same patch,
and thanks for your time ~
Best Regards
Ling
`make tests/migration/stress` fails with:
FAILED: tests/migration/stress
cc -m64 -mlittle-endian -o tests/migration/stress
tests/migration/stress.p/stress.c.o -Wl,--as-needed -Wl,--no-undefined -pie
-Wl,--warn-common -Wl,-z,relro -Wl,-z,now -fstack-protector-strong -static
-pthread
The first patch adds sysprof-capture-4 dependency when building stress binary in
order to fix a build error.
The second patch adds support for ppc64le in guestperf.py.
Murilo Opsfelder Araujo (2):
tests/migration: add sysprof-capture-4 as dependency for stress binary
tests/migration: add
Add support for ppc64le for guestperf.py. On ppc, console is usually
hvc0 and serial device for pseries machine is spapr-vty.
Signed-off-by: Murilo Opsfelder Araujo
---
tests/migration/guestperf/engine.py | 28 +---
1 file changed, 25 insertions(+), 3 deletions(-)
diff
On 8/8/22 13:50, Daniel Henrique Barboza wrote:
On 8/5/22 07:50, Frederic Barrat wrote:
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index 077f391d59..953c384bf6 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -17,6 +17,7 @@
#include "hw/ppc/pnv.h"
On Mon, Aug 8, 2022 at 4:10 PM wrote:
>
> On 08/08/2022 22:28, Jessica Clarke wrote:
> > On 8 Aug 2022, at 22:06, Conor Dooley wrote:
> >>
> >> From: Conor Dooley
> >>
> >> The subnodes of the syscon have been added to the incorrect paths.
> >> Rather than add them as subnodes, they were
On 8/8/22 00:23, David Gibson wrote:
On Fri, Aug 05, 2022 at 06:39:29AM -0300, Daniel Henrique Barboza wrote:
At this moment, arm_load_dtb() can free machine->fdt when
binfo->dtb_filename is NULL. If there's no 'dtb_filename', 'fdt' will be
retrieved by binfo->get_dtb(). If get_dtb() returns
On 8/2/22 08:35, Kevin Wolf wrote:
Am 24.07.2022 um 23:41 hat Liang Yan geschrieben:
Hello All,
I am facing a lock situation between main-loop thread 1 and vcpu thread 4
when doing a qmp snapshot. QEMU is running on 6.0.x, checked the upstream
code and did not see any big change since
From: Igor Mammedov
QEMU crashes trying to save VMSTATE when only MIPS target are compiled in
$ qemu-system-mips -monitor stdio
(qemu) migrate "exec:gzip -c > STATEFILE.gz"
Segmentation fault (core dumped)
It happens due to PIIX4_PM trying to parse hotplug vmstate structures
which are
From: Peter Maydell
In real hardware, the APB and AHB PNP data tables can be accessed
with byte and halfword reads as well as word reads. Our
implementation currently only handles word reads. Add support for
the 8 and 16 bit accesses. Note that we only need to handle aligned
accesses --
From: Peter Maydell
Coverity notes that we forgot to check the error return from
lock_user() in one place in the handling of the UHI_plog semihosting
call. Add the missing error handling.
report_fault() is rather brutal in that it will call abort(), but
this is the same error-handling used in
The following changes since commit 8a1337e60400ef54432e063164faf5043a5d:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-08-08 09:57:37 -0700)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/mips-20220809
for you to fetch
On 08/08/2022 22:28, Jessica Clarke wrote:
> On 8 Aug 2022, at 22:06, Conor Dooley wrote:
>>
>> From: Conor Dooley
>>
>> The subnodes of the syscon have been added to the incorrect paths.
>> Rather than add them as subnodes, they were originally added to "/foo"
>> and a later patch moved them to
On Mon, Aug 8, 2022 at 5:56 PM Bin Meng wrote:
> On Fri, Aug 5, 2022 at 10:56 PM Bin Meng wrote:
> >
> > From: Bin Meng
> >
> > The maximum number of wait objects for win32 should be
> > MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1.
> >
> > Signed-off-by: Bin Meng
> > ---
> >
> >
On Mon, Aug 08, 2022 at 12:21:34PM -0400, Stefan Hajnoczi wrote:
> As soon as virtio_scsi_data_plane_start() attaches host notifiers the
> IOThread may start virtqueue processing. There is a race between
> IOThread virtqueue processing and virtio_scsi_data_plane_start() because
> it only assigns
On Mon, Aug 8, 2022 at 11:15 AM Konrad, Frederic
wrote:
> > -Original Message-
> > From: Peter Maydell
> > Sent: 02 August 2022 15:34
> > To: Konrad, Frederic
> > Cc: qemu-devel@nongnu.org; Fabien Chouteau ;
> > Frederic Konrad ; f4...@amsat.org
> > Subject: Re: [PATCH for-7.1]
Am 8. August 2022 20:02:50 MESZ schrieb Peter Maydell
:
>On Mon, 8 Aug 2022 at 18:57, BB wrote:
>> Am 8. August 2022 14:15:40 MESZ schrieb Igor Mammedov :
>> >On Wed, 3 Aug 2022 19:26:30 +0200
>> >While refactoring we should keep migration stream compatible with older
>> >QEMU versions (we
On Thu, Jul 28, 2022 at 1:50 PM Igor Mammedov wrote:
>
> QEMU crashes trying to save VMSTATE when only MIPS target are compiled in
> $ qemu-system-mips -monitor stdio
> (qemu) migrate "exec:gzip -c > STATEFILE.gz"
> Segmentation fault (core dumped)
>
> It happens due to PIIX4_PM trying to
On 8 Aug 2022, at 22:06, Conor Dooley wrote:
>
> From: Conor Dooley
>
> The subnodes of the syscon have been added to the incorrect paths.
> Rather than add them as subnodes, they were originally added to "/foo"
> and a later patch moved them to "/soc/foo". Both are incorrect & they
> should
On Tue, Jul 19, 2022 at 9:17 PM Peter Maydell wrote:
>
> Coverity notes that we forgot to check the error return from
> lock_user() in one place in the handling of the UHI_plog semihosting
> call. Add the missing error handling.
>
> report_fault() is rather brutal in that it will call abort(),
From: Conor Dooley
The subnodes of the syscon have been added to the incorrect paths.
Rather than add them as subnodes, they were originally added to "/foo"
and a later patch moved them to "/soc/foo". Both are incorrect & they
should have been added as "/soc/test@###/foo" as "/soc/test" is the
From: Conor Dooley
"uart" is not a node name that complies with the dt-schema.
Change the node name to "serial" to ix warnings seen during
dt-validate on a dtbdump of the virt machine such as:
/stuff/qemu/qemu.dtb: uart@1000: $nodename:0: 'uart@1000' does not
match '^serial(@.*)?$'
From: Conor Dooley
When optional AIA PLIC support was added the to the virt machine, the
address cells property was removed leading the issues with dt-validate
on a dump from the virt machine:
/stuff/qemu/qemu.dtb: plic@c00: '#address-cells' is a required property
From schema:
From: Conor Dooley
The device trees produced automatically for the virt and spike machines
fail dt-validate on several grounds. Some of these need to be fixed in
the linux kernel's dt-bindings, but others are caused by bugs in QEMU.
I mostly opted for what appeared to be the smallest change
From: Conor Dooley
"platform" is not a valid name for a bus node in dt-schema, so warnings
can be see in dt-validate on a dump of the riscv virt dtb:
/stuff/qemu/qemu.dtb: platform@400: $nodename:0: 'platform@400' does
not match
On Mon, 8 Aug 2022, BALATON Zoltan wrote:
On Sun, 7 Aug 2022, BALATON Zoltan wrote:
On Sun, 7 Aug 2022, Mark Cave-Ayland wrote:
On 07/08/2022 12:47, Elliot Nunn wrote:
I want to give Mac OS 9 clients access to hardware cursor support, to
improve
responsiveness in absolute-cursor mode.
Would
On 08/08/2022 21:51, Alistair Francis wrote:
> On Tue, Aug 9, 2022 at 2:14 AM wrote:
>> I guess this patch can then be safely ignored :)
>> Glad to have cleared this up as I was rather confused by what I saw.
>
> Great! Do you mind resending the series then with this patch dropped?
> It just
On Tue, Aug 9, 2022 at 2:14 AM wrote:
>
> On 08/08/2022 16:03, Tsukasa OI wrote:
> > I agree with Alistair. **I** removed 'S' and 'U' from the ISA string
> > and it should be working in the latest development branch (I tested).
>
> Yeah, I saw what you as I looked at the commit log while trying
> -Original Message-
> From: Anton Johansson
> Sent: Thursday, August 4, 2022 5:56 AM
> To: qemu-devel@nongnu.org
> Cc: a...@rev.ng; a...@rev.ng; bab...@rev.ng; ni...@rev.ng; Taylor Simpson
> ; Brian Cain ; Michael Lambert
> ; richard.hender...@linaro.org;
> alex.ben...@linaro.org
>
On 8/8/22 07:23, Thomas Huth wrote:
On 08/08/2022 14.57, Paolo Bonzini wrote:
The following changes since commit 3916603e0c1d909e14e09d5ebcbdaa9c9e21adf3:
Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging
(2022-07-29 17:39:17 -0700)
are available in the Git
On 8/8/22 05:57, Paolo Bonzini wrote:
The following changes since commit 3916603e0c1d909e14e09d5ebcbdaa9c9e21adf3:
Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging
(2022-07-29 17:39:17 -0700)
are available in the Git repository at:
On 08/08/2022 19.47, Peter Maydell wrote:
Hi; I just reduced QEMU's storage usage on gitlab by 130GB (no typo!)
using https://gitlab.com/eskultety/gitlab_cleaner, which Dan helpfully
pointed me at. This script removes old pipelines, which take up a
lot of storage space for QEMU because they
And summing up the discussion about TEMP_FAILURE_RETRY() usage examples,
I've come up with a new patch for TFR() to TEMP_FAILURE_RETRY()
refactoring. I've decided to stick to expression realisation.
>From 94217dfacf12b3211cfab6e19d750e57d679e851 Mon Sep 17 00:00:00 2001
From: Nikita Ivanov
Date:
On Mon, 8 Aug 2022 at 18:57, BB wrote:
> Am 8. August 2022 14:15:40 MESZ schrieb Igor Mammedov :
> >On Wed, 3 Aug 2022 19:26:30 +0200
> >While refactoring we should keep migration stream compatible with older
> >QEMU versions (we must not regress widely x86 code path). Which might be
> >tricky in
On Mon, Aug 8, 2022, 11:49 AM Peter Maydell
wrote:
> Hi; I just reduced QEMU's storage usage on gitlab by 130GB (no typo!)
> using https://gitlab.com/eskultety/gitlab_cleaner, which Dan helpfully
> pointed me at. This script removes old pipelines, which take up a
> lot of storage space for QEMU
Hi!
During our discussion, I found that I've missed a couple of places where
TFR() macro could be applied. Here is an updated first patch:
>From 8a68f50aac4a8549f416b9350cf339cf0501a712 Mon Sep 17 00:00:00 2001
From: Nikita Ivanov
Date: Wed, 3 Aug 2022 12:54:00 +0300
Subject: [PATCH] error
Am 8. August 2022 14:15:40 MESZ schrieb Igor Mammedov :
>On Wed, 3 Aug 2022 19:26:30 +0200
>Bernhard Beschow wrote:
>
>> On Tue, Aug 2, 2022 at 8:37 AM Philippe Mathieu-Daudé via <
>> qemu-devel@nongnu.org> wrote:
>>
>> > On 28/7/22 15:16, Igor Mammedov wrote:
>> > > On Thu, 28 Jul 2022
On 8/1/22 10:27, Ross Lagerwall via wrote:
When resuming after a migration, the backend sends CMD_INIT to the
emulator from the startup callback, then it sends the migration state
This startup hook is called upon TIS/CRB device reset, so this is likely
called before the device state has
Hi; I just reduced QEMU's storage usage on gitlab by 130GB (no typo!)
using https://gitlab.com/eskultety/gitlab_cleaner, which Dan helpfully
pointed me at. This script removes old pipelines, which take up a
lot of storage space for QEMU because they include the stdout logs
for all the CI jobs in
On Mon, 8 Aug 2022, Peter Maydell wrote:
On Mon, 8 Aug 2022 at 18:05, BALATON Zoltan wrote:
But the handler we register here just calls cpu_reset which seems to just
call the reset method of the CPU object. If we have nothing else to do
here do we need to explicitly call cpi_reset like this?
On Sun, Aug 7, 2022 at 6:50 PM Weiwei Li wrote:
>
> 在 2022/8/4 上午9:42, Atish Patra 写道:
> > vstimecmp CSR allows the guest OS or to program the next guest timer
> > interrupt directly. Thus, hypervisor no longer need to inject the
> > timer interrupt to the guest if vstimecmp is used. This was
On Mon, 8 Aug 2022 at 18:05, BALATON Zoltan wrote:
> But the handler we register here just calls cpu_reset which seems to just
> call the reset method of the CPU object. If we have nothing else to do
> here do we need to explicitly call cpi_reset like this? Wouldn't the CPU
> object be reset by
Right now translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.
An implementation, like the one arm and s390x have, would require an
i386 length disassembler, which is
Right now translator stops right *after* the end of a page, which
breaks reporting of fault locations when the last instruction of a
multi-insn translation block crosses a page boundary.
Signed-off-by: Ilya Leoshkevich
---
include/exec/translator.h| 10 ++
Add x86_64 and s390x tests to prevent regressions.
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/multiarch/noexec.h | 114
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/s390x/noexec.c | 145 +++
Hi,
I noticed that when we get a SEGV due to jumping to non-readable
memory, sometimes si_addr and program counter in siginfo_t are slightly
off. I tracked this down to the assumption that translators stop before
the end of a page, while in reality they may stop right after it.
Patch 1 fixes a
After mprotect(addr, PROT_NONE), addr can still be executed if there
are cached translations. Drop them.
Signed-off-by: Ilya Leoshkevich
---
accel/tcg/translate-all.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/accel/tcg/translate-all.c
On Mon, Aug 08, 2022 at 07:55:50AM +0200, Thomas Huth wrote:
> On 05/08/2022 13.55, Daniel P. Berrangé wrote:
> > This test of -readconfig validates the last three regressions we
> > have fixed with -readconfig:
> >
> > * Interpretation of memory size units as MiB not bytes
> > * Allow use of
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
On 8/8/22 15:17, BALATON Zoltan wrote:
Patch title is wrong. It should be Embed CPU object in SoC as it's not
QOMifies the CPU just moves it from dinamically allocated to embedded.
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
Drop the use of
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Mon, Aug 08, 2022 at 02:43:49PM +0200, Thomas Huth wrote:
> > On 08/08/2022 14.14, Daniel P. Berrangé wrote:
> > > On Mon, Aug 08, 2022 at 01:57:17PM +0200, Thomas Huth wrote:
> > > >
> > > > Hi!
> > > >
> > > > Seems like we're getting
On 8/7/22 22:05, Thomas Huth wrote:
Hi!
The following changes since commit c669f22f1a47897e8d1d595d6b8a59a572f9158c:
Merge tag 'pull-la-20220805' of https://gitlab.com/rth7680/qemu into staging
(2022-08-05 12:55:53 -0700)
are available in the Git repository at:
On 8/5/22 07:50, Frederic Barrat wrote:
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index 077f391d59..953c384bf6 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -17,6 +17,7 @@
#include "hw/ppc/pnv.h"
#include "hw/qdev-properties.h"
#include
On Mon, Aug 08, 2022 at 05:41:45AM -0400, Emanuele Giuseppe Esposito wrote:
> The way the dataplane stages at startup and stop are monitored is unnecessary
> complicated. In virtio-scsi we have dataplane_started, dataplane_starting and
> dataplane_stopping in VirtIOSCSI.
> In virtio-blk we have
As soon as virtio_scsi_data_plane_start() attaches host notifiers the
IOThread may start virtqueue processing. There is a race between
IOThread virtqueue processing and virtio_scsi_data_plane_start() because
it only assigns s->dataplane_started after attaching host notifiers.
When a virtqueue
On 08/08/2022 16:03, Tsukasa OI wrote:
> I agree with Alistair. **I** removed 'S' and 'U' from the ISA string
> and it should be working in the latest development branch (I tested).
Yeah, I saw what you as I looked at the commit log while trying to
understand why there were invalid strings
On 8/8/22 15:17, BALATON Zoltan wrote:
Patch title is wrong. It should be Embed CPU object in SoC as it's not QOMifies
the CPU just moves it from dinamically allocated to embedded.
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
Drop the use of ppc4xx_init() and duplicate a bit of code related
On Fri, Aug 05, 2022 at 11:41:27AM +0200, Paolo Bonzini wrote:
> On 8/5/22 09:04, Michael S. Tsirkin wrote:
> > >
> > > Buglink:https://bugzilla.redhat.com/show_bug.cgi?id=2099541
> > > Reported-by: Qing Wang
> > > Signed-off-by: Stefan Hajnoczi
> > A scsi thing that tree seems more appropriate.
Bobo WL wrote:
> Hi list
>
> I want to test cxl functions in arm64, and found some problems I can't
> figure out.
>
> My test environment:
>
> 1. build latest bios from https://github.com/tianocore/edk2.git master
> branch(cc2db6ebfb6d9d85ba4c7b35fba1fa37fffc0bc2)
> 2. build latest
On 8/8/22 16:55, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405_boards.c | 55 +-
1 file changed, 38 insertions(+), 17 deletions(-)
diff --git
On Fri, Aug 5, 2022 at 10:56 PM Bin Meng wrote:
>
> From: Bin Meng
>
> The maximum number of wait objects for win32 should be
> MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1.
>
> Signed-off-by: Bin Meng
> ---
>
> util/main-loop.c | 8
> 1 file changed, 4 insertions(+), 4
On Mon, Aug 08, 2022 at 05:41:45AM -0400, Emanuele Giuseppe Esposito wrote:
> The way the dataplane stages at startup and stop are monitored is unnecessary
> complicated. In virtio-scsi we have dataplane_started, dataplane_starting and
> dataplane_stopping in VirtIOSCSI.
> In virtio-blk we have
On Mon, Aug 08, 2022 at 05:41:47AM -0400, Emanuele Giuseppe Esposito wrote:
> Virtio-blk uses VirtIOBlockDataPlane and VirtIOBlock to keep track of
> the dataplane flags. This is completely unnecessary, as both structures
> are always accessed together and we can simplify the sages with an enum.
On Mon, Aug 08, 2022 at 05:41:46AM -0400, Emanuele Giuseppe Esposito wrote:
> Simplify the various dataplane stages in dataplane_start/stop by using
> a single enum instead of having multiple flags.
>
> Read/write the enum atomically, as it can be read also by iothread
> callbacks.
What
On 8/8/22 15:29, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions on a side band bus, the DCR bus, which
On 8/8/22 14:59, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
This moves all the code previously done in the ppc405ep_init() routine
under ppc405_soc_realize(). We can also adjust the number of banks now
that we have control on ppc4xx_sdram_init().
Signed-off-by: Cédric Le
On 2022/08/06 0:54, Conor Dooley wrote:
> From: Palmer Dabbelt
>
> The ISA strings we're providing from QEMU aren't actually legal RISC-V
> ISA strings, as both S and U cannot exist as single-letter extensions
> and must instead be multi-letter strings. We're still using the ISA
> strings
It's not that it's now explicitly typed as PPCUIC but more that it's now
embedded in soc state instead of dynamically allocated. So Embed UIC in
soc state may be a better patch title.
Regards,
BALATON Zoltan
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
Reviewed-by: Daniel Henrique Barboza
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405_boards.c | 55 +-
1 file changed, 38 insertions(+), 17 deletions(-)
diff --git a/hw/ppc/ppc405_boards.c
On 8/8/22 16:32, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The GPIO controller is currently modeled as a simple SysBus device
with a unique memory region.
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405.h | 21
Peter Maydell writes:
> On Wed, 27 Jul 2022 at 18:28, Raphael Norwitz
> wrote:
>>
>> On Tue, Jul 26, 2022 at 03:57:42PM +0100, Peter Maydell wrote:
>> > On Fri, 1 Jul 2022 at 06:41, Markus Armbruster wrote:
>> > > Could we use a contrib/README with an explanation what "contrib" means,
>> > >
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The GPIO controller is currently modeled as a simple SysBus device
with a unique memory region.
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405.h| 21 +++
hw/ppc/ppc405_uc.c | 50
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The GPIO controller is currently modeled as a DCR device with a couple
It's the DMA already not the GPIU.
Regards,
BALATON Zoltan
of IRQs.
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405.h| 19 ++
On 07/08/2022 23:53, Alistair Francis wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On Sat, Aug 6, 2022 at 2:08 AM Conor Dooley wrote:
>>
>> From: Palmer Dabbelt
>>
>> The ISA strings we're providing from QEMU aren't actually legal
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The GPT controller is currently modeled as a SysBus device with a
unique memory region, a couple of IRQs and a timer.
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405.h| 22
hw/ppc/ppc405_uc.c |
On 08/08/2022 14.57, Paolo Bonzini wrote:
The following changes since commit 3916603e0c1d909e14e09d5ebcbdaa9c9e21adf3:
Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging
(2022-07-29 17:39:17 -0700)
are available in the Git repository at:
Christian Schoenebeck writes:
> On Montag, 8. August 2022 14:52:28 CEST Christian Schoenebeck wrote:
>> On Montag, 8. August 2022 10:05:56 CEST Markus Armbruster wrote:
>> > Nikita Ivanov writes:
>> > > Summing up the discussion above, I suggest the following patch for TFR()
>> > > macro
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The OCM controller is currently modeled as a DCR device.
What's OCM? Did you mean CPC?
Now that all clock settings are handled at the CPC level, change the
SoC "sys-clk" property to be an alias on the same property in the CPC
model.
Reviewed-by:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
On 8/8/22 14:16, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
Hello,
Here is large series QOM'ifying the PPC405 board. It introduces a new
generic machine and SoC models, converts the current device models to
QOM and populates
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
On 8/8/22 14:43, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
It is an initial model to start QOMification of the PPC405 board.
QOM'ified devices will be reintroduced one by one. Start with the
memory regions, which name prefix
Stefan Hajnoczi 于2022年8月8日周一 21:52写道：
>
> On Fri, Aug 05, 2022 at 03:57:46PM +0800, Sam Li wrote:
> > Use sysfs attribute files to get the string value of device
> > zoned model. Then get_sysfs_zoned_model can convert it to
> > BlockZoneModel type in QEMU.
> >
> > Signed-off-by: Sam Li
> >
Stefan Hajnoczi 于2022年8月8日周一 21:52写道：
>
> On Fri, Aug 05, 2022 at 03:57:45PM +0800, Sam Li wrote:
> > Use sysfs attribute files to get the long value of zoned device
> > information.
> >
> > Signed-off-by: Sam Li
> > Reviewed-by: Hannes Reinecke
> > ---
> > block/file-posix.c | 37
On Fri, Aug 05, 2022 at 03:57:51PM +0800, Sam Li wrote:
> Add the documentation about the zoned device support to virtio-blk
> emulation.
>
> Signed-off-by: Sam Li
> ---
> docs/devel/zoned-storage.rst | 41 ++
> docs/system/qemu-block-drivers.rst.inc | 6
On Fri, Aug 05, 2022 at 03:57:47PM +0800, Sam Li wrote:
> By adding zone management operations in BlockDriver, storage controller
> emulation can use the new block layer APIs including Report Zone and
> four zone management operations (open, close, finish, reset).
>
> Add zoned storage commands
On Fri, Aug 05, 2022 at 03:57:49PM +0800, Sam Li wrote:
> Putting zoned/non-zoned BlockDrivers on top of each other is not
> allowed.
>
> Signed-off-by: Sam Li
> Reviewed-by: Stefan Hajnoczi
> ---
> block.c | 13 +
> block/file-posix.c | 1 +
On Fri, Aug 05, 2022 at 03:57:46PM +0800, Sam Li wrote:
> Use sysfs attribute files to get the string value of device
> zoned model. Then get_sysfs_zoned_model can convert it to
> BlockZoneModel type in QEMU.
>
> Signed-off-by: Sam Li
> Reviewed-by: Hannes Reinecke
> ---
> block/file-posix.c
On Fri, Aug 05, 2022 at 03:57:45PM +0800, Sam Li wrote:
> Use sysfs attribute files to get the long value of zoned device
> information.
>
> Signed-off-by: Sam Li
> Reviewed-by: Hannes Reinecke
> ---
> block/file-posix.c | 37 +++--
> 1 file changed, 23
On 8/8/22 14:43, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
It is an initial model to start QOMification of the PPC405 board.
QOM'ified devices will be reintroduced one by one. Start with the
memory regions, which name prefix is changed to "ppc405".
Also, initialize only
On 8/8/22 14:25, BALATON Zoltan wrote:
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
It doesn't belong to the generic machine nor the SoC.
Signed-off-by: Cédric Le Goater
---
hw/ppc/ppc405_boards.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git
On Mon, 8 Aug 2022, Cédric Le Goater wrote:
The Device Control Registers (DCR) of on-SoC devices are accessed by
software through the use of the mtdcr and mfdcr instructions. These
are converted in transactions on a side band bus, the DCR bus, which
connects the on-SoC devices to the CPU.
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