Re: [PATCH] intel-iommu: Document iova_tree

On Thu, Dec 01, 2022 at 02:22:27PM -0500, Peter Xu wrote: > On Thu, Dec 01, 2022 at 07:17:41PM +0100, Eric Auger wrote: > > Hi Peter > > Hi, Eric, > > > > > On 12/1/22 17:25, Peter Xu wrote: > > > It seems not super clear on when iova_tree is used, and why. Add a rich > > > comment above iova_t

Re: Plugin Memory Callback Debugging

Aaron Lindsay writes: > On Nov 22 10:57, Aaron Lindsay wrote: >> On Nov 21 18:22, Richard Henderson wrote: >> > On 11/21/22 13:51, Alex Bennée wrote: >> > > >> > > Aaron Lindsay writes: >> > > >> > > > On Nov 15 22:36, Alex Bennée wrote: >> > > > > Aaron Lindsay writes: >> > > > > > I belie

Re: [PATCH] intel-iommu: Document iova_tree

On Thu, Dec 01, 2022 at 07:17:41PM +0100, Eric Auger wrote: > Hi Peter Hi, Eric, > > On 12/1/22 17:25, Peter Xu wrote: > > It seems not super clear on when iova_tree is used, and why. Add a rich > > comment above iova_tree to track why we needed the iova_tree, and when we > > need it. > > > > S

Re: [PATCH 24/26] tcg: Introduce tcg_temp_ebb_new_*

Richard Henderson writes: > On 11/30/22 10:07, Ilya Leoshkevich wrote: >> Reviewed-by: Ilya Leoshkevich >> While not directly related to this patch, it would be good to update >> tcg/README with all the new kinds of temporaries. E.g. the EBB ones are >> not mentioned there: >> TCG instruc

Re: [PATCH] .gitlab/issue_templates: Move suggestions into comments

Thomas Huth writes: > Many users forget to remove the suggestions from the bug template > when creating a new issue. So when searching for strings like "s390x" > or "Windows", you get a lot of unrelated issues in the results. > Thus let's move the suggestions into HTML comments - so they will >

[PATCH v2 for-8.0] target/s390x/tcg: Fix and improve the SACF instruction

The SET ADDRESS SPACE CONTROL FAST instruction is not privileged, it can be used from problem space, too. Just the switching to the home address space is privileged and should still generate a privilege exception. This bug is e.g. causing programs like Java that use the "getcpu" vdso kernel functio

Re: [PATCH 3/9] ui: Drop disabled code for SPICE_CHANNEL_WEBDAV

On Thu, Dec 01, 2022 at 04:49:25PM +0100, Markus Armbruster wrote: > Daniel P. Berrangé writes: > > > On Thu, Dec 01, 2022 at 01:39:13PM +0100, Markus Armbruster wrote: > >> Daniel P. Berrangé writes: > >> > >> > On Thu, Dec 01, 2022 at 07:13:05AM +0100, Markus Armbruster wrote: > >> >> HMP "in

Re: [PATCH for-8.0] target/s390x/tcg: Fix and improve the SACF instruction

On 01/12/2022 19.27, Thomas Huth wrote: The SET ADDRESS SPACE CONTROL FAST code has a couple of issues: 1) The instruction is not privileged, it can be used from problem space, too. Just the switching to the home address space is privileged and should still generate a privilege exception. This b

[PATCH for-8.0] target/s390x/tcg: Fix and improve the SACF instruction

The SET ADDRESS SPACE CONTROL FAST code has a couple of issues: 1) The instruction is not privileged, it can be used from problem space, too. Just the switching to the home address space is privileged and should still generate a privilege exception. This bug is e.g. causing programs like Java that

Re: [PATCH] intel-iommu: Document iova_tree

Hi Peter On 12/1/22 17:25, Peter Xu wrote: > It seems not super clear on when iova_tree is used, and why. Add a rich > comment above iova_tree to track why we needed the iova_tree, and when we > need it. > > Suggested-by: Jason Wang > Signed-off-by: Peter Xu > --- > include/hw/i386/intel_iommu

Re: [PATCH v4 4/5] hw/virtio: generalise CHR_EVENT_CLOSED handling

Stefan Hajnoczi writes: > [[PGP Signed Part:Undecided]] > On Wed, Nov 30, 2022 at 11:24:38AM +, Alex Bennée wrote: >> ..and use for both virtio-user-blk and virtio-user-gpio. This avoids >> the circular close by deferring shutdown due to disconnection until a >> later point. > > I thought r

[PULL for-7.2 4/5] hw/nvme: fix aio cancel in dsm

From: Klaus Jensen When the DSM operation is cancelled asynchronously, we set iocb->ret to -ECANCELED. However, the callback function only checks the return value of the completed aio, which may have completed succesfully prior to the cancellation and thus the callback ends up continuing the dsm

[PULL for-7.2 0/5] hw/nvme fixes

From: Klaus Jensen Hi, The following changes since commit c4ffd91aba1c3d878e99a3e7ba8aad4826728ece: Update VERSION for v7.2.0-rc3 (2022-11-29 18:15:26 -0500) are available in the Git repository at: git://git.infradead.org/qemu-nvme.git tags/nvme-next-pull-request for you to fetch changes

[PULL for-7.2 5/5] hw/nvme: remove copy bh scheduling

From: Klaus Jensen Fix a potential use-after-free by removing the bottom half and enqueuing the completion directly. Fixes: 796d20681d9b ("hw/nvme: reimplement the copy command to allow aio cancellation") Reviewed-by: Keith Busch Signed-off-by: Klaus Jensen --- hw/nvme/ctrl.c | 63 ++

[PULL for-7.2 3/5] hw/nvme: fix aio cancel in zone reset

From: Klaus Jensen If the zone reset operation is cancelled but the block unmap operation completes normally, the callback will continue resetting the next zone since it neglects to check iocb->ret which will have been set to -ECANCELED. Make sure that this is checked and bail out if an error is

[PULL for-7.2 2/5] hw/nvme: fix aio cancel in flush

From: Klaus Jensen Make sure that iocb->aiocb is NULL'ed when cancelling. Fix a potential use-after-free by removing the bottom half and enqueuing the completion directly. Fixes: 38f4ac65ac88 ("hw/nvme: reimplement flush to allow cancellation") Reviewed-by: Keith Busch Signed-off-by: Klaus Jen

[PULL for-7.2 1/5] hw/nvme: fix aio cancel in format

From: Klaus Jensen There are several bugs in the async cancel code for the Format command. Firstly, cancelling a format operation neglects to set iocb->ret as well as clearing the iocb->aiocb after cancelling the underlying aiocb which causes the aio callback to ignore the cancellation. Trivial

Re: [PATCH v2] target/arm: align exposed ID registers with Linux

On Tue, 22 Nov 2022 at 23:25, Zhuojia Shen wrote: > > In CPUID registers exposed to userspace, some registers were missing > and some fields were not exposed. This patch aligns exposed ID > registers and their fields with what the upstream kernel currently > exposes. Thanks; I've applied this to

[PATCH] intel-iommu: Document iova_tree

It seems not super clear on when iova_tree is used, and why. Add a rich comment above iova_tree to track why we needed the iova_tree, and when we need it. Suggested-by: Jason Wang Signed-off-by: Peter Xu --- include/hw/i386/intel_iommu.h | 30 +- 1 file changed, 29

Re: [PATCH] .gitlab/issue_templates: Move suggestions into comments

On 12/1/22 05:37, Thomas Huth wrote: Many users forget to remove the suggestions from the bug template when creating a new issue. So when searching for strings like "s390x" or "Windows", you get a lot of unrelated issues in the results. Thus let's move the suggestions into HTML comments - so they

Re: [PATCH 2/3] intel-iommu: fail DEVIOTLB_UNMAP without dt mode

On Tue, Nov 29, 2022 at 04:10:36PM +0800, Jason Wang wrote: > Without dt mode, device IOTLB notifier won't work since guest won't > send device IOTLB invalidation descriptor in this case. Let's fail > early instead of misbehaving silently. > > Signed-off-by: Jason Wang > --- > hw/i386/intel_iomm

Re: [PATCH 3/9] ui: Drop disabled code for SPICE_CHANNEL_WEBDAV

Daniel P. Berrangé writes: > On Thu, Dec 01, 2022 at 01:39:13PM +0100, Markus Armbruster wrote: >> Daniel P. Berrangé writes: >> >> > On Thu, Dec 01, 2022 at 07:13:05AM +0100, Markus Armbruster wrote: >> >> HMP "info spice" has a bit of code to show channel type >> >> SPICE_CHANNEL_WEBDAV as "w

[PATCH qemu.git v3 1/8] hw/timer/imx_epit: improve comments

From: Axel Heider Fix typos, add background information Signed-off-by: Axel Heider --- hw/timer/imx_epit.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index ec0fa440d7..2841fbaa1c 100644 --- a/hw/timer/imx_

[PATCH qemu.git v3 6/8] hw/timer/imx_epit: factor out register write handlers

From: Axel Heider Signed-off-by: Axel Heider --- hw/timer/imx_epit.c | 207 1 file changed, 113 insertions(+), 94 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 39f47222d0..e04427542f 100644 --- a/hw/timer/imx_epit.c +++ b

[PATCH qemu.git v3 7/8] hw/timer/imx_epit: remove explicit fields cnt and freq

From: Axel Heider The CNT register is a read-only register. There is no need to store it's value, it can be calculated on demand. The calculated frequency is needed temporarily only. Note that this is a migration compatibility break for all boards types that use the EPIT peripheral. Signed-off-

[PATCH qemu.git v3 2/8] hw/timer/imx_epit: cleanup CR defines

From: Axel Heider remove unused defines, add needed defines Signed-off-by: Axel Heider --- hw/timer/imx_epit.c | 4 ++-- include/hw/timer/imx_epit.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 2841fbaa1c..661e

[PATCH qemu.git v3 3/8] hw/timer/imx_epit: define SR_OCIF

From: Axel Heider --- hw/timer/imx_epit.c | 12 ++-- include/hw/timer/imx_epit.h | 2 ++ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 661e9158e3..f148868b8c 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit

[PATCH qemu.git v3 5/8] hw/timer/imx_epit: hard reset initializes CR with 0

From: Axel Heider Signed-off-by: Axel Heider --- hw/timer/imx_epit.c | 20 ++-- 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 7af3a8b10e..39f47222d0 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -99

[PATCH qemu.git v3 8/8] hw/timer/imx_epit: fix compare timer handling

From: Axel Heider - fix #1263 for CR writes - rework compare time handling - The compare timer has to run even if CR.OCIEN is not set, as SR.OCIF must be updated. - The compare timer fires exactly once when the compare value is less than the current value, but the reload values is

[PATCH qemu.git v3 4/8] hw/timer/imx_epit: update interrupt state on CR write access

From: Axel Heider The interrupt state can change due to: - reset clears both SR.OCIF and CR.OCIE - write to CR.EN or CR.OCIE Signed-off-by: Axel Heider --- hw/timer/imx_epit.c | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/i

Re: [PATCH-for-8.0 1/2] target/s390x: Replace TCGv by TCGv_i64 in op_mov2e()

On 1/12/22 13:36, Ilya Leoshkevich wrote: On Wed, 2022-11-30 at 17:34 +0100, Philippe Mathieu-Daudé wrote: Although TCGv is defined as TCGv_i64 on s390x, make it clear tcg_temp_new_i64() returns a TCGv_i64. Signed-off-by: Philippe Mathieu-Daudé ---  target/s390x/tcg/translate.c | 2 +-  1 fil

Re: [PATCH] blockdev: add 'media=cdrom' argument to support usb cdrom emulated as cdrom

luzhipeng writes: > From: zhipeng Lu > > The drive interface supports media=cdrom so that the usb cdrom > can be emulated as cdrom in qemu, but libvirt deprived the drive > interface, so media=cdrom is added to the blockdev interface to > support usb cdrom emulated as cdrom > > Signed-off-by: zh

Re: [PATCH 3/3] intel-iommu: build iova tree during IOMMU translation

On Thu, Dec 01, 2022 at 04:35:48PM +0800, Jason Wang wrote: > On Wed, Nov 30, 2022 at 11:17 PM Peter Xu wrote: > > > > On Wed, Nov 30, 2022 at 02:33:51PM +0800, Jason Wang wrote: > > > On Tue, Nov 29, 2022 at 11:57 PM Peter Xu wrote: > > > > > > > > On Tue, Nov 29, 2022 at 04:10:37PM +0800, Jason

Re: [PATCH v3] riscv: Allow user to set the satp mode

On Thu, Dec 01, 2022 at 10:36:23AM +0100, Alexandre Ghiti wrote: > RISC-V specifies multiple sizes for addressable memory and Linux probes for > the machine's support at startup via the satp CSR register (done in > csr.c:validate_vm). > > As per the specification, sv64 must support sv57, which in

Re: [PATCH 3/9] ui: Drop disabled code for SPICE_CHANNEL_WEBDAV

On Thu, Dec 01, 2022 at 01:39:13PM +0100, Markus Armbruster wrote: > Daniel P. Berrangé writes: > > > On Thu, Dec 01, 2022 at 07:13:05AM +0100, Markus Armbruster wrote: > >> HMP "info spice" has a bit of code to show channel type > >> SPICE_CHANNEL_WEBDAV as "webdav", disabled since commit 7c6044

[PATCH qemu.git v2 1/1] hw/arm/virt: make second UART available

From: Axel Heider The first UART always always exists. If the security extensions are enabled, the second UART also always exists. Otherwise, it only exists if a backend is configured explicitly via '-serial ', where 'null' creates a dummy backend. This allows enabling the second UART explicitly

[PATCH qemu.git v2 0/1] hw/arm/virt: make second UART available

This is a follow-up on older attempts to make a second UART available for the arm-virt machine in normal world. The use case is, that this give a simple I/O channel in addition to stdout, as this simplifies various test scenarios. Especially for non-Linux operating systems (e.g. seL4) where arm-vir

Re: [PATCH v2 7/7] accel/tcg: Move remainder of page locking to tb-maint.c

Richard Henderson writes: > The only thing that still touches PageDesc in translate-all.c > are some locking routines related to tb-maint.c which have not > yet been moved. Do so now. > > Move some code up in tb-maint.c as well, to untangle the maze > of ifdefs, and allow a sensible final orde

[PATCH 07/15] hw/intc: sifive_plic: Improve robustness of the PLIC config parser

At present the PLIC config parser can only handle legal config string like "MS,MS". However if a config string like ",MS,MS,,MS,MS,," is given the parser won't get the correct configuration. This commit improves the config parser to make it more robust. Signed-off-by: Bin Meng --- hw/intc/sifi

[PATCH 04/15] hw/riscv: Sort machines Kconfig options in alphabetical order

SHAKTI_C machine Kconfig option was inserted in disorder. Fix it. Signed-off-by: Bin Meng --- hw/riscv/Kconfig | 16 +--- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index 1e4b58024f..4550b3b938 100644 --- a/hw/riscv/Kconfig +++

[PATCH 06/15] hw/intc: sifive_plic: Drop PLICMode_H

H-mode has been removed since priv spec 1.10. Drop it. Signed-off-by: Bin Meng --- include/hw/intc/sifive_plic.h | 1 - hw/intc/sifive_plic.c | 1 - 2 files changed, 2 deletions(-) diff --git a/include/hw/intc/sifive_plic.h b/include/hw/intc/sifive_plic.h index 134cf39a96..d3f45ec248 1

[PATCH 05/15] hw/riscv: spike: Remove misleading comments

PLIC is not included in the 'spike' machine. Signed-off-by: Bin Meng --- hw/riscv/spike.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 1e1d752c00..13946acf0d 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -8,7 +8,6 @@ * * 0) HTIF Cons

[PATCH 13/15] hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0

At present the SiFive PLIC model "priority-base" expects interrupt priority register base starting from source 1 instead source 0, that's why on most platforms "priority-base" is set to 0x04 except 'opentitan' machine. 'opentitan' should have set "priority-base" to 0x04 too. Note the irq number ca

[PATCH 01/15] hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLIC

hw/pci/Kconfig says MSI_NONBROKEN should be selected by interrupt controllers regardless of how MSI is implemented. msi_nonbroken is initialized to true in sifive_plic_realize(). Let SIFIVE_PLIC select MSI_NONBROKEN and drop the selection from RISC-V machines. Signed-off-by: Bin Meng --- hw/in

[PATCH 02/15] hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt controllers

hw/pci/Kconfig says MSI_NONBROKEN should be selected by interrupt controllers regardless of how MSI is implemented. msi_nonbroken is initialized to true in both riscv_aplic_realize() and riscv_imsic_realize(). Select MSI_NONBROKEN in RISCV_APLIC and RISCV_IMSIC. Signed-off-by: Bin Meng --- hw/

[PATCH 11/15] hw/riscv: sifive_u: Avoid using magic number for "riscv, ndev"

At present magic number is used to create "riscv,ndev" property in the dtb. Let's use the macro SIFIVE_U_PLIC_NUM_SOURCES that is used to instantiate the PLIC model instead. Signed-off-by: Bin Meng --- hw/riscv/sifive_u.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/

[PATCH 03/15] hw/riscv: Fix opentitan dependency to SIFIVE_PLIC

Since commit ef6310064820 ("hw/riscv: opentitan: Update to the latest build") the IBEX PLIC model was replaced with the SiFive PLIC model in the 'opentitan' machine but we forgot the add the dependency there. Signed-off-by: Bin Meng --- hw/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) di

[PATCH 10/15] hw/riscv: sifive_e: Fix the number of interrupt sources of PLIC

Per chapter 10 in Freedom E310 manuals [1][2][3], E310 G002 and G003 supports 52 interrupt sources while G000 supports 51 interrupt sources. We use the value of G002 and G003, so it is 53 (including source 0). [1] G000 manual: https://sifive.cdn.prismic.io/sifive/4faf3e34-4a42-4c2f-be9e-c77baa492

[PATCH 12/15] hw/riscv: virt: Fix the value of "riscv, ndev" in the dtb

Commit 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine") changed the value of VIRT_IRQCHIP_NUM_SOURCES from 127 to 53, which is VIRTIO_NDEV and also used as the value of "riscv,ndev" property in the dtb. Unfortunately this is wrong as VIRT_IRQCHIP_NUM_SOURCES should i

[PATCH 08/15] hw/intc: sifive_plic: Update "num-sources" property default value

At present the default value of "num-sources" property is zero, which does not make a lot of sense, as in sifive_plic_realize() we see s->bitfield_words is calculated by: s->bitfield_words = (s->num_sources + 31) >> 5; if the we don't configure "num-sources" property its default value zero make

[PATCH 09/15] hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC

Per chapter 6.5.2 in [1], the number of interupt sources including interrupt source 0 should be 187. [1] PolarFire SoC MSS TRM: https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/ReferenceManuals/PolarFire_SoC_FPGA_MSS_Technical_Reference_Manual_VC.pdf Fixes: 56f6e31

[PATCH 14/15] hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization

"hartid-base" and "priority-base" are zero by default. There is no need to initialize them to zero again. Signed-off-by: Bin Meng --- hw/riscv/opentitan.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index be7ff1eea0..da73aa51f5 100644 --- a/h

[PATCH 15/15] hw/intc: sifive_plic: Fix the pending register range check

The pending register upper limit is currently set to plic->num_sources >> 3, which is wrong, e.g.: considering plic->num_sources is 7, the upper limit becomes 0 which fails the range check if reading the pending register at pending_base. Fixes: 1e24429e40df ("SiFive RISC-V PLIC Block") Signed-off-

Re: [PATCH v7 00/14] Still more coroutine and various fixes in block layer

Am 28.11.2022 um 15:23 hat Emanuele Giuseppe Esposito geschrieben: > This is a dump of all minor coroutine-related fixes found while looking > around and testing various things in the QEMU block layer. > > Patches aim to: > - add missing coroutine_fn annotation to the functions > - simplify to avo

Re: cortex-a55/a75/a76 MPIDR_EL1 specifica

More like the opposite - proprietary software which does not yet have proper support for MT CPUs worked fine on QEMU but failed on hardware - so discrepancy was found. This does not block anything right now, the question is more how closely qemu should follow hardware which it emulates... BR Timof

[PATCH] blockdev: add 'media=cdrom' argument to support usb cdrom emulated as cdrom

From: zhipeng Lu The drive interface supports media=cdrom so that the usb cdrom can be emulated as cdrom in qemu, but libvirt deprived the drive interface, so media=cdrom is added to the blockdev interface to support usb cdrom emulated as cdrom Signed-off-by: zhipeng Lu --- block.c

[PATCH] .gitlab/issue_templates: Move suggestions into comments

Many users forget to remove the suggestions from the bug template when creating a new issue. So when searching for strings like "s390x" or "Windows", you get a lot of unrelated issues in the results. Thus let's move the suggestions into HTML comments - so they will still show up in the markdown whe

Re: cortex-a55/a75/a76 MPIDR_EL1 specifica

On Thu, 1 Dec 2022 at 10:55, Timofey Kutergin wrote: > After submitting a patch for cortex-a55 support and trying > to run SMP on odroid-c4 I have found concern about mpidr_el1 register. > > cortex-a55 (and also a75/76/78) seem to be considered SMT CPUs > with single SMT thread. As a result, they

Re: [PATCH v12 0/7] s390x: CPU Topology

On 12/1/22 09:45, Cédric Le Goater wrote: Hello Pierre On 11/29/22 18:41, Pierre Morel wrote: Hi, The implementation of the CPU Topology in QEMU has been modified since the last patch series. - The two preliminary patches have been accepted and are no longer    part of this series. - The

Re: [PATCH 1/3] block: mention 'password-secret' option for -iscsi

Daniel P. Berrangé writes: > The 'password-secret' option was added > > commit b189346eb1784df95ed6fed610411dbf23d19e1f > Author: Daniel P. Berrangé > Date: Thu Jan 21 14:19:21 2016 + > > iscsi: add support for getting CHAP password via QCryptoSecret API > > but was not mentioned

Re: regression: insmod module failed in VM with nvdimm on

On Thu, 1 Dec 2022 at 13:07, chenxiang (M) wrote: > > > > 在 2022/12/1 19:07, Ard Biesheuvel 写道: > > On Thu, 1 Dec 2022 at 09:07, Ard Biesheuvel wrote: > >> On Thu, 1 Dec 2022 at 08:15, chenxiang (M) > >> wrote: > >>> Hi Ard, > >>> > >>> > >>> 在 2022/11/30 16:18, Ard Biesheuvel 写道: > On Wed

Re: [PATCH] MAINTAINERS: Inherit from nanoMIPS

On 1/12/22 11:24, Markus Armbruster wrote: Milica Lazarevic writes: Hi, Stefan is no longer working with us, but I will be more than happy to take maintaining the nanoMIPS ISA on me! Regards, Milica Any comments on this? Suggest you post a patch to update MAINTAINERS, with a suitable cc:.

Re: [PATCH 3/9] ui: Drop disabled code for SPICE_CHANNEL_WEBDAV

Daniel P. Berrangé writes: > On Thu, Dec 01, 2022 at 07:13:05AM +0100, Markus Armbruster wrote: >> HMP "info spice" has a bit of code to show channel type >> SPICE_CHANNEL_WEBDAV as "webdav", disabled since commit 7c6044a94e >> "hmp: info spice: take out webdav" (v2.3.0), because it compiles only

Re: [PATCH-for-8.0 1/2] target/s390x: Replace TCGv by TCGv_i64 in op_mov2e()

On Wed, 2022-11-30 at 17:34 +0100, Philippe Mathieu-Daudé wrote: > Although TCGv is defined as TCGv_i64 on s390x, > make it clear tcg_temp_new_i64() returns a TCGv_i64. > > Signed-off-by: Philippe Mathieu-Daudé > --- >  target/s390x/tcg/translate.c | 2 +- >  1 file changed, 1 insertion(+), 1 dele

Re: [PATCH for-7.2] vhost: enable vrings in vhost_dev_start() for vhost-user devices

"Michael S. Tsirkin" writes: > On Thu, Dec 01, 2022 at 10:14:39AM +, Alex Bennée wrote: >> Do you think rust-vmm's vhost crates have enough of the state >> management to manage vhost and vhost-user backends? Maybe it would be a >> good experiment in replacing a (small well defined) piece of

Re: [PATCH 2/3] block: deprecate iSCSI 'password' in favour of 'password-secret'

Daniel P. Berrangé writes: > Support for referencing secret objects was added in > > commit b189346eb1784df95ed6fed610411dbf23d19e1f > Author: Daniel P. Berrangé > Date: Thu Jan 21 14:19:21 2016 + > > iscsi: add support for getting CHAP password via QCryptoSecret API > > The exis

Re: [PATCH 3/3] ui: remove deprecated 'password' option for SPICE

Daniel P. Berrangé writes: > This has been replaced by the 'password-secret' option, > which references a 'secret' object instance. > > Signed-off-by: Daniel P. Berrangé > --- > docs/about/deprecated.rst | 8 > docs/about/removed-features.rst | 7 +++ > qemu-options.hx

[PATCH v2 06/13] pci: Deduplicate get_class_desc()

pcibus_dev_print() contains a copy of get_class_desc(). Call the function instead. Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin --- hw/pci/pci.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 81ffc74925..6711a7

[PATCH v2 09/13] pci: Move HMP command from hw/pci/pcie_aer.c to pci-hmp-cmds.c

Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé --- hw/pci/pci-internal.h | 4 ++ include/monitor/hmp.h | 1 + include/sysemu/sysemu.h | 3 -- hw/pci/pci-hmp-cmds.c | 104 hw/pci/pci-stub.c

[PATCH v2 05/13] pci: Build hw/pci/pci-hmp-cmds.c only when CONFIG_PCI

We compile pci-hmp-cmds.c always, but pci-qmp-cmds.c only when CONFIG_PCI. hw/pci/pci-stub.c keeps the linker happy when !CONFIG_PCI. Build pci-hmp-cmds.c that way, too. Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin --- hw/pci/pci-stub.c | 5 + hw/pci/meson.build | 2 +

[PATCH v2 13/13] pci: Reject pcie_aer_inject_error -c with symbolic error status

When argument @error_status is symbolic, flag -c is ignored. Reject it instead. Signed-off-by: Markus Armbruster --- hw/pci/pci-hmp-cmds.c | 5 + 1 file changed, 5 insertions(+) diff --git a/hw/pci/pci-hmp-cmds.c b/hw/pci/pci-hmp-cmds.c index 7a3175ab4b..043b0a601d 100644 --- a/hw/pci/pci-

[PATCH v2 12/13] pci: Improve do_pcie_aer_inject_error()'s error messages

Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Dr. David Alan Gilbert --- hw/pci/pci-hmp-cmds.c | 30 +++--- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/hw/pci/pci-hmp-cmds.c b/hw/pci/pci-hmp-cmds.c index 2dd65ca6ee..7a3

[PATCH v2 02/13] pci: Move QMP commands to new hw/pci/pci-qmp-cmds.c

Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin --- hw/pci/pci-internal.h | 20 + hw/pci/pci-qmp-cmds.c | 201 ++ hw/pci/pci.c | 188 +-- hw/pci/meson.build| 1 + 4 files changed, 226

[PATCH v2 03/13] pci: Move HMP commands from monitor/ to new hw/pci/pci-hmp-cmds.c

This moves these commands from MAINTAINERS section "Human Monitor (HMP)" to "PCI". Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Dr. David Alan Gilbert --- hw/pci/pci-hmp-cmds.c | 126 +

[PATCH v2 08/13] pci: Fix silent truncation of pcie_aer_inject_error argument

PCI AER error status is 32 bit. The HMP command supports both symbolic and numeric error status: anything that isn't a known symbolic value is parsed as number with strtol(). Issues: * Empty argument yields value zero. * Range errors from strtol() are ignored, value is UINT32_MAX. * Values not

[PATCH v2 10/13] pci: Inline do_pcie_aer_inject_error() into its only caller

Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Dr. David Alan Gilbert --- hw/pci/pci-hmp-cmds.c | 41 ++--- 1 file changed, 6 insertions(+), 35 deletions(-) diff --git a/hw/pci/pci-hmp-cmds.c b/hw/pci/pci-hmp-cmds.c index ae75b

[PATCH v2 07/13] pci: Move pcibus_dev_print() to pci-hmp-cmds.c

This method is for HMP command "info qtree". Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé --- hw/pci/pci-internal.h | 1 + hw/pci/pci-hmp-cmds.c | 38 ++ hw/pci/pci.c | 38

[PATCH v2 11/13] pci: Rename hmp_pcie_aer_inject_error()'s local variable @err

I'd like to use @err for an Error *err. Rename PCIEAERErr err to aer_err. Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé --- hw/pci/pci-hmp-cmds.c | 34 +- 1 file changed, 17 insertions(+), 17 deletions(-)

[PATCH v2 00/13] pci: Move and clean up monitor command code

This is mainly about splitting off monitor-related code. There's also a few UI fixes to HMP command pcie_aer_inject_error. v2: * PATCH 08: Use qemu_strtoui() [David], commit message corrected * PATCH 13: New Markus Armbruster (13): pci: Clean up a few things checkpatch.pl would flag later on

[PATCH v2 01/13] pci: Clean up a few things checkpatch.pl would flag later on

Fix a few style violations so that checkpatch.pl won't complain when I move this code. Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé --- hw/pci/pci.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/pci/pci.c

[PATCH v2 04/13] pci: Make query-pci stub consistent with the real one

QMP query-pci and HMP info pci can behave differently when there are no PCI devices. They can report nothing, like this: qemu-system-aarch64 -S -M spitz -display none -monitor stdio QEMU 7.1.91 monitor - type 'help' for more information (qemu) info pci Or they can fail, like this:

Re: regression: insmod module failed in VM with nvdimm on

在 2022/12/1 19:07, Ard Biesheuvel 写道: On Thu, 1 Dec 2022 at 09:07, Ard Biesheuvel wrote: On Thu, 1 Dec 2022 at 08:15, chenxiang (M) wrote: Hi Ard, 在 2022/11/30 16:18, Ard Biesheuvel 写道: On Wed, 30 Nov 2022 at 08:53, Marc Zyngier wrote: On Wed, 30 Nov 2022 02:52:35 +, "chenxiang (M

Re: [PATCH for-8.0] hw/misc: Move some arm-related files from specific_ss into softmmu_ss

On Wed, 30 Nov 2022 at 11:16, Thomas Huth wrote: > > By removing #include "kvm-consts.h" from arm-powerctl.h (seems not to > be required there) and adjusting the header includes in some files, we > can move them from specific_ss into softmmu_ss, so that they only need > to be compiled once and not

Re: [PATCH v12 6/7] s390x/cpu_topology: activating CPU topology

On 12/1/22 11:15, Thomas Huth wrote: On 29/11/2022 18.42, Pierre Morel wrote: The KVM capability, KVM_CAP_S390_CPU_TOPOLOGY is used to activate the S390_FEAT_CONFIGURATION_TOPOLOGY feature and the topology facility for the guest in the case the topology is available in QEMU and in KVM. The f

Re: [PATCH] linux-user,bsd-user: re-exec with G_SLICE=always-malloc

Emilio Cota writes: > On Tue, Oct 04, 2022 at 13:00:47 +0100, Daniel P. Berrangé wrote: > (snip) >> Can't say I especially like this but I'm out of other ideas for how >> to guarantee a solution. Users can't set env vars prior to launching >> QEMU user emulators when using binfmt. > > An altern

Re: [PATCH] accel/kvm/kvm-all: Handle register access errors

On Thu, 1 Dec 2022 at 11:00, Akihiko Odaki wrote: > > On 2022/12/01 19:40, Peter Maydell wrote: > > On Thu, 1 Dec 2022 at 10:27, Akihiko Odaki wrote: > >> > >> A register access error typically means something seriously wrong > >> happened so that anything bad can happen after that and recovery i

Re: regression: insmod module failed in VM with nvdimm on

On Thu, 1 Dec 2022 at 09:07, Ard Biesheuvel wrote: > > On Thu, 1 Dec 2022 at 08:15, chenxiang (M) wrote: > > > > Hi Ard, > > > > > > 在 2022/11/30 16:18, Ard Biesheuvel 写道: > > > On Wed, 30 Nov 2022 at 08:53, Marc Zyngier wrote: > > >> On Wed, 30 Nov 2022 02:52:35 +, > > >> "chenxiang (M)" w

Re: [PATCH] tests/qtest/vhost-user-blk-test: don't abort all qtests on missing envar

On 25/11/2022 16.58, Christian Schoenebeck wrote: This test requires environment variable QTEST_QEMU_STORAGE_DAEMON_BINARY to be defined for running. If not, it would immediately abort all qtests and prevent other, unrelated tests from running. To fix that, just skip vhost-user-blk-test instead

Re: [PATCH] accel/kvm/kvm-all: Handle register access errors

On 2022/12/01 19:40, Peter Maydell wrote: On Thu, 1 Dec 2022 at 10:27, Akihiko Odaki wrote: A register access error typically means something seriously wrong happened so that anything bad can happen after that and recovery is impossible. Even failing one register access is catastorophic as arc

Re: [PATCH v2 1/1] tcg: convert tcg/README to rst

On 30/11/2022 22:12, Richard Henderson wrote: On 11/30/22 02:04, Mark Cave-Ayland wrote: +   * - eqv_i32/i64 *t0*, *t1*, *t2* + + - | *t0* = ~(*t1* ^ *t2*), or equivalently, *t0* = *t1* & ~\ *t2*  t1 ^ ~t2 The only typo I saw, fixed while queuing. Ooops! Thanks for spotting and fixing

Re: [PATCH v2 1/1] tcg: convert tcg/README to rst

On 30/11/2022 18:52, Fabiano Rosas wrote: Mark Cave-Ayland writes: Convert tcg/README to rst and move it to docs/devel as a new "TCG Intermediate Representation" page. There are a few minor changes to improve the aesthetic of the final output which are as follows: - Rename the title from

Re: [PATCH] accel/kvm/kvm-all: Handle register access errors

On Thu, 1 Dec 2022 at 10:27, Akihiko Odaki wrote: > > A register access error typically means something seriously wrong > happened so that anything bad can happen after that and recovery is > impossible. > Even failing one register access is catastorophic as > architecture-specific code are not wr

Re: [PATCH for-7.2] vhost: enable vrings in vhost_dev_start() for vhost-user devices

On Thu, Dec 01, 2022 at 10:14:39AM +, Alex Bennée wrote: > Do you think rust-vmm's vhost crates have enough of the state > management to manage vhost and vhost-user backends? Maybe it would be a > good experiment in replacing a (small well defined) piece of > functionality with rust? > > That

[PATCH] target/arm: Propagate errno when writing list

Before this change, write_kvmstate_to_list() and write_list_to_kvmstate() tolerated even if it failed to access some register, and returned a bool indicating whether one of the register accesses failed. However, it does not make sen not to fail early as the the callers check the returned value and

Re: [PATCH qemu.git 0/1] hw/arm/virt: add 2x sp804 timer

On Wed, 30 Nov 2022 at 18:56, ~axelheider wrote: > > This patch adds timer peripherals to the arm-virt machine. The > use case is, that this machine is quite useful for testing purposes > when it comes to non-Linux operating system (seL4 in our case). > However, is currently lacks a dedicates time

[PATCH] accel/kvm/kvm-all: Handle register access errors

A register access error typically means something seriously wrong happened so that anything bad can happen after that and recovery is impossible. Even failing one register access is catastorophic as architecture-specific code are not written so that it torelates such failures. Make sure the VM sto

Re: [PATCH 7/9] ui: Improve "change vnc" error reporting

Daniel P. Berrangé writes: > On Thu, Dec 01, 2022 at 07:13:09AM +0100, Markus Armbruster wrote: >> Switch from monitor_printf() to error_setg() and hmp_handle_error(). >> This makes "this is an error" more obvious both in the source and in >> the monitor, where hmp_handle_error() prefixes the mes

Re: [PATCH 6/9] ui: Move HMP commands from monitor to new ui/ui-hmp-cmds.c

Philippe Mathieu-Daudé writes: > On 1/12/22 07:13, Markus Armbruster wrote: >> This moves these commands from MAINTAINERS section "Human >> Monitor (HMP)" to "Graphics". >> Signed-off-by: Markus Armbruster >> --- >> monitor/hmp-cmds.c | 342 -- >> ui/ui

Re: [PATCH 3/9] ui: Drop disabled code for SPICE_CHANNEL_WEBDAV

Daniel P. Berrangé writes: > On Thu, Dec 01, 2022 at 07:13:05AM +0100, Markus Armbruster wrote: >> HMP "info spice" has a bit of code to show channel type >> SPICE_CHANNEL_WEBDAV as "webdav", disabled since commit 7c6044a94e >> "hmp: info spice: take out webdav" (v2.3.0), because it compiles only

Re: [PATCH] MAINTAINERS: Inherit from nanoMIPS

Milica Lazarevic writes: > Hi, > > Stefan is no longer working with us, but I will be more than happy to take > maintaining the nanoMIPS ISA on me! > > Regards, > Milica > Any comments on this? Suggest you post a patch to update MAINTAINERS, with a suitable cc:.

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