On 11/1/23 18:09, Daniel Henrique Barboza wrote:
Hi,
This is a follow-up of:
"[PATCH v5 00/11] riscv: OpenSBI boot test and cleanups"
Patches were based on top of riscv-to-apply.next [1] + the series above.
The recent FDT changes made in hw/riscv (all machines are now using the
FDT via
On 11/1/23 18:09, Daniel Henrique Barboza wrote:
All callers of riscv_load_fdt() are using machine->ram_size as
'mem_size' and the fdt is always retrievable via machine->fdt.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/boot.c| 4 +++-
hw/riscv/microchip_pfsoc.c | 4 ++--
On 11/1/23 18:21, Daniel Henrique Barboza wrote:
Follow the QEMU convention of naming MachineState pointers as 'ms' by
renaming the instance in create_fdt() where we're calling it 'mc'.
Cc: Paul Burton
Cc: Aleksandar Rikalo
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Daniel Henrique
On 11/1/23 21:02, Richard Henderson wrote:
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
+++ b/target/arm/cpu.h
@@ -26,6 +26,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qapi/qapi-types-common.h"
+#include "hw/arm/cpu.h"
I'm not a fan of this.
If you want a smaller
Het Gala writes:
> From: Author Het Gala
>
> Modified 'migrate-incoming' QAPI supports MigrateChannel parameters to prevent
> multi-level encodings of uri on the destination side.
>
> socket_start_incoming_migration() has been depricated as it's only purpose was
> uri parsing.
> Renamed
For loongarch virt machine, add powerdown notification callback
and send ACPI_POWER_DOWN_STATUS event by acpi ged. Also add
acpi dsdt table for ACPI_POWER_BUTTON_DEVICE device in this
patch.
Signed-off-by: Song Gao
---
hw/loongarch/acpi-build.c | 1 +
hw/loongarch/virt.c | 14
Hi,
VHOST_USER_PROTOCOL_F_STATUS is enabled by default (dpdk):
lib/vhost/vhost_user.h
17 #define VHOST_USER_PROTOCOL_FEATURES((1ULL << VHOST_USER_PROTOCOL_F_MQ)
| \
18 (1ULL << VHOST_USER_PROTOCOL_F_LOG_SHMFD) |\
19 (1ULL <<
John Snow writes:
> On Mon, Oct 10, 2022 at 4:52 AM Lev Kujawski wrote:
>>
>> Always use the native CHS device parameters for the ATA commands READ
>> NATIVE MAX ADDRESS and READ NATIVE MAX ADDRESS EXT, not those limited
>> by the ATA command INITIALIZE_DEVICE_PARAMETERS (introduced in patch
在 2022/12/28 上午11:07, Bibo Mao 写道:
In theory gsi base can start from 0 on loongarch virt machine,
however gsi base is hard-coded in linux kernel loongarch system,
else system fails to boot.
This patch renames macro PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE,
keeps value unchanged. GSI base is
Unify the two helper_set_pstate_{sm,za} in this function.
Do not call helper_* functions from svcr_write.
Cleans up linux-user usage by consolodating logic.
Cc: Fabiano Rosas
Signed-off-by: Richard Henderson
---
Fabiano, I expect this to replace much of your
[RFC PATCH v2 07/19] target/arm:
On 1/10/23 17:47, Ilya Leoshkevich wrote:
When exiting due to an exit() syscall, qemu-user calls
preexit_cleanup(), but this is currently not the case when exiting due
to a signal. This leads to various buffers not being flushed (e.g.,
for gprof, for gcov, and for the upcoming perf support).
On 1/10/23 09:39, Alex Bennée wrote:
From: Emilio Cota
Related: #1381
Signed-off-by: Emilio Cota
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:<20230108164731.61469-3-c...@braap.org>
Signed-off-by: Alex Bennée
---
accel/tcg/translator.c | 15 ++-
1 file changed, 10
On 1/9/23 14:42, Fabiano Rosas wrote:
+inline void assert_hflags_rebuild_correctly(CPUARMState *env)
+{
+#ifdef CONFIG_DEBUG_TCG
+CPUARMTBFlags c = env->hflags;
+CPUARMTBFlags r = rebuild_hflags_internal(env);
+
+if (unlikely(c.flags != r.flags || c.flags2 != r.flags2)) {
+
On 1/11/23 04:36, Fabiano Rosas wrote:
Nowadays for KVM is the 'virt' machine the only one we use?
Also sbsa-ref.
r~
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
default_reset_secondary() uses address_space_stl_notdirty(),
itself declared in "exec/cpu-all.h". Include this header in
order to avoid when refactoring headers:
../hw/arm/boot.c:281:5: error: implicit declaration of function
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
First we want to introduce a new "cpu.h" header in the "hw/arm/"
namespace;
Do we? Is that really the best name (not having seen its contents).
second we would like to get rid of '-I target/$ARCH/'
in the CPPFLAGS.
Use the full path to
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
+++ b/target/arm/cpu.h
@@ -26,6 +26,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
#include "qapi/qapi-types-common.h"
+#include "hw/arm/cpu.h"
I'm not a fan of this.
If you want a smaller version of cpu-qom.h here in target/arm/,
On 1/10/23 09:39, Alex Bennée wrote:
The main reason to do this is to document our O_BINARY implementation
decision somewhere. However I've also moved some of the implementation
details out of qemu-options and added links between the two. As a
bonus I've highlighted the scary warnings about host
On 1/11/23 00:39, Philippe Mathieu-Daudé wrote:
We are going to modify this code, fix its style first to avoid
the following checkpatch.pl violations:
ERROR: code indent should never use tabs
ERROR: space prohibited between function name and open parenthesis '('
Signed-off-by: Philippe
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
arm_ss[] units are built twice: once for 32-bit word size and
once for 64-bit. The following units don't require any word
size knowledge and can be moved to softmmu_ss[] (where they
are built once):
- smmu-common.c
- exynos4_boards.c
-
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
+#include "target/arm/cpu.h"
Just "cpu.h" in this file.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 1/10/23 09:39, Alex Bennée wrote:
From: Emilio Cota
Fixes this tsan crash, easy to reproduce with any large enough program:
$ tests/unit/test-qht
1..2
ThreadSanitizer: CHECK failed: sanitizer_deadlock_detector.h:67 "((n_all_locks_)) <
On 1/10/23 17:47, Ilya Leoshkevich wrote:
ginfo.h
@@ -0,0 +1,77 @@
+/*
+ * Debug information support.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef ACCEL_TCG_DEBUGINFO_H
+#define ACCEL_TCG_DEBUGINFO_H
+
+/*
+ * Debuginfo describing a certain address.
+ */
+struct
On 1/11/23 00:39, Philippe Mathieu-Daudé wrote:
The 'hwaddr' type is defined in "exec/hwaddr.h" as:
hwaddr is the type of a physical address
(its size can be different from 'target_ulong').
All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:
$ fgrep define
On 1/10/23 09:39, Alex Bennée wrote:
From: Emilio Cota
It is internal to TCG and therefore we know it does not
access guest memory.
Related: #1381
Signed-off-by: Emilio Cota
Message-Id: <20230108164731.61469-4-c...@braap.org>
Signed-off-by: Alex Bennée
---
tcg/tcg.c | 6 --
1 file
On 1/11/23 00:39, Philippe Mathieu-Daudé wrote:
Fix the following checkpatch.pl violation on lines using the
TARGET_FMT_plx definition to avoid:
WARNING: line over 80 characters
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/pflash_cfi01.c | 5 +++--
hw/char/digic-uart.c
On 1/10/23 09:38, Alex Bennée wrote:
I think this was because older Ubuntu's didn't alias clang to whatever
the latest version was. They do now so lets use that and not break.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/custom-runners/ubuntu-22.04-aarch64.yml | 2 +-
1 file changed, 1
On 1/10/23 08:43, Philippe Mathieu-Daudé wrote:
load_image_targphys(), declared in "hw/loader.h", returns a ssize_t.
Remove the 'target_long' type which size changes per target.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/digic_boards.c | 2 +-
1 file changed, 1 insertion(+), 1
On 1/10/23 09:39, Alex Bennée wrote:
From: Emilio Cota
Signed-off-by: Emilio Cota
Reviewed-by: Alex Bennée
Message-Id:<20230109224954.161672-4-c...@braap.org>
Signed-off-by: Alex Bennée
---
include/qemu/thread.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
Reviewed-by:
On 1/10/23 09:39, Alex Bennée wrote:
From: Emilio Cota
Fixes the appended use-after-free. The root cause is that
during tb invalidation we use CPU_FOREACH, and therefore
to safely free a vCPU we must wait for an RCU grace period
to elapse.
$ x86_64-linux-user/qemu-x86_64
On 1/10/23 09:39, Alex Bennée wrote:
This will be helpful in debugging problems with tracking SVE memory
accesses via the TCG plugins system.
Signed-off-by: Alex Bennée
Cc: Robert Henry
Cc: Aaron Lindsay
---
tests/tcg/aarch64/Makefile.softmmu-target | 7 +++
On Mon, Jan 2, 2023 at 9:55 PM Daniel Henrique Barboza
wrote:
>
> The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
> the same steps when '-kernel' is used:
>
> - execute load_kernel()
> - load init_rd()
> - write kernel_cmdline
>
> Let's fold everything inside
Am 10. Januar 2023 09:53:49 UTC schrieb Thomas Huth :
>The 'slew' tick policy is currently enforced to be only available on
>x86 via some "#ifdef TARGET_I386" statements in mc146818rtc.c. We
>want to get rid of those #ifdefs, so we need a different way of
>checking whether the policy is allowed
Am 10. Januar 2023 09:53:48 UTC schrieb Thomas Huth :
>These IRQ counting functions will soon be required in binaries that
>do not include the APIC code, too, so let's extract them into a
>separate file that can be linked independently of the APIC code.
>
>While we're at it, change the apic_*
Am 11. Januar 2023 17:08:28 UTC schrieb "Philippe Mathieu-Daudé"
:
>On 9/1/23 18:23, Bernhard Beschow wrote:
>> Aligns the code with PIIX3 such that PIIXState can be used in PIIX4,
>> too.
>>
>> Signed-off-by: Bernhard Beschow
>> Reviewed-by: Michael S. Tsirkin
>> Message-Id:
Ping! Hi, it's been more than a week since I submitted this patch. I
think it's a trivial patch. Maybe qemu trivial team could take a look.
Thanks,
Letu
To prevent getting stuck on waitpid() in case the target process does
not terminate on SIGTERM, poll on waitpid() for 10s and if the target
process has not changed state until then send a SIGKILL to it.
Signed-off-by: Stefan Berger
---
tests/qtest/libqtest.c | 18 +-
1 file
On Mon, Dec 12, 2022 at 01:59:16PM +0100, Paolo Bonzini wrote:
> Protect quiesce_counter and queued_requests with a QemuMutex, so that
> they are protected from concurrent access in the main thread (for example
> blk_root_drained_end() reached from bdrv_drain_all()) and in the iothread
> (where
On Wed, 2023-01-11 at 13:00 -0700, Alex Williamson wrote:
>
> Careful about making too many assumptions around PCI, it's clearly the
> most used but vfio is bus agnostic and we do have vfio-platform support
> as well as some weird s390 devices. There's nothing PCI specific about
> a level
On Wed, 11 Jan 2023 19:50:15 +
David Woodhouse wrote:
> On Wed, 2023-01-11 at 12:43 -0700, Alex Williamson wrote:
> > On Wed, 11 Jan 2023 19:08:44 +
> > David Woodhouse wrote:
> >
> > > On Wed, 2023-01-11 at 11:29 -0700, Alex Williamson wrote:
> > > >
> > > > Nice. IIRC, we ended
On Wed, 2023-01-11 at 12:43 -0700, Alex Williamson wrote:
> On Wed, 11 Jan 2023 19:08:44 +
> David Woodhouse wrote:
>
> > On Wed, 2023-01-11 at 11:29 -0700, Alex Williamson wrote:
> > >
> > > Nice. IIRC, we ended up with the hack solution we have today in vfio
> > > because there was too
On Tue, Jan 10, 2023 at 12:45 PM John Snow wrote:
>
> On Tue, Jan 10, 2023 at 2:05 AM Marc-André Lureau
> wrote:
> >
> > Hi John
> >
> > On Tue, Jan 10, 2023 at 1:06 AM John Snow wrote:
> > >
> > > On Mon, Jul 25, 2022 at 7:23 AM Marc-André Lureau
> > > wrote:
> > > >
> > > > Hi
> > > >
> > >
On Wed, 11 Jan 2023 19:08:44 +
David Woodhouse wrote:
> On Wed, 2023-01-11 at 11:29 -0700, Alex Williamson wrote:
> >
> > Nice. IIRC, we ended up with the hack solution we have today in vfio
> > because there was too much resistance to callbacks that were only
> > necessary for vfio in the
On Wed, 2023-01-11 at 11:29 -0700, Alex Williamson wrote:
>
> Nice. IIRC, we ended up with the hack solution we have today in vfio
> because there was too much resistance to callbacks that were only
> necessary for vfio in the past. Once we had KVM resampling support,
> it simply wasn't worth
On Wed, Jan 11, 2023 at 07:00:53PM +, Dr. David Alan Gilbert wrote:
> * Jiang Jiacheng via (qemu-devel@nongnu.org) wrote:
> > From: Zheng Chuan
> >
> > Report multiFd related thread pid to libvirt in order to
> > pin multiFd thread to different cpu.
>
> With multifd you may well want to pin
* Jiang Jiacheng via (qemu-devel@nongnu.org) wrote:
> From: Zheng Chuan
>
> Report multiFd related thread pid to libvirt in order to
> pin multiFd thread to different cpu.
With multifd you may well want to pin different multifd threads
to different cores; so you need to include the 'id' and
On Wed, 11 Jan 2023 16:58:37 +
David Woodhouse wrote:
> On Wed, 2023-01-11 at 11:25 -0500, Michael S. Tsirkin wrote:
> > On Wed, Jan 11, 2023 at 02:41:58PM +, David Woodhouse wrote:
> > > This allows drivers to register a callback on a qemu_irq, which is
> > > invoked when a
On Thu, 2023-01-05 at 15:53 +0100, Pierre Morel wrote:
> The maximum nested topology entries is used by the guest to know
> how many nested topology are available on the machine.
>
> Currently, SCLP READ SCP INFO reports MNEST = 0, which is the
> equivalent of reporting the default value of 2.
>
On Wed, Jan 11, 2023 at 02:24:37PM +, Jonathan Cameron wrote:
> Noticed as this prevents iASL disasembling the DSDT table.
>
> Signed-off-by: Jonathan Cameron
Reviewed-by: Ira Weiny
> ---
> hw/i386/acpi-build.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/hw/i386/acpi-build.c
Not against it if you want to keep exploring, but if so please avoid using
the priority field, also I'd hope the early vmsd will be saved within
qemu_savevm_state_setup() so maybe it can be another alternative to
save_setup().
Maybe it's still easier we keep going with the save_setup() and the
On Wed, Jan 11, 2023 at 02:24:35PM +, Jonathan Cameron wrote:
> From: Gregory Price
>
> Current code sets to STORAGE_EXPRESS and then overrides it.
>
> Signed-off-by: Gregory Price
> Reviewed-by: Davidlohr Bueso
Reviewed-by: Ira Weiny
> Signed-off-by: Jonathan Cameron
> ---
>
On Wed, Jan 11, 2023 at 02:24:34PM +, Jonathan Cameron wrote:
> Fix capitalization difference between struct name and typedef.
>
> Signed-off-by: Jonathan Cameron
Reviewed-by: Ira Weiny
> ---
> hw/pci-bridge/cxl_downstream.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
On Wed, Jan 11, 2023 at 02:24:33PM +, Jonathan Cameron wrote:
> msix_init_exclusive_bar() can fail, so if it does cleanup the address space.
>
> Signed-off-by: Jonathan Cameron
Reviewed-by: Ira Weiny
> ---
> hw/mem/cxl_type3.c | 12 ++--
> 1 file changed, 10 insertions(+), 2
On Wed, Jan 11, 2023 at 05:58:36PM +0100, David Hildenbrand wrote:
> On 11.01.23 17:35, Peter Xu wrote:
> > On Wed, Jan 11, 2023 at 02:48:09PM +0100, David Hildenbrand wrote:
> > > On 10.01.23 21:03, Peter Xu wrote:
> > > > On Tue, Jan 10, 2023 at 12:52:32PM +0100, David Hildenbrand wrote:
> > > >
There's no need to use a MachineState pointer and a fdt pointer now that
all RISC-V machines are using the FDT from the MachineState.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/numa.c | 8
hw/riscv/spike.c| 2 +-
hw/riscv/virt.c | 2 +-
Follow the QEMU convention of naming MachineState pointers as 'ms' by
renaming the instance in create_fdt() where we're calling it 'mc'.
Cc: Paul Burton
Cc: Aleksandar Rikalo
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Daniel Henrique Barboza
---
hw/mips/boston.c | 4 ++--
1 file
All callers of riscv_load_fdt() are using machine->ram_size as
'mem_size' and the fdt is always retrievable via machine->fdt.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/boot.c| 4 +++-
hw/riscv/microchip_pfsoc.c | 4 ++--
hw/riscv/sifive_u.c| 3 +--
hw/riscv/spike.c
'cmdline' isn't being used. Remove it.
A MachineState pointer is being retrieved via a MACHINE() macro calling
qdev_get_machine(). Use MACHINE(s) instead to avoid calling qdev().
'mem_size' is being set as machine->ram_size by the caller. Retrieve it
via ms->ram_size.
Cc: Palmer Dabbelt
There's no need to use a MachineState pointer and a fdt pointer now that
all RISC-V machines are using the FDT from the MachineState.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/numa.c | 6 +++---
hw/riscv/spike.c| 6 +++---
hw/riscv/virt.c | 18
On Tue, 2023-01-10 at 15:29 +0100, Thomas Huth wrote:
> On 05/01/2023 15.53, Pierre Morel wrote:
> > On interception of STSI(15.1.x) the System Information Block
> > (SYSIB) is built from the list of pre-ordered topology entries.
> >
> > Signed-off-by: Pierre Morel
> > ---
>
[...]
> > +void
create_fdt_socket_cpus() writes a different 'mmu-type' value if we're
running in 32 or 64 bits. However, the flag is being calculated during
virt_machine_init(), and is passed around in create_fdt(), then
create_fdt_socket(), and then finally create_fdt_socket_cpus(). None of
the intermediate
'mem_size' and 'cmdline' aren't being used. Remove them.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index a931ed05ab..89c99ec1af 100644
--- a/hw/riscv/virt.c
+++
We have a convention in other QEMU boards/archs to name MachineState
pointers as either 'machine' or 'ms'. MachineClass pointers are usually
called 'mc'.
The 'virt' RISC-V machine has a lot of instances where MachineState
pointers are named 'mc'. There is nothing wrong with that, but we gain
more
Follow the QEMU convention of naming MachineState pointers as 'ms' by
renaming the instances where we're calling it 'mc'.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/spike.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
riscv_socket_count() returns either ms->numa_state->num_nodes or 1
depending on NUMA support. In any case the value can be retrieved only
once and used in the rest of the function.
This will also alleviate the rename we're going to do next by reducing
the instances of MachineState 'mc' inside
'mem_size' and 'cmdline' are unused.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/spike.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index c517885e6e..4a66016d69 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -49,7
On 9/1/23 18:23, Bernhard Beschow wrote:
Aligns the code with PIIX3 such that PIIXState can be used in PIIX4,
too.
Signed-off-by: Bernhard Beschow
Reviewed-by: Michael S. Tsirkin
Message-Id: <20221022150508.26830-33-shen...@gmail.com>
---
hw/isa/piix4.c | 28 ++--
Hi,
This is a follow-up of:
"[PATCH v5 00/11] riscv: OpenSBI boot test and cleanups"
Patches were based on top of riscv-to-apply.next [1] + the series above.
The recent FDT changes made in hw/riscv (all machines are now using the
FDT via MachineState::fdt) allowed for most of the cleanups made
On Wed, 11 Jan 2023 17:40:46 +0100
Philippe Mathieu-Daudé wrote:
> On 11/1/23 15:24, Jonathan Cameron via wrote:
> > From: Ira Weiny
> >
> > Gcc requires constant versions of cpu_to_le* calls.
> >
> > Add a 64 bit version.
> >
> > Reviewed-by: Peter Maydell
> > Signed-off-by: Ira Weiny
> >
On 11.01.23 17:35, Peter Xu wrote:
On Wed, Jan 11, 2023 at 02:48:09PM +0100, David Hildenbrand wrote:
On 10.01.23 21:03, Peter Xu wrote:
On Tue, Jan 10, 2023 at 12:52:32PM +0100, David Hildenbrand wrote:
The following seems to work,
That looks much better at least from the diffstat pov
On Wed, 2023-01-11 at 11:25 -0500, Michael S. Tsirkin wrote:
> On Wed, Jan 11, 2023 at 02:41:58PM +, David Woodhouse wrote:
> > This allows drivers to register a callback on a qemu_irq, which is
> > invoked when a level-triggered IRQ is acked on the irqchip.
> >
> > This allows us to simulate
On 11/1/23 15:24, Jonathan Cameron via wrote:
From: Ira Weiny
Gcc requires constant versions of cpu_to_le* calls.
Add a 64 bit version.
Reviewed-by: Peter Maydell
Signed-off-by: Ira Weiny
Signed-off-by: Jonathan Cameron
---
include/qemu/bswap.h | 10 ++
1 file changed, 10
On Wed, Jan 11, 2023 at 02:48:09PM +0100, David Hildenbrand wrote:
> On 10.01.23 21:03, Peter Xu wrote:
> > On Tue, Jan 10, 2023 at 12:52:32PM +0100, David Hildenbrand wrote:
> > > The following seems to work,
> >
> > That looks much better at least from the diffstat pov (comparing to the
> >
From: Philippe Mathieu-Daudé
Since commit efc6c070aca ("configure: Add a test for the minimum
compiler version") the minimum compiler version required for GCC
is 4.8, which supports __builtin_bswap().
Remove the Haiku specific ifdef'ry.
This reverts commit
On 11/1/23 17:07, Philippe Mathieu-Daudé wrote:
On 11/1/23 16:49, Philippe Mathieu-Daudé wrote:
On 11/1/23 15:24, Jonathan Cameron via wrote:
From: Ira Weiny
Gcc requires constant versions of cpu_to_le* calls.
Add a 64 bit version.
Reviewed-by: Peter Maydell
Signed-off-by: Ira Weiny
From: Philippe Mathieu-Daudé
Since commit efc6c070aca ("configure: Add a test for the minimum
compiler version") the minimum compiler version required for GCC
is 4.8, which supports __builtin_bswap().
Remove the FreeBSD specific ifdef'ry.
This reverts commit
From: Philippe Mathieu-Daudé
Since commit efc6c070aca ("configure: Add a test for the minimum
compiler version") the minimum compiler version required for GCC
is 4.8, which supports __builtin_bswap().
Remove the NetBSD specific ifdef'ry.
This reverts commit
Implement Richard's suggestion to use __builtin_bswap().
Convert to __builtin_bswap() one patch per OS to simplify
maintainers review.
Since v2:
- Rebased adapting ./configure changes to meson
Since v1:
- Remove the Haiku/BSD ifdef'ry (Peter)
- Include the Haiku VM image from Alexander
From: Philippe Mathieu-Daudé
Since commit efc6c070aca ("configure: Add a test for the minimum
compiler version") the minimum compiler version required for GCC
is 4.8, which supports __builtin_bswap().
Drop the dependency.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
From: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/bswap.h | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index ca2b4c3f15..d2dafdc54c 100644
---
From: Philippe Mathieu-Daudé
Use the compiler built-in function to byte swap values,
as the compiler is clever and will fold constants.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/bswap.h | 31
Seems good to me.
Acked-by: David Daney
On Mon, Jan 9, 2023 at 4:58 AM Dr. David Alan Gilbert (git) <
dgilb...@redhat.com> wrote:
> From: "Dr. David Alan Gilbert"
>
> Fixup the migration compatibility for existing machine types
> so that they do not enable msi-x.
>
> Symptom:
>
> (qemu) qemu:
On Wed, Jan 11, 2023 at 02:41:58PM +, David Woodhouse wrote:
> This allows drivers to register a callback on a qemu_irq, which is
> invoked when a level-triggered IRQ is acked on the irqchip.
>
> This allows us to simulate level-triggered interrupts more efficiently,
> by resampling the state
Ilya Leoshkevich writes:
> When exiting due to an exit() syscall, qemu-user calls
> preexit_cleanup(), but this is currently not the case when exiting due
> to a signal. This leads to various buffers not being flushed (e.g.,
> for gprof, for gcov, and for the upcoming perf support).
>
> Add
Hi Kevin,
Can I ask again how base.img + diff.qcow2 can be re-merged into one
image via qemu-img or hmp command when modified.img is discarded?
Regards
Zhiyong
On 1/11/23 10:32 PM, Kevin Wolf wrote:
Am 11.01.2023 um 08:55 hat Zhiyong Ye geschrieben:
Hi Kevin,
Thank you for your reply and
Emilio Cota writes:
> Changes since v2:
>
> - Add R-b's
> - patch 4/5: Fix incompatible pointer type errors
> - patch 4/5: Remove leftover helper
>
> Thanks,
> Emilio
Queued to plugins/next, thanks.
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Acked-by: Thomas Huth
Signed-off-by: Cornelia Huck
---
tests/qtest/arm-cpu-features.c | 76 ++
1 file changed, 76 insertions(+)
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
index 5a145273860c..e264d2178a8b 100644
---
Introduce a new cpu feature flag to control MTE support. To preserve
backwards compatibility for tcg, MTE will continue to be enabled as
long as tag memory has been provided.
If MTE has been enabled, we need to disable migration, as we do not
yet have a way to migrate the tags as well. Therefore,
Here's another repost of my kvm/mte series; no substantial changes.
Changes v3->v4:
- rebase to current master
- tweak message when specifying "mte=on" for the virt machine for non-tcg
- added Thomas' ack for the qtests patch
Cornelia Huck (2):
arm/kvm: add support for MTE
qtests/arm: add
On 11/1/23 16:49, Philippe Mathieu-Daudé wrote:
On 11/1/23 15:24, Jonathan Cameron via wrote:
From: Ira Weiny
Gcc requires constant versions of cpu_to_le* calls.
Add a 64 bit version.
Reviewed-by: Peter Maydell
Signed-off-by: Ira Weiny
Signed-off-by: Jonathan Cameron
---
On 1/11/23 02:39, Richard Henderson wrote:
On 1/10/23 12:14, Daniel Henrique Barboza wrote:
+/*
+ * Register CPU props based on env.misa_ext. If a non-zero
+ * value was set, register only the required cpu->cfg.ext_*
+ * properties and leave. env.misa_ext = 0 means that we want
+ * all the
On 11/1/23 15:24, Jonathan Cameron via wrote:
From: Ira Weiny
The cel_uuid was programatically generated previously because there was
no static initializer for network order UUIDs.
Use the new network order initializer for cel_uuid. Adjust
cxl_initialize_mailbox() because it can't fail now.
On 11/1/23 15:24, Jonathan Cameron via wrote:
From: Ira Weiny
Gcc requires constant versions of cpu_to_le* calls.
Add a 64 bit version.
Reviewed-by: Peter Maydell
Signed-off-by: Ira Weiny
Signed-off-by: Jonathan Cameron
---
include/qemu/bswap.h | 10 ++
1 file changed, 10
On 11/1/23 15:24, Jonathan Cameron via wrote:
From: Gregory Price
Remove usage of magic numbers when accessing capacity fields and replace
with CXL_CAPACITY_MULTIPLIER, matching the kernel definition.
Signed-off-by: Gregory Price
Reviewed-by: Davidlohr Bueso
Signed-off-by: Jonathan Cameron
On 1/10/23 3:16 AM, Michael S. Tsirkin wrote:
> On Tue, Jan 10, 2023 at 02:08:34AM -0500, Chuck Zmudzinski wrote:
>> Intel specifies that the Intel IGD must occupy slot 2 on the PCI bus,
>> as noted in docs/igd-assign.txt in the Qemu source code.
>>
>> Currently, when the xl toolstack is used to
On Wed, Jan 11, 2023 at 10:06:49AM -0500, John Snow wrote:
> On Wed, Jan 11, 2023 at 4:07 AM Daniel P. Berrangé
> wrote:
> >
> > On Tue, Jan 10, 2023 at 06:18:29PM -0500, John Snow wrote:
> > > On Tue, Jan 10, 2023 at 3:34 AM Peter Delevoryas wrote:
> > > >
> > > > On macOS, private $TMPDIR's
To fix potential deadlocks as reported by tsan.
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Emilio Cota
---
plugins/core.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/plugins/core.c b/plugins/core.c
index
Changes since v2:
- Add R-b's
- patch 4/5: Fix incompatible pointer type errors
- patch 4/5: Remove leftover helper
Thanks,
Emilio
Fixes this tsan crash, easy to reproduce with any large enough program:
$ tests/unit/test-qht
1..2
ThreadSanitizer: CHECK failed: sanitizer_deadlock_detector.h:67
"((n_all_locks_)) <
(((sizeof(all_locks_with_contexts_)/sizeof((all_locks_with_contexts_)[0]"
(0x40, 0x40) (tid=1821568)
#0
We forgot to add this one in "a890643958 util/qht: atomically set b->hashes".
Detected with tsan.
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Emilio Cota
---
util/qht.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
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