Re: [PATCH 00/20] target/arm: CONFIG_TCG=n part 1

On 18/1/23 20:34, Fabiano Rosas wrote: These are the already reviewed patches from the first half of my previous series: https://lore.kernel.org/r/20230113140419.4013-1-faro...@suse.de This unbreaks the --disable-tcg build, but there are issues in runtime that are still being hashed out in the

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Jan 18 21:03, Keith Busch wrote: > On Thu, Jan 19, 2023 at 01:10:57PM +1000, Alistair Francis wrote: > > On Thu, Jan 19, 2023 at 12:44 PM Keith Busch wrote: > > > > > > Further up, it says the "interrupt gateway" is responsible for > > > forwarding new interrupt requests while the level

Re: [PATCH v2] target/tricore: Remove unused fields from CPUTriCoreState

On Wed, Jan 18, 2023 at 09:01:48AM -1000, Richard Henderson wrote: > On 1/17/23 23:33, Philippe Mathieu-Daudé wrote: > > Remove dead code: > > - unused fields in CPUTriCoreState > > - (unexisting) tricore_def_t structure > > - forward declaration of tricore_boot_info structure > >(declared in

[PATCH v3 07/12] hmp: add cryptodev info command

Example of this command: # virsh qemu-monitor-command vm --hmp info cryptodev cryptodev1: service=[akcipher|mac|hash|cipher] queue 0: type=builtin cryptodev0: service=[akcipher] queue 0: type=lkcf Signed-off-by: zhenwei pi --- hmp-commands-info.hx | 14 ++

[PATCH v3 06/12] cryptodev-builtin: Detect akcipher capability

Rather than exposing akcipher service/RSA algorithm to virtio crypto device unconditionally, detect akcipher capability from akcipher crypto framework. This avoids unsuccessful requests. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi --- backends/cryptodev-builtin.c | 18

[PATCH v3 12/12] MAINTAINERS: add myself as the maintainer for cryptodev

Signed-off-by: zhenwei pi --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5ec5aebadb..0f8ffe2f64 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2858,6 +2858,7 @@ T: git https://gitlab.com/ehabkost/qemu.git machine-next Cryptodev Backends M:

[PATCH v3 11/12] cryptodev: Support query-stats QMP command

Now we can use "query-stats" QMP command to query statistics of crypto devices. (Originally this was designed to show statistics by '{"execute": "query-cryptodev"}'. Daniel Berrangé suggested that querying configuration info by "query-cryptodev", and querying runtime performance info by

[PATCH v3 05/12] cryptodev: Introduce 'query-cryptodev' QMP command

Now we have a QMP command to query crypto devices: virsh qemu-monitor-command vm '{"execute": "query-cryptodev"}' | jq { "return": [ { "service": [ "akcipher", "mac", "hash", "cipher" ], "id": "cryptodev1", "client": [ {

[PATCH v3 09/12] cryptodev: Account statistics

Account OPS/BPS for crypto device, this will be used for 'query-stats' QEMU monitor command and QoS in the next step. Note that a crypto device may support symmetric mode, asymmetric mode, both symmetric and asymmetric mode. So we use two structure to describe the statistics of a crypto device.

[PATCH v3 03/12] cryptodev: Introduce cryptodev alg type in QAPI

Introduce cryptodev alg type in cryptodev.json, then apply this to related codes, and drop 'enum CryptoDevBackendAlgType'. There are two options: 1, { 'enum': 'QCryptodevBackendAlgType', 'prefix': 'CRYPTODEV_BACKEND_ALG', 'data': ['sym', 'asym']} Then we can keep 'CRYPTODEV_BACKEND_ALG_SYM'

[PATCH v3 10/12] cryptodev: support QoS

Add 'throttle-bps' and 'throttle-ops' limitation to set QoS. The two arguments work with both QEMU command line and QMP command. Example of QEMU command line: -object cryptodev-backend-builtin,id=cryptodev1,throttle-bps=1600,\ throttle-ops=100 Example of QMP command: virsh qemu-monitor-command

[PATCH v3 00/12] Refactor cryptodev

v2 -> v3: - rebase code against the lastest commist: fb7e7990342e59cf67d - document the missing fields in qapi/cryptodev.json - rework statistics part: use 'query-stats' command instead of 'query-cryptodev'(cryptodev: Support query-stats QMP command) v1 -> v2: - fix coding style and use

[PATCH v3 08/12] cryptodev: Use CryptoDevBackendOpInfo for operation

Move queue_index, CryptoDevCompletionFunc and opaque into struct CryptoDevBackendOpInfo, then cryptodev_backend_crypto_operation() needs an argument CryptoDevBackendOpInfo *op_info only. And remove VirtIOCryptoReq from cryptodev. It's also possible to hide VirtIOCryptoReq into virtio-crypto.c in

[PATCH v3 02/12] cryptodev: Remove 'name' & 'model' fields

We have already used qapi to generate crypto device types, this allows to convert type to a string 'model', so the 'model' field is not needed. And the 'name' field is not used by any backend driver, drop it. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi ---

[PATCH v3 04/12] cryptodev: Introduce server type in QAPI

Introduce cryptodev service type in cryptodev.json, then apply this to related codes. Now we can remove VIRTIO_CRYPTO_SERVICE_xxx dependence from QEMU cryptodev. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi --- backends/cryptodev-builtin.c| 8

[PATCH v3 01/12] cryptodev: Introduce cryptodev.json

Introduce QCryptodevBackendType in cryptodev.json, also apply this to related codes. Then we can drop 'enum CryptoDevBackendOptionsType'. Note that `CRYPTODEV_BACKEND_TYPE_NONE` is *NOT* used by anywhere, so drop it(no 'none' enum in QCryptodevBackendType). Reviewed-by: Daniel P. Berrangé

Re: [PATCH 00/20] target/arm: CONFIG_TCG=n part 1

On 19/1/23 08:05, Philippe Mathieu-Daudé wrote: On 18/1/23 22:28, Fabiano Rosas wrote: Philippe Mathieu-Daudé writes: On 18/1/23 20:34, Fabiano Rosas wrote: These are the already reviewed patches from the first half of my previous series:

Re: [PATCH 00/20] target/arm: CONFIG_TCG=n part 1

On 18/1/23 22:28, Fabiano Rosas wrote: Philippe Mathieu-Daudé writes: Hi Fabiano, On 18/1/23 20:34, Fabiano Rosas wrote: These are the already reviewed patches from the first half of my previous series: https://lore.kernel.org/r/20230113140419.4013-1-faro...@suse.de This unbreaks the

[PATCH v4 07/19] hw/input: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/hw/input/pl050.h | 1 - hw/input/tsc210x.c | 1 - 2 files changed, 2 deletions(-)

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Jan 18 15:26, Keith Busch wrote: > Klaus, > > This isn't going to help your issue, but there are at least two legacy > irq bugs in the nvme qemu implementation. > > 1. The admin queue breaks if start with legacy and later initialize > msix. > Hmm. Interesting that we have not encountered

[PATCH v4 10/19] migration: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/qemu/userfaultfd.h | 1 - 1 file changed, 1 deletion(-) diff --git

[PATCH v4 06/19] hw/cxl: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/hw/cxl/cxl_component.h | 2 -- include/hw/cxl/cxl_host.h | 1 -

[PATCH v4 13/19] riscv: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- target/riscv/pmu.h | 1 - 1 file changed, 1 deletion(-) diff --git a/target/riscv/pmu.h

[PATCH v4 09/19] qga: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- qga/cutils.h | 2 -- qga/commands-posix.c | 1 - qga/cutils.c | 3 ++- 3 files

[PATCH v4 04/19] bsd-user: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- bsd-user/bsd-proc.h | 4 bsd-user/qemu.h | 1 -

[PATCH v4 0/3] memory: prevent dma-reentracy issues

These patches aim to solve two types of DMA-reentrancy issues: 1.) mmio -> dma -> mmio case To solve this, we track whether the device is engaged in io by checking/setting a reentrancy-guard within APIs used for MMIO access. 2.) bh -> dma write -> mmio case This case is trickier, since we dont

[PATCH v4 16/19] Fix non-first inclusions of qemu/osdep.h

This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- audio/sndioaudio.c | 2 +- backends/hostmem-epc.c | 2 +- block/export/vduse-blk.c | 2 +- hw/hyperv/syndbg.c | 2 +- util/async-teardown.c| 12 5 files changed, 8

[PATCH v4 17/19] Don't include headers already included by qemu/osdep.h

This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- backends/tpm/tpm_ioctl.h | 2 -- fsdev/p9array.h | 2 -- include/hw/misc/aspeed_lpc.h | 2 -- include/hw/pci/pcie_doe.h | 1 - include/qemu/async-teardown.h | 2

[PATCH v4 3/3] hw: replace most qemu_bh_new calls with qemu_bh_new_guarded

This protects devices from bh->mmio reentrancy issues. Signed-off-by: Alexander Bulekov --- hw/9pfs/xen-9p-backend.c| 4 +++- hw/block/dataplane/virtio-blk.c | 3 ++- hw/block/dataplane/xen-block.c | 5 +++-- hw/block/virtio-blk.c | 5 +++-- hw/char/virtio-serial-bus.c |

[PATCH v4 1/3] memory: prevent dma-reentracy issues

Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA. This flag is set/checked prior to calling a device's MemoryRegion handlers, and set when device code initiates DMA. The purpose of this flag is to prevent two types of DMA-based reentrancy issues: 1.) mmio -> dma -> mmio

[PATCH v4 02/19] scripts/clean-includes: Don't claim duplicate headers found when not

When running with --check-dup-head, the script always claims it "Found duplicate header file includes." Fix to do it only when it actually found some. Fixes: d66253e46ae2b9c36a9dd90b2b74c0dfa5804b22 Signed-off-by: Markus Armbruster --- scripts/clean-includes | 5 ++--- 1 file changed, 2

[PATCH v4 05/19] crypto: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- crypto/block-luks-priv.h | 1 - 1 file changed, 1 deletion(-) diff --git

[PATCH v4 08/19] hw/tricore: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/hw/tricore/triboard.h | 1 - 1 file changed, 1 deletion(-) diff --git

[PATCH v4 1/3] memory: prevent dma-reentracy issues

Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA. This flag is set/checked prior to calling a device's MemoryRegion handlers, and set when device code initiates DMA. The purpose of this flag is to prevent two types of DMA-based reentrancy issues: 1.) mmio -> dma -> mmio

[PATCH v4 2/3] async: Add an optional reentrancy guard to the BH API

Devices can pass their MemoryReentrancyGuard (from their DeviceState), when creating new BHes. Then, the async API will toggle the guard before/after calling the BH call-back. This prevents bh->mmio reentrancy issues. Signed-off-by: Alexander Bulekov --- docs/devel/multiple-iothreads.txt | 2

[PATCH v4 19/19] Drop duplicate #include

Tracked down with the help of scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/hw/arm/fsl-imx6ul.h | 1 - include/hw/arm/fsl-imx7.h | 1 - backends/tpm/tpm_emulator.c | 1 - hw/acpi/piix4.c | 1 - hw/alpha/dp264.c | 1 - hw/arm/virt.c

[PATCH v4 0/3] memory: prevent dma-reentracy issues

These patches aim to solve two types of DMA-reentrancy issues: 1.) mmio -> dma -> mmio case To solve this, we track whether the device is engaged in io by checking/setting a reentrancy-guard within APIs used for MMIO access. 2.) bh -> dma write -> mmio case This case is trickier, since we dont

[PATCH v4 12/19] target/hexagon: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Changes to standalone programs dropped, because I can't tell whether them not using qemu/osdep.h is intentional:

[PATCH v4 0/3] memory: prevent dma-reentracy issues

These patches aim to solve two types of DMA-reentrancy issues: 1.) mmio -> dma -> mmio case To solve this, we track whether the device is engaged in io by checking/setting a reentrancy-guard within APIs used for MMIO access. 2.) bh -> dma write -> mmio case This case is trickier, since we dont

[PATCH v4 03/19] scripts/clean-includes: Skip symbolic links

When a symbolic link points to a file that needs cleaning, the script replaces the link with a cleaned regular file. Not wanted; skip them. We have a few symbolic links under subprojects/libvduse/ and subprojects/libvhost-user/. Signed-off-by: Markus Armbruster --- scripts/clean-includes | 4

[PATCH v4 01/19] scripts/clean-includes: Fully skip / ignore files

When clean-includes claims to skip or ignore a file, only the part that sanitizes use of qemu/osdep.h skips the file. The part that looks for duplicate #include does not, and neither does committing to Git. The latter can get unrelated stuff included in the commit, but only if you run

[PATCH v4 00/19] Clean up includes

Back in 2016, we discussed[1] rules for headers, and these were generally liked: 1. Have a carefully curated header that's included everywhere first. We got that already thanks to Peter: osdep.h. 2. Headers should normally include everything they need beyond osdep.h. If exceptions are

[PATCH v4 14/19] block: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/block/graph-lock.h | 1 - include/block/write-threshold.h | 2 -- block/qapi.c

[PATCH v4 15/19] accel: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- include/sysemu/accel-blocker.h | 1 - 1 file changed, 1 deletion(-) diff --git

[PATCH v4 18/19] 9p: Drop superfluous include of linux/limits.h

Signed-off-by: Markus Armbruster --- hw/9pfs/9p.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index 9621ec1341..aa736af380 100644 --- a/hw/9pfs/9p.c +++ b/hw/9pfs/9p.c @@ -17,9 +17,6 @@ */ #include "qemu/osdep.h" -#ifdef CONFIG_LINUX -#include -#endif

[PATCH v4 11/19] net: Clean up includes

Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster --- net/vmnet_int.h | 1 - 1 file changed, 1 deletion(-) diff --git a/net/vmnet_int.h

Who maintains util/userfaultfd.c?

commit 0e9b5cd6b238b7ca9a3a50d957f50c37082705a0 Author: Andrey Gruzdev Date: Fri Jan 29 13:14:04 2021 +0300 migration: introduce UFFD-WP low-level interface helpers Glue code to the userfaultfd kernel implementation. Querying feature support, createing file descriptor, feature

Re: reverse-{debugging,continue} not working on v7.2.0, i386 guest

On Wed, Jan 18, 2023 at 12:39:16PM +0300, Pavel Dovgalyuk wrote: > Sometimes replay (or reverse debugging) have problems due to incomplete or > incorrect virtual device save/load implementation. > > Can you try removing -cpu from your command line? > > Or you can provide the files you load and

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Thu, Jan 19, 2023 at 01:10:57PM +1000, Alistair Francis wrote: > On Thu, Jan 19, 2023 at 12:44 PM Keith Busch wrote: > > > > Further up, it says the "interrupt gateway" is responsible for > > forwarding new interrupt requests while the level remains asserted, but > > it doesn't look like

Announcement of aborting HAXM maintenance

Hi, Philippe, Intel decided to abort the development of HAXM and the maintenance of its QEMU part. Should we submit a patch to mark the Guest CPU Cores (HAXM) status as Orphan and remove the maintainers from the corresponding list? Meanwhile, should the code enabling HAX in QEMU once committed

Recall: Announcement of aboring HAXM maintenance

Wang, Wenchao would like to recall the message, "Announcement of aboring HAXM maintenance".

Recall: Announcement of aboring HAXM maintenance

Wang, Wenchao would like to recall the message, "Announcement of aboring HAXM maintenance".

Announcement of aboring HAXM maintenance

Hi, Philippe, Intel decided to abort the development of HAXM and the maintenance of its QEMU part. Should we submit a patch to mark the Guest CPU Cores (HAXM) status as Orphan and remove the maintainers from the corresponding list? Meanwhile, should the code enabling HAX in QEMU once committed

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Thu, Jan 19, 2023 at 12:44 PM Keith Busch wrote: > > On Thu, Jan 19, 2023 at 10:41:42AM +1000, Alistair Francis wrote: > > On Thu, Jan 19, 2023 at 9:07 AM Keith Busch wrote: > > > --- > > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > > > index c2dfacf028..f8f7af08dc 100644 >

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Thu, Jan 19, 2023 at 10:41:42AM +1000, Alistair Francis wrote: > On Thu, Jan 19, 2023 at 9:07 AM Keith Busch wrote: > > --- > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > > index c2dfacf028..f8f7af08dc 100644 > > --- a/hw/intc/sifive_plic.c > > +++ b/hw/intc/sifive_plic.c > >

Re: [PATCH v2 3/6] hw/riscv: simplify riscv_compute_fdt_addr()

On Tue, Jan 17, 2023 at 3:34 AM Daniel Henrique Barboza wrote: > > All callers are using attributes from the MachineState object. Use a > pointer to it instead of passing dram_size (which is always > machine->ram_size) and fdt (always machine->fdt). > > Signed-off-by: Daniel Henrique Barboza >

Re: [PATCH v2 6/6] hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms'

On Tue, Jan 17, 2023 at 3:35 AM Daniel Henrique Barboza wrote: > > Follow the QEMU convention of naming MachineState pointers as 'ms' by > renaming the instances where we're calling it 'mc'. > > Suggested-by: Philippe Mathieu-Daudé > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Daniel

Re: [PATCH v2 5/6] hw/riscv/virt.c: rename MachineState 'mc' pointers to 'ms'

On Tue, Jan 17, 2023 at 3:36 AM Daniel Henrique Barboza wrote: > > We have a convention in other QEMU boards/archs to name MachineState > pointers as either 'machine' or 'ms'. MachineClass pointers are usually > called 'mc'. > > The 'virt' RISC-V machine has a lot of instances where MachineState

Re: [PATCH v2 4/6] hw/riscv/virt.c: calculate socket count once in create_fdt_imsic()

On Tue, Jan 17, 2023 at 3:36 AM Daniel Henrique Barboza wrote: > > riscv_socket_count() returns either ms->numa_state->num_nodes or 1 > depending on NUMA support. In any case the value can be retrieved only > once and used in the rest of the function. > > This will also alleviate the rename we're

Re: [PATCH v2 2/6] hw/riscv: split fdt address calculation from fdt load

On Tue, Jan 17, 2023 at 3:35 AM Daniel Henrique Barboza wrote: > > A common trend in other archs is to calculate the fdt address, which is > usually straightforward, and then calling a function that loads the > fdt/dtb by using that address. > > riscv_load_fdt() is doing a bit too much in

Re: [PATCH v2 2/5] target/riscv: Update VS timer whenever htimedelta changes

On Mon, Jan 16, 2023 at 3:20 PM Anup Patel wrote: > > Hi Alistair, > > On Tue, Jan 3, 2023 at 9:43 PM Anup Patel wrote: > > > > Hi Alistair, > > > > On Wed, Dec 28, 2022 at 11:08 AM Alistair Francis > > wrote: > > > > > > On Fri, Dec 23, 2022 at 11:14 PM Anup Patel > > > wrote: > > > > > > >

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Thu, Jan 19, 2023 at 9:07 AM Keith Busch wrote: > > On Wed, Jan 18, 2023 at 09:33:05AM -0700, Keith Busch wrote: > > On Wed, Jan 18, 2023 at 03:04:06PM +, Peter Maydell wrote: > > > On Tue, 17 Jan 2023 at 19:21, Guenter Roeck wrote: > > > > Anyway - any idea what to do to help figuring

Re: [PATCH v2 1/6] hw/riscv/boot.c: calculate fdt size after fdt_pack()

On Tue, Jan 17, 2023 at 3:35 AM Daniel Henrique Barboza wrote: > > fdt_pack() can change the fdt size, meaning that fdt_totalsize() can > contain a now deprecated (bigger) value. > > Signed-off-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Alistair > --- > hw/riscv/boot.c | 7

Re: [PATCH v5 2/2] riscv: Allow user to set the satp mode

On Wed, Jan 18, 2023 at 10:19 PM Andrew Jones wrote: > > On Wed, Jan 18, 2023 at 10:28:46AM +1000, Alistair Francis wrote: > > On Wed, Jan 18, 2023 at 2:32 AM Andrew Jones > > wrote: > > > > > > On Fri, Jan 13, 2023 at 11:34:53AM +0100, Alexandre Ghiti wrote: > ... > > > > + > > > > +/* Get

Re: [PATCH 1/1] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()

On Tue, Jan 17, 2023 at 11:28 PM Daniel Henrique Barboza wrote: > > Commit 1c20d3ff6004 ("hw/riscv: virt: Add a machine done notifier") > moved the initialization of fw_cfg to the virt_machine_done() callback. > > Problem is that the validation of fw_cfg by devices such as ramfb is > done before

Re: [PATCH v8 3/3] hw/riscv: clear kernel_entry higher bits in load_elf_ram_sym()

On Mon, Jan 16, 2023 at 8:30 PM Daniel Henrique Barboza wrote: > > Recent hw/risc/boot.c changes caused a regression in an use case with > the Xvisor hypervisor. Running a 32 bit QEMU guest with '-kernel' > stopped working. The reason seems to be that Xvisor is using 64 bit to > encode the 32 bit

Re: [PATCH v8 3/3] hw/riscv: clear kernel_entry higher bits in load_elf_ram_sym()

On Mon, Jan 16, 2023 at 8:37 PM Philippe Mathieu-Daudé wrote: > > On 16/1/23 13:29, Daniel Henrique Barboza wrote: > > Recent hw/risc/boot.c changes caused a regression in an use case with > > the Xvisor hypervisor. Running a 32 bit QEMU guest with '-kernel' > > stopped working. The reason seems

Re: [PATCH 1/2] target/arm: Introduce helper_set_rounding_mode_chkfrm

On Wed, Jan 18, 2023 at 8:02 PM Daniel Henrique Barboza wrote: > > s/arm/riscv in subject/commit title ^ Fixed when committing Thanks! Applied to riscv-to-apply.next Alistair > > On 1/15/23 13:06, Richard Henderson wrote: > > The new helper always validates the contents of FRM, even > if the

Re: [PATCH v8 3/3] hw/riscv: clear kernel_entry higher bits in load_elf_ram_sym()

On 1/18/23 19:45, Alistair Francis wrote: On Mon, Jan 16, 2023 at 10:46 PM Daniel Henrique Barboza wrote: On 1/16/23 09:37, Philippe Mathieu-Daudé wrote: On 16/1/23 13:29, Daniel Henrique Barboza wrote: Recent hw/risc/boot.c changes caused a regression in an use case with the Xvisor

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

On Wed, Jan 18, 2023 at 09:33:05AM -0700, Keith Busch wrote: > On Wed, Jan 18, 2023 at 03:04:06PM +, Peter Maydell wrote: > > On Tue, 17 Jan 2023 at 19:21, Guenter Roeck wrote: > > > Anyway - any idea what to do to help figuring out what is happening ? > > > Add tracing support to pci

Re: [PATCH 1/1] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()

On Tue, Jan 17, 2023 at 11:28 PM Daniel Henrique Barboza wrote: > > Commit 1c20d3ff6004 ("hw/riscv: virt: Add a machine done notifier") > moved the initialization of fw_cfg to the virt_machine_done() callback. > > Problem is that the validation of fw_cfg by devices such as ramfb is > done before

Re: [PATCH 2/2] target/riscv: Remove helper_set_rod_rounding_mode

On Mon, Jan 16, 2023 at 2:08 AM Richard Henderson wrote: > > The only setting of RISCV_FRM_ROD is from the vector unit, > and now handled by helper_set_rounding_mode_chkfrm. > This helper is now unused. > > Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- >

Re: [PATCH 1/2] target/arm: Introduce helper_set_rounding_mode_chkfrm

On Mon, Jan 16, 2023 at 2:08 AM Richard Henderson wrote: > > The new helper always validates the contents of FRM, even > if the new rounding mode is not DYN. This is required by > the vector unit. > > Track whether we've validated FRM separately from whether > we've updated fp_status with a

Re: [PATCH v8 3/3] hw/riscv: clear kernel_entry higher bits in load_elf_ram_sym()

On Mon, Jan 16, 2023 at 10:46 PM Daniel Henrique Barboza wrote: > > > > On 1/16/23 09:37, Philippe Mathieu-Daudé wrote: > > On 16/1/23 13:29, Daniel Henrique Barboza wrote: > >> Recent hw/risc/boot.c changes caused a regression in an use case with > >> the Xvisor hypervisor. Running a 32 bit QEMU

Re: [PATCH v8 1/3] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()

On Mon, Jan 16, 2023 at 10:31 PM Daniel Henrique Barboza wrote: > > The microchip_icicle_kit, sifive_u, spike and virt boards are now doing > the same steps when '-kernel' is used: > > - execute load_kernel() > - load init_rd() > - write kernel_cmdline > > Let's fold everything inside

Re: [PATCH] tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst

On Wed, Jan 18, 2023 at 9:05 AM Richard Henderson wrote: > > We failed to update this with the w^x split, so misses the fact > that true pc-relative offsets are usually small. > > Signed-off-by: Richard Henderson Thanks! Applied to riscv-to-apply.next Alistair > --- >

Re: [PATCH v8] xen/pt: reserve PCI slot 2 for Intel igd-passthru

On 1/17/2023 11:27 PM, Alex Williamson wrote: > On Tue, 17 Jan 2023 19:15:57 -0500 > Chuck Zmudzinski wrote: > > > On 1/17/2023 6:04 AM, Igor Mammedov wrote: > > > On Mon, 16 Jan 2023 13:00:53 -0500 > > > Chuck Zmudzinski wrote: > > > > > > > On 1/16/23 10:33, Igor Mammedov wrote: > > > > >

Re: completion timeouts with pin-based interrupts in QEMU hw/nvme

Klaus, This isn't going to help your issue, but there are at least two legacy irq bugs in the nvme qemu implementation. 1. The admin queue breaks if start with legacy and later initialize msix. 2. The legacy vector is shared among all queues, but it's being deasserted when the first queue's

Re: [PATCH 00/20] target/arm: CONFIG_TCG=n part 1

Philippe Mathieu-Daudé writes: > Hi Fabiano, > > On 18/1/23 20:34, Fabiano Rosas wrote: >> These are the already reviewed patches from the first half of my >> previous series: >> https://lore.kernel.org/r/20230113140419.4013-1-faro...@suse.de >> >> This unbreaks the --disable-tcg build, but

Re: [PATCH 00/20] target/arm: CONFIG_TCG=n part 1

Hi Fabiano, On 18/1/23 20:34, Fabiano Rosas wrote: These are the already reviewed patches from the first half of my previous series: https://lore.kernel.org/r/20230113140419.4013-1-faro...@suse.de This unbreaks the --disable-tcg build, but there are issues in runtime that are still being

Integrating with new Intel DSA hardware offloading

Hi everyone, I am looking into using the new Data Streaming Accelerator (DSA) hardware acceleration feature built into the Intel Sapphire Rapids system. One of the scenarios I am investigating is the QEMU live migration feature. I noticed that during live migration, there is pretty busy work

Re: [PATCH RFC 06/21] madvise: Add QEMU_MADV_COLLAPSE

On Wed, Jan 18, 2023 at 06:51:07PM +, Dr. David Alan Gilbert wrote: > * Peter Xu (pet...@redhat.com) wrote: > > MADV_COLLAPSE is a new madvise() on Linux. Define it. > > I'd probably have merged this with the MADV_SPLIT one since they go > together; but also, it would be good in the commit

[RFC 1/3] qdev-properties: alias all object class properties

qdev_alias_all_properties() aliases a DeviceState's qdev properties onto an Object. This is used for VirtioPCIProxy types so that --device virtio-blk-pci has properties of its embedded --device virtio-blk-device object. Currently this function is implemented using qdev properties. Change the

[RFC 2/3] qdev: add IOThreadVirtQueueMappingList property type

virtio-blk and virtio-scsi devices will need a way to specify the mapping between IOThreads and virtqueues. At the moment all virtqueues are assigned to a single IOThread or the main loop. This single thread can be a CPU bottleneck, so it is necessary to allow finer-grained assignment to spread

[RFC 0/3] virtio-blk: add iothread-vq-mapping parameter

This is a preview of the iothread-vq-mapping parameter that assigns virtqueues to IOThreads. The syntax is implemented but multiple IOThreads are not actually supported yet. The purpose of this RFC is to reach agreement on the syntax and to prepare for libvirt support. virtio-blk and virtio-scsi

[RFC 3/3] virtio-blk: add iothread-vq-mapping parameter

Add the iothread-vq-mapping parameter to assign virtqueues to IOThreads. Note that this commit simply adds the VirtIOBlock->iothread_vq_mapping_list field but does not use it yet. The block layer doesn't support multi-queue yet, so we cannot safely process virtqueues from multiple IOThreads at

[PATCH 16/20] cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code

This struct has no dependencies on TCG code and it is being used in target/arm/ptw.c to simplify the passing around of page table walk results. Those routines can be reached by KVM code via the gdbstub breakpoint code, so take the structure out of CONFIG_TCG to make it visible when building with

[PATCH 05/20] target/arm: Move cpregs code out of cpu.h

Since commit cf7c6d1004 ("target/arm: Split out cpregs.h") we now have a cpregs.h header which is more suitable for this code. Code moved verbatim. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/cpregs.h | 98

[PATCH 19/20] tests/avocado: Skip tests that require a missing accelerator

If a test was tagged with the "accel" tag and the specified accelerator it not present in the qemu binary, cancel the test. We can now write tests without explicit calls to require_accelerator, just the tag is enough. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson ---

[PATCH 14/20] target/arm: Move regime_using_lpae_format into internal.h

This function is needed by common code (ptw.c), so move it along with the other regime_* functions in internal.h. When we enable the build without TCG, the tlb_helper.c file will not be present. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson --- target/arm/internals.h | 21

[PATCH 13/20] target/arm: Move hflags code into the tcg directory

The hflags are used only for TCG code, so introduce a new file hflags.c to keep that code. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson --- target/arm/helper.c| 361 +--- target/arm/internals.h | 2 + target/arm/tcg-stubs.c | 4

[PATCH 11/20] target/arm: Move psci.c into the tcg directory

From: Claudio Fontana Signed-off-by: Claudio Fontana Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée --- target/arm/meson.build | 1 - target/arm/tcg/meson.build | 4 target/arm/{ => tcg}/psci.c | 0 3 files changed, 4 insertions(+), 1

[PATCH 03/20] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()

From: Claudio Fontana Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson Signed-off-by: Fabiano Rosas --- target/arm/helper.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 7c39280a83..96a668989b

[PATCH 10/20] target/arm: move helpers to tcg/

From: Claudio Fontana Signed-off-by: Claudio Fontana Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/meson.build | 16 ++-- target/arm/tcg-stubs.c | 23 +++

[PATCH 08/20] target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled

This is in preparation for moving debug_helper.c into a TCG-specific directory. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson --- target/arm/cpu.c | 6 -- target/arm/machine.c | 7 +-- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/target/arm/cpu.c

[PATCH 00/20] target/arm: CONFIG_TCG=n part 1

These are the already reviewed patches from the first half of my previous series: https://lore.kernel.org/r/20230113140419.4013-1-faro...@suse.de This unbreaks the --disable-tcg build, but there are issues in runtime that are still being hashed out in the other series. For the build _with_ TCG,

[PATCH 15/20] target/arm: Don't access TCG code when debugging with KVM

When TCG is disabled this part of the code should not be reachable, so wrap it with an ifdef for now. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson --- target/arm/ptw.c | 4 1 file changed, 4 insertions(+) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index

[PATCH 09/20] target/arm: move translate modules to tcg/

Introduce the target/arm/tcg directory. Its purpose is to hold the TCG code that is selected by CONFIG_TCG. Signed-off-by: Claudio Fontana Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS

[PATCH 20/20] tests/avocado: Tag TCG tests with accel:tcg

This allows the test to be skipped when TCG is not present in the QEMU binary. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson --- tests/avocado/boot_linux_console.py | 1 + tests/avocado/reverse_debugging.py | 8 2 files changed, 9 insertions(+) diff --git

[PATCH 07/20] target/arm: Move define_debug_regs() to cpregs.c

The debug_helper.c file will move into a tcg-specific directory, so take the cpregs code out of it. That code needs to be present in KVM builds as well. Signed-off-by: Fabiano Rosas Reviewed-by: Richard Henderson --- target/arm/cpregs.c | 384 ++

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