[PATCH 05/12] hw/smbios: Dumb down smbios_entry_add() stub

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. smbios_entry_add() is only ever called on behalf of CLI option -smbios. Since qemu-options.hx sets @arch_mask to QEMU_ARCH_I386 | QEMU_ARCH_ARM, it is reachable only for these

[PATCH 03/12] dump: Assert cpu_get_note_size() can't fail

The only way cpu_get_note_size() can return a negative value is integer overflow in the non-stub versions, which is a programming error. The stub version is not actually reachable, because the cpu_get_dump_info() stub will fail first. Use assert(). This gets rid of another use of

[PATCH 08/12] qga: Drop dangling reference to QERR_QGA_LOGGING_DISABLED

slog()'s function comment advises to use QERR_QGA_LOGGING_DISABLED. This macro never existed. The reference got added in commit e3d4d25206a "guest agent: add guest agent RPCs/commands" along with QERR_QGA_LOGGING_FAILED, so maybe that one was meant. However, QERR_QGA_LOGGING_FAILED was never

[PATCH 02/12] dump: Improve error message when target doesn't support memory dump

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. Get rid of a use of QERR_UNSUPPORTED, and improve the rather vague error message (qemu) dump-guest-memory mumble Error: this feature or command is not currently

[PATCH 01/12] error: Drop superfluous #include "qapi/qmp/qerror.h"

Signed-off-by: Markus Armbruster --- authz/listfile.c | 1 - backends/cryptodev-vhost.c | 1 - backends/rng.c | 1 - backends/vhost-user.c | 1 - block/backup.c | 1 - block/commit.c | 1 - block/mirror.c

[PATCH 12/12] rocker: Tweak stubbed out monitor commands' error messages

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. The stubbed out Rocker monitor commands are the last remaining users of QERR_FEATURE_DISABLED. They fail like this: (qemu) info rocker mumble Error: The feature

[PATCH 00/12] error: Reduce qerror.h usage a bit more

This series gets rid of two out of 15 remaining QERR_ macros and confines use of one more to qga/. Bonus: better error messages. Markus Armbruster (12): error: Drop superfluous #include "qapi/qmp/qerror.h" dump: Improve error message when target doesn't support memory dump dump: Assert

[PATCH 09/12] replay: Simplify setting replay blockers

replay_add_blocker() takes an Error *. All callers pass one created like this: error_setg(, QERR_REPLAY_NOT_SUPPORTED, "some feature"); Folding this into replay_add_blocker() simplifies the callers, losing a bit of generality we haven't needed in more than six years. Since there are no

[PATCH 07/12] hw/acpi: Move QMP command to hw/core/

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. qmp_query_vm_generation_id() in stubs/vmgenid.c is the last user of QERR_UNSUPPORTED outside qga/. Unlike the stubs we just dropped, it is actually reachable, namely when

[PATCH 06/12] hw/acpi: Dumb down acpi_table_add() stub

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. acpi_table_add() is only ever called on behalf of CLI option -acpitable. Since qemu-options.hx sets @arch_mask to QEMU_ARCH_I386, it is reachable only for these targets. Since

[PATCH 04/12] hw/core: Improve error message when machine doesn't provide NMIs

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. Get rid of a use of QERR_UNSUPPORTED, and improve the rather vague error message (qemu) nmi Error: this feature or command is not currently supported to Error:

[PATCH 11/12] migration/colo: Improve an x-colo-lost-heartbeat error message

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. Get rid of a use of QERR_FEATURE_DISABLED, and improve the somewhat imprecise error message (qemu) x_colo_lost_heartbeat Error: The feature 'colo' is not enabled to

[PATCH 10/12] hw/core: Improve the query-hotpluggable-cpus error message

The QERR_ macros are leftovers from the days of "rich" error objects. We've been trying to reduce their remaining use. Get rid of a use of QERR_FEATURE_DISABLED, and improve the slightly awkward error message (qemu) info hotpluggable-cpus Error: The feature 'query-hotpluggable-cpus' is

Re: [PATCH 2/3] hw/ssi: Add Nuvoton PSPI Module

On 7/2/23 00:34, Hao Wu wrote: Nuvoton's PSPI is a general purpose SPI module which enables connections to SPI-based peripheral devices. Signed-off-by: Hao Wu Reviewed-by: Chris Rauer --- MAINTAINERS| 6 +- hw/ssi/meson.build | 2 +- hw/ssi/npcm_pspi.c

[PULL 31/32] target/riscv: fix SBI getchar handler for KVM

From: Vladimir Isaev Character must be returned via ret[0] field (copied to a0 by KVM). Return value should be set to 0 to indicate successful processing. Signed-off-by: Vladimir Isaev Reviewed-by: Alistair Francis Message-Id: <20230203135155.12449-1-vladimir.is...@syntacore.com>

[PULL 32/32] hw/riscv: virt: Simplify virt_{get,set}_aclint()

From: Bin Meng There is no need to declare an intermediate "MachineState *ms". Signed-off-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Message-Id: <20230206085007.3618715-1-bm...@tinylab.org> Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 6 ++

Re: [PATCH 1/1] hw/core/cpu: always print cpu index with cpu state

On 7/2/23 00:42, Dongli Zhang wrote: The cpu_dump_state() does not print the cpu index. When the cpu_dump_state() is invoked due to the KVM failure, we are not able to tell from which CPU the state is. The below is an example. KVM internal error. Suberror: 764064 RAX=0002

Re: [PATCH 3/3] hw/arm: Attach PSPI module to NPCM7XX SoC

On 7/2/23 00:34, Hao Wu wrote: Signed-off-by: Hao Wu Reviewed-by: Titus Rwantare --- docs/system/arm/nuvoton.rst | 2 +- hw/arm/npcm7xx.c| 25 +++-- include/hw/arm/npcm7xx.h| 2 ++ 3 files changed, 26 insertions(+), 3 deletions(-) Reviewed-by:

[PULL 25/32] RISC-V: Set minimum priv version for Zfh to 1.11

From: Christoph Müllner There are no differences for floating point instructions in priv version 1.11 and 1.12. There is also no dependency for Zfh to priv version 1.12. Therefore allow Zfh to be enabled for priv version 1.11. Acked-by: Alistair Francis Signed-off-by: Christoph Müllner

[PULL 20/32] RISC-V: Adding XTheadCondMov ISA extension

From: Christoph Müllner This patch adds support for the XTheadCondMov ISA extension. The patch uses the T-Head specific decoder and translation. Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 29/32] target/riscv: fix for virtual instr exception

From: Deepak Gupta commit fb3f3730e4 added mechanism to generate virtual instruction exception during instruction decode when virt is enabled. However in some situations, illegal instruction exception can be raised due to state of CPU. One such situation is implementing branch tracking. [1] An

[PULL 28/32] target/riscv: add a MAINTAINERS entry for XThead* extension support

From: Christoph Müllner The XThead* extensions are maintained by T-Head and VRULL. Adding a point of contact from both companies. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id: <20230131202013.2541053-15-christoph.muell...@vrull.eu>

[PULL 26/32] RISC-V: Add initial support for T-Head C906

From: Christoph Müllner This patch adds the T-Head C906 to the list of known CPUs. Selecting this CPUs will automatically enable the available ISA extensions of the CPUs (incl. vendor extensions). Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner

[PULL 22/32] RISC-V: Adding T-Head MemPair extension

From: Christoph Müllner This patch adds support for the T-Head MemPair instructions. The patch uses the T-Head specific decoder and translation. Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Signed-off-by: Christoph Müllner Message-Id:

[PULL 27/32] RISC-V: Adding XTheadFmv ISA extension

From: Christoph Müllner This patch adds support for the XTheadFmv ISA extension. The patch uses the T-Head specific decoder and translation. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 30/32] target/riscv: fix ctzw behavior

From: Vladimir Isaev According to spec, ctzw should work with 32-bit register, not 64. For example, previous implementation returns 33 for (1<<33) input when the new one returns 32. Signed-off-by: Vladimir Isaev Reviewed-by: Alistair Francis Suggested-by: Richard Henderson Message-Id:

[PULL 11/32] target/riscv: set tval for triggered watchpoints

From: Sergey Matyukevich According to privileged spec, if [sm]tval is written with a nonzero value when a breakpoint exception occurs, then [sm]tval will contain the faulting virtual address. Set tval to hit address when breakpoint exception is triggered by hardware watchpoint. Signed-off-by:

[PULL 19/32] RISC-V: Adding XTheadBs ISA extension

From: Christoph Müllner This patch adds support for the XTheadBs ISA extension. The patch uses the T-Head specific decoder and translation. Co-developed-by: Philipp Tomsich Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 05/32] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP

From: Anup Patel Instead of clearing mask in riscv_cpu_update_mip() for VSTIP, we should call riscv_cpu_update_mip() with mask == 0 from timer_helper.c for VSTIP. Fixes: 3ec0fe18a31f ("target/riscv: Add vstimecmp suppor") Signed-off-by: Anup Patel Reviewed-by: Alistair Francis Message-Id:

[PULL 23/32] RISC-V: Adding T-Head MemIdx extension

From: Christoph Müllner This patch adds support for the T-Head MemIdx instructions. The patch uses the T-Head specific decoder and translation. Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 10/32] hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms'

From: Daniel Henrique Barboza Follow the QEMU convention of naming MachineState pointers as 'ms' by renaming the instances where we're calling it 'mc'. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Signed-off-by: Daniel Henrique

[PULL 00/32] riscv-to-apply queue

From: Alistair Francis The following changes since commit 6661b8c7fe3f8b5687d2d90f7b4f3f23d70e3e8b: Merge tag 'pull-ppc-20230205' of https://gitlab.com/danielhb/qemu into staging (2023-02-05 16:49:09 +) are available in the Git repository at: https://github.com/alistair23/qemu.git

[PULL 07/32] target/riscv: Ensure opcode is saved for all relevant instructions

From: Anup Patel We should call decode_save_opc() for all relevant instructions which can potentially generate a virtual instruction fault or a guest page fault because generating transformed instruction upon guest page fault expects opcode to be available. Without this, hypervisor will see

[PULL 13/32] hw/riscv: split fdt address calculation from fdt load

From: Daniel Henrique Barboza A common trend in other archs is to calculate the fdt address, which is usually straightforward, and then calling a function that loads the fdt/dtb by using that address. riscv_load_fdt() is doing a bit too much in comparison. It's calculating the fdt address via

[PULL 12/32] hw/riscv/boot.c: calculate fdt size after fdt_pack()

From: Daniel Henrique Barboza fdt_pack() can change the fdt size, meaning that fdt_totalsize() can contain a now deprecated (bigger) value. Reviewed-by: Alistair Francis Signed-off-by: Daniel Henrique Barboza Message-Id: <20230201171212.1219375-2-dbarb...@ventanamicro.com> Signed-off-by:

[PULL 16/32] RISC-V: Adding XTheadSync ISA extension

From: Christoph Müllner This patch adds support for the XTheadSync ISA extension. The patch uses the T-Head specific decoder and translation. The implementation introduces a helper to execute synchronization tasks: helper_tlb_flush_all() performs a synchronized TLB flush on all CPUs.

[PULL 21/32] RISC-V: Adding T-Head multiply-accumulate instructions

From: Christoph Müllner This patch adds support for the T-Head MAC instructions. The patch uses the T-Head specific decoder and translation. Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 08/32] hw/riscv/virt.c: calculate socket count once in create_fdt_imsic()

From: Daniel Henrique Barboza riscv_socket_count() returns either ms->numa_state->num_nodes or 1 depending on NUMA support. In any case the value can be retrieved only once and used in the rest of the function. This will also alleviate the rename we're going to do next by reducing the instances

[PULL 15/32] RISC-V: Adding XTheadCmo ISA extension

From: Christoph Müllner This patch adds support for the XTheadCmo ISA extension. To avoid interfering with standard extensions, decoder and translation are in its own xthead* specific files. Future patches should be able to easily add additional T-Head extension. The implementation does not

[PULL 04/32] target/riscv: Update VS timer whenever htimedelta changes

From: Anup Patel The htimedelta[h] CSR has impact on the VS timer comparison so we should call riscv_timer_write_timecmp() whenever htimedelta changes. Fixes: 3ec0fe18a31f ("target/riscv: Add vstimecmp suppor") Signed-off-by: Anup Patel Reviewed-by: Alistair Francis Message-Id:

[PULL 09/32] hw/riscv/virt.c: rename MachineState 'mc' pointers to 'ms'

From: Daniel Henrique Barboza We have a convention in other QEMU boards/archs to name MachineState pointers as either 'machine' or 'ms'. MachineClass pointers are usually called 'mc'. The 'virt' RISC-V machine has a lot of instances where MachineState pointers are named 'mc'. There is nothing

[PULL 24/32] RISC-V: Adding T-Head FMemIdx extension

From: Christoph Müllner This patch adds support for the T-Head FMemIdx instructions. The patch uses the T-Head specific decoder and translation. Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 18/32] RISC-V: Adding XTheadBb ISA extension

From: Christoph Müllner This patch adds support for the XTheadBb ISA extension. The patch uses the T-Head specific decoder and translation. Co-developed-by: Philipp Tomsich Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

[PULL 03/32] hw/riscv: boot: Don't use CSRs if they are disabled

From: Alistair Francis If the CSRs and CSR instructions are disabled because the Zicsr extension isn't enabled then we want to make sure we don't run any CSR instructions in the boot ROM. This patches removes the CSR instructions from the reset-vec if the extension isn't enabled. We replace the

[PULL 06/32] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX

From: Anup Patel The time CSR will wrap-around immediately after reaching UINT64_MAX so we don't need to re-start QEMU timer when timecmp == UINT64_MAX in riscv_timer_write_timecmp(). Signed-off-by: Anup Patel Reviewed-by: Alistair Francis Message-Id:

[PULL 02/32] include/hw/riscv/opentitan: update opentitan IRQs

From: Wilfred Mallawa Updates the opentitan IRQs to match the latest supported commit of Opentitan from TockOS. OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f5812a961fde47 Memory layout as per [1] [1]

[PULL 01/32] target/riscv: update disas.c for xnor/orn/andn and slli.uw

From: Philipp Tomsich The decoding of the following instructions from Zb[abcs] currently contains decoding/printing errors: * xnor,orn,andn: the rs2 operand is not being printed * slli.uw: decodes and prints the immediate shift-amount as a register (e.g. 'shift-by-2' becomes 'sp')

[PULL 14/32] hw/riscv: change riscv_compute_fdt_addr() semantics

From: Daniel Henrique Barboza As it is now, riscv_compute_fdt_addr() is receiving a dram_base, a mem_size (which is defaulted to MachineState::ram_size in all boards) and the FDT pointer. And it makes a very important assumption: the DRAM interval dram_base + mem_size is contiguous. This is

[PULL 17/32] RISC-V: Adding XTheadBa ISA extension

From: Christoph Müllner This patch adds support for the XTheadBa ISA extension. The patch uses the T-Head specific decoder and translation. Co-developed-by: Philipp Tomsich Co-developed-by: LIU Zhiwei Reviewed-by: Alistair Francis Signed-off-by: Christoph Müllner Message-Id:

Re: [PATCH 1/3] MAINTAINERS: Add myself to maintainers and remove Havard

On 7/2/23 00:46, Havard Skinnemoen wrote: On Mon, Feb 6, 2023 at 3:34 PM Hao Wu wrote: Havard is no longer working on the Nuvoton systems for a while and won't be able to do any work on it in the future. So I'll take over maintaining the Nuvoton system from him. Signed-off-by: Hao Wu

[PULL 09/20] hw/tricore: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 07/20] hw/cxl: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 20/20] Drop duplicate #include

Tracked down with the help of scripts/clean-includes. Signed-off-by: Markus Armbruster Acked-by: Dr. David Alan Gilbert Reviewed-by: Greg Kurz Reviewed-by: Michael S. Tsirkin Reviewed-by: Juan Quintela Message-Id: <20230202133830.2152150-21-arm...@redhat.com> --- include/hw/arm/fsl-imx6ul.h

[PULL 14/20] riscv: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

Re: [PATCH v4 1/2] hw/sensor: Add SB-TSI Temperature Sensor Interface

On 7/2/23 00:24, Hao Wu wrote: Hi, It seems like this patch set is reviewed but never merged. Who should take this patch set? What are our next steps for them? Having some interest in interaction with emulated analog world, I could have an overall look at hw/sensor/. Co-maintainers welcomed!

[PULL 16/20] accel: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 00/20] Header cleanup patches for 2023-02-06

The following changes since commit 6661b8c7fe3f8b5687d2d90f7b4f3f23d70e3e8b: Merge tag 'pull-ppc-20230205' of https://gitlab.com/danielhb/qemu into staging (2023-02-05 16:49:09 +) are available in the Git repository at: https://repo.or.cz/qemu/armbru.git tags/pull-include-2023-02-06

[PULL 11/20] migration: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 06/20] crypto: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 12/20] net: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 03/20] scripts/clean-includes: Skip symbolic links

When a symbolic link points to a file that needs cleaning, the script replaces the link with a cleaned regular file. Not wanted; skip them. We have a few symbolic links under subprojects/libvduse/ and subprojects/libvhost-user/. Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin

[PULL 19/20] 9p: Drop superfluous include of linux/limits.h

Signed-off-by: Markus Armbruster Reviewed-by: Christian Schoenebeck Reviewed-by: Michael S. Tsirkin Message-Id: <20230202133830.2152150-20-arm...@redhat.com> --- hw/9pfs/9p.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index 9621ec1341..aa736af380 100644

[PULL 05/20] bsd-user: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 04/20] scripts/clean-includes: Improve --git commit message

The script drops #include "qemu/osdep.h" from headers. Mention it in the commit message it uses for --git. Signed-off-by: Markus Armbruster Reviewed-by: Juan Quintela Message-Id: <20230202133830.2152150-5-arm...@redhat.com> --- scripts/clean-includes | 12 +--- 1 file changed, 9

[PULL 02/20] scripts/clean-includes: Don't claim duplicate headers found when not

When running with --check-dup-head, the script always claims it "Found duplicate header file includes." Fix to do it only when it actually found some. Fixes: d66253e46ae2 ("scripts/clean-includes: added duplicate #include check") Signed-off-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin

[PULL 13/20] target/hexagon: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 18/20] Don't include headers already included by qemu/osdep.h

This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster Acked-by: Christian Schoenebeck Reviewed-by: Michael S. Tsirkin Message-Id: <20230202133830.2152150-19-arm...@redhat.com> --- backends/tpm/tpm_ioctl.h | 2 -- fsdev/p9array.h | 2

[PULL 01/20] scripts/clean-includes: Fully skip / ignore files

When clean-includes claims to skip or ignore a file, only the part that sanitizes use of qemu/osdep.h skips the file. The part that looks for duplicate #include does not, and neither does committing to Git. The latter can get unrelated stuff included in the commit, but only if you run

[PULL 10/20] qga: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 17/20] Fix non-first inclusions of qemu/osdep.h

This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Juan Quintela Message-Id: <20230202133830.2152150-18-arm...@redhat.com> --- audio/sndioaudio.c | 2 +-

[PULL 15/20] block: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

[PULL 08/20] hw/input: Clean up includes

This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise,

Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI

On Tue, Feb 07, 2023 at 11:57:29AM +0800, Bin Meng wrote: > On Mon, Feb 6, 2023 at 8:36 PM Andrew Jones wrote: > > > > On Mon, Feb 06, 2023 at 12:18:06PM +0100, Philippe Mathieu-Daudé wrote: > > > On 6/2/23 11:54, Andrea Bolognani wrote: > > > > On Thu, Feb 02, 2023 at 10:22:15AM +0530, Sunil V L

[PATCH 1/1] readline: fix hmp completion issue

The auto completion does not work in some cases. Case 1. 1. (qemu) info reg 2. Press 'Tab'. 3. It does not auto complete. Case 2. 1. (qemu) block_resize flo 2. Press 'Tab'. 3. It does not auto complete 'floppy0'. Since the readline_add_completion_of() may add any completion when strlen(pfx)

[PATCH] roms/opensbi: Upgrade from v1.1 to v1.2

Upgrade OpenSBI from v1.1 to v1.2 and the pre-built bios images. The v1.2 release includes the following commits: 994c8cf lib: sbi_timer: Added a conditional wait function which can timeout caa5eea lib: sbi: add check for ipi device for hsm start 0374ccf lib: sbi_hart: Shorten the code to set

Re: [PATCH 02/10] hw/riscv/virt: Add a switch to enable/disable ACPI

On Mon, Feb 6, 2023 at 8:36 PM Andrew Jones wrote: > > On Mon, Feb 06, 2023 at 12:18:06PM +0100, Philippe Mathieu-Daudé wrote: > > On 6/2/23 11:54, Andrea Bolognani wrote: > > > On Thu, Feb 02, 2023 at 10:22:15AM +0530, Sunil V L wrote: > > > > +object_class_property_add(oc, "acpi",

Re: [PATCH 1/3] hw/gpio: add PCA6414 i2c GPIO expander

On Mon, 6 Feb 2023 at 19:51, Titus Rwantare wrote: > > This is a simple i2c device that allows i2c capable devices to have > GPIOs. Nice. In Linux this is supported by a driver called pca953x. Would it make sense to name your model similarly (both the file and the prefixes you use)? If we do

Re: [PATCH] configure: Add 'mkdir build' check

Hi, thanks for the feedback - I'll revise it. Small question - Paolo Bonzini specified that 'configure --help' should work even if the build doesn't. Currently the script functions that handle argument reading aren't initialized or run until after the build is done, so if the build fails, so do

Re: [PATCH v3 0/6] Support for new CPU model SapphireRapids

On 2/2/2023 7:05 PM, Igor Mammedov wrote: > On Fri, 6 Jan 2023 00:38:20 -0800 > Lei Wang wrote: > >> This series aims to add a new CPU model SapphireRapids, and tries to >> address the problem stated in >>

Re: [PATCH] hw/riscv: virt: Simplify virt_{get,set}_aclint()

On Mon, Feb 6, 2023 at 6:51 PM Bin Meng wrote: > > There is no need to declare an intermediate "MachineState *ms". > > Signed-off-by: Bin Meng Thanks! Applied to riscv-to-apply.next Alistair > --- > > hw/riscv/virt.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff

Re: pixman_blt on aarch64

On 2023/02/06 4:16, Richard Henderson wrote: On 2/5/23 08:44, BALATON Zoltan wrote: On Sun, 5 Feb 2023, Richard Henderson wrote: On 2/4/23 06:57, BALATON Zoltan wrote: This has just bounced, I hoped to still be able to post after moderation but now I'm resending it after subscribing to the

Re: Should qemu-system-loongarch64 support -smbios?

在 2023/2/3 下午11:55, Markus Armbruster 写道: Commit 3efa6fa1e62 "hw/loongarch: Add smbios support" enabled CONFIG_SMBIOS for target loongarch64, by adding select SMBIOS to hw/loongarch/Kconfig. It didn't enable CLI option -smbios in qemu-options.hx. It's enabled for the other targets

RE: [PATCH 1/3] hw/gpio: add PCA6414 i2c GPIO expander

> -Original Message- > From: qemu-devel-bounces+eddie.dong=intel@nongnu.org devel-bounces+eddie.dong=intel@nongnu.org> On Behalf Of Titus > Rwantare > Sent: Monday, February 6, 2023 11:50 AM > To: peter.mayd...@linaro.org > Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; Titus

[PULL 09/30] migration/ram: Don't explicitly unprotect when unregistering uffd-wp

From: David Hildenbrand When unregistering uffd-wp, older kernels before commit f369b07c86143 ("mm/uffd:reset write protection when unregister with wp-mode") won't clear the uffd-wp PTE bit. When re-registering uffd-wp, the previous uffd-wp PTE bits would trigger again. With above commit, the

[PULL 27/30] multifd: Fix a race on reading MultiFDPages_t.block

From: Zhenzhong Duan In multifd_queue_page() MultiFDPages_t.block is checked twice. Between the two checks, MultiFDPages_t.block may be reset to NULL by multifd thread. This lead to the 2nd check always true then a redundant page submitted to multifd thread again. Signed-off-by: Zhenzhong Duan

[PULL 18/30] virtio-mem: Migrate immutable properties early

From: David Hildenbrand The bitmap and the size are immutable while migration is active: see virtio_mem_is_busy(). We can migrate this information early, before migrating any actual RAM content. Further, all information we need for sanity checks is immutable as well. Having this information in

Re: Call for GSoC and Outreachy project ideas for summer 2023

On Mon, 6 Feb 2023 at 13:48, Eugenio Perez Martin wrote:> > Thanks for all the feedback, it makes the proposal way clearer. I add > the updated proposals here, please let me know if you think they need > further modifications. Thanks, I have added them to the wiki:

[PULL 10/30] migration/ram: Rely on used_length for uffd_change_protection()

From: David Hildenbrand ram_mig_ram_block_resized() will abort migration (including background snapshots) when resizing a RAMBlock. ram_block_populate_read() will only populate RAM up to used_length, so at least for anonymous memory protecting everything between used_length and max_length won't

[PULL 19/30] virtio-mem: Proper support for preallocation with migration

From: David Hildenbrand Ordinary memory preallocation runs when QEMU starts up and creates the memory backends, before processing the incoming migration stream. With virtio-mem, we don't know which memory blocks to preallocate before migration started. Now that we migrate the virtio-mem bitmap

[PULL 28/30] multifd: Fix flush of zero copy page send request

From: Zhenzhong Duan Make IO channel flush call after the inflight request has been drained in multifd thread, or else we may missed to flush the inflight request. Signed-off-by: Zhenzhong Duan Reviewed-by: Juan Quintela Signed-off-by: Juan Quintela --- .../x86_64-quintela-devices.mak

[PULL 14/30] migration/savevm: Allow immutable device state to be migrated early (i.e., before RAM)

From: David Hildenbrand For virtio-mem, we want to have the plugged/unplugged state of memory blocks available before migrating any actual RAM content, and perform sanity checks before touching anything on the destination. This information is immutable on the migration source while migration is

[PULL 30/30] migration: save/delete migration thread info

From: Jiang Jiacheng To support query migration thread infomation, save and delete thread(live_migration and multifdsend) information at thread creation and finish. Signed-off-by: Jiang Jiacheng Signed-off-by: Juan Quintela --- migration/migration.c | 5 + migration/multifd.c | 5 +

[PULL 26/30] migration: check magic value for deciding the mapping of channels

From: "manish.mishra" Current logic assumes that channel connections on the destination side are always established in the same order as the source and the first one will always be the main channel followed by the multifid or post-copy preemption channel. This may not be always true, as even if

[PULL 05/30] migration: simplify migration_iteration_run()

Signed-off-by: Juan Quintela Reviewed-by: Dr. David Alan Gilbert --- migration/migration.c | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/migration/migration.c b/migration/migration.c index 7cab4b8192..6d4cd8083b 100644 --- a/migration/migration.c

[PULL 06/30] util/userfaultfd: Add uffd_open()

From: Peter Xu Add a helper to create the uffd handle. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Juan Quintela Signed-off-by: Peter Xu Signed-off-by: Juan Quintela --- include/qemu/userfaultfd.h | 12 migration/postcopy-ram.c | 11 +--

[PULL 17/30] virtio-mem: Fail if a memory backend with "prealloc=on" is specified

From: David Hildenbrand "prealloc=on" for the memory backend does not work as expected, as virtio-mem will simply discard all preallocated memory immediately again. In the best case, it's an expensive NOP. In the worst case, it's an unexpected allocation error. Instead, "prealloc=on" should be

[PULL 20/30] migration: Show downtime during postcopy phase

From: Peter Xu The downtime should be displayed during postcopy phase because the switchover phase is done. OTOH it's weird to show "expected downtime" which can confuse what does that mean if the switchover has already happened anyway. This is a slight ABI change on QMP, but I assume it

[PULL 29/30] migration: Introduce interface query-migrationthreads

From: Jiang Jiacheng Introduce interface query-migrationthreads. The interface is used to query information about migration threads and returns with migration thread's name and its id. Introduce threadinfo.c to manage threads with migration. Signed-off-by: Jiang Jiacheng Reviewed-by: Juan

[PULL 15/30] migration/vmstate: Introduce VMSTATE_WITH_TMP_TEST() and VMSTATE_BITMAP_TEST()

From: David Hildenbrand We'll make use of both next in the context of virtio-mem. Reviewed-by: Dr. David Alan Gilbert Reviewed-by: Peter Xu Reviewed-by: Michael S. Tsirkin Reviewed-by: Juan Quintela S Signed-off-by: David Hildenbrand Signed-off-by: Juan Quintela ---

[PULL 24/30] migration/dirtyrate: Show sample pages only in page-sampling mode

From: Zhenzhong Duan The value of "Sample Pages" is confusing in mode other than page-sampling. See below: (qemu) calc_dirty_rate -b 10 520 (qemu) info dirty_rate Status: measuring Start Time: 11646834 (ms) Sample Pages: 520 (per GB) Period: 10 (sec) Mode: dirty-bitmap Dirty rate: (not ready)

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