On Thu, 23 Feb 2023 16:55:54 -0400
Jason Gunthorpe wrote:
> On Thu, Feb 23, 2023 at 01:06:33PM -0700, Alex Williamson wrote:
> > > #2 is the presumption that the guest is using an identity map.
> >
> > This is a dangerous assumption.
> >
> > > > I'd think the only viable fallback if the
On 2/23/23 11:58, Ilya Leoshkevich wrote:
32-bit guests may enforce only 4-byte alignment for target_rlimit64,
whereas 64-bit hosts normally require the 8-byte one. Therefore
accessing this struct directly is UB.
Fix by adding a local copy.
Fixes: 163a05a8398b ("linux-user: Implement prlimit64
On 23/2/23 22:43, Richard Henderson wrote:
On 2/23/23 11:19, Philippe Mathieu-Daudé wrote:
This file uses tswap() 4 times in the same function: get_note_sizes(),
so I could extract it to a dump-target.c unit.
I have no clue what that file is for, but this particularity is odd.
All uses of
On Thu, 2023-02-23 at 23:17 +0100, Philippe Mathieu-Daudé wrote:
> On 23/2/23 22:58, Ilya Leoshkevich wrote:
> > 32-bit guests may enforce only 4-byte alignment for
> > target_rlimit64,
> > whereas 64-bit hosts normally require the 8-byte one. Therefore
> > accessing this struct directly is UB.
>
On 2/23/23 11:13, ~vilenka wrote:
From: Vilen Kamalov
gen_shift_rm_T1 in the uses wrong tmp0 register, eflags calculation uses tmp4
at target/i386/tcg/translate.c, line 5488
`tcg_gen_mov_tl(cpu_cc_src, s->tmp4);`
QEMU fails to pass int3 in next sample, vs real cpu
-
push rcx
mov
nevermind, I do not understand how it is fixing the problem. :)
On Fri, Feb 24, 2023 at 1:13 AM Vilen Kamalov
wrote:
> Yes, agree that my explanation is incorrect, just looked again, there is a
> code in the default, down the line 5488
>
> default:
> /* Otherwise, generate
On 23/2/23 22:58, Ilya Leoshkevich wrote:
32-bit guests may enforce only 4-byte alignment for target_rlimit64,
whereas 64-bit hosts normally require the 8-byte one. Therefore
accessing this struct directly is UB.
Fix by adding a local copy.
Shouldn't we fix that globally in
Yes, agree that my explanation is incorrect, just looked again, there is a
code in the default, down the line 5488
default:
/* Otherwise, generate EFLAGS and replace the C bit. */
gen_compute_eflags(s);
tcg_gen_deposit_tl(cpu_cc_src, cpu_cc_src,
*
On Thu, Feb 23, 2023 at 03:33:00PM +, Daniel P. Berrangé wrote:
> IIUC, we already have available compute resources from a couple of
> sources we could put into service. The main issue is someone to
> actually configure them to act as runners *and* maintain their
> operation indefinitely going
On Tue, Jan 24, 2023, Juan Quintela wrote:
> Please, send any topic that you are interested in covering in the next
> call in 2 weeks.
>
> We have already topics:
> - single qemu binary
> People on previous call (today) asked if Markus, Paolo and Peter could
> be there on next one to further
Now that the previous commit ("hw/mips/gt64xxx_pci: Don't
endian-swap GT_PCI0_CFGADDR") fixed the issue accessing
the GT64120 PCI config-address register on big-endian
targets, we can enable this TuxRun test.
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on:
On 2/23/23 11:13, ~vilenka wrote:
From: Vilen Kamalov
gen_shift_rm_T1 in the uses wrong tmp0 register, eflags calculation uses tmp4
at target/i386/tcg/translate.c, line 5488
`tcg_gen_mov_tl(cpu_cc_src, s->tmp4);`
The line you quote only applies to the bit instructions, bt/bts/btr/btc, so
Check that dying due to a signal does not deadlock.
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/multiarch/linux/linux-fork-trap.c | 51 +
1 file changed, 51 insertions(+)
create mode 100644
Hi,
Richard reported [1] that the new linux-fork-trap test was failing
under UBSan [2], so it was excluded from the PR.
This is a resend of the test plus the fix for the additional issue that
it uncovered.
[1] https://lists.gnu.org/archive/html/qemu-devel/2023-02/msg06130.html
[2]
32-bit guests may enforce only 4-byte alignment for target_rlimit64,
whereas 64-bit hosts normally require the 8-byte one. Therefore
accessing this struct directly is UB.
Fix by adding a local copy.
Fixes: 163a05a8398b ("linux-user: Implement prlimit64 syscall")
Reported-by: Richard Henderson
On 23/2/23 17:19, Jiaxun Yang wrote:
145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE
MemoryRegionOps") converted CFGADDR/CFGDATA registers to use PCI_HOST_BRIDGE's
accessor facility and enabled byte swap for both CFGADDR/CFGDATA register.
However CFGADDR as a ISD internal
On 23/02/2023 21:50, Alex Williamson wrote:
> On Thu, 23 Feb 2023 21:19:12 +
> Joao Martins wrote:
>
>> On 23/02/2023 21:05, Alex Williamson wrote:
>>> On Thu, 23 Feb 2023 10:37:10 +
>>> Joao Martins wrote:
On 22/02/2023 22:10, Alex Williamson wrote:
> On Wed, 22 Feb 2023
On Thu, 23 Feb 2023 21:19:12 +
Joao Martins wrote:
> On 23/02/2023 21:05, Alex Williamson wrote:
> > On Thu, 23 Feb 2023 10:37:10 +
> > Joao Martins wrote:
> >> On 22/02/2023 22:10, Alex Williamson wrote:
> >>> On Wed, 22 Feb 2023 19:49:05 +0200
> >>> Avihai Horon wrote:
>
On 2/23/23 11:19, Philippe Mathieu-Daudé wrote:
This file uses tswap() 4 times in the same function: get_note_sizes(),
so I could extract it to a dump-target.c unit.
I have no clue what that file is for, but this particularity is odd.
All uses of tswap in that file are wrong, and should be
ping^2
On 7/2/23 10:11, Philippe Mathieu-Daudé wrote:
Ping?
On 19/1/23 11:26, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0fe50d01e3..73e9cb33f5 100644
---
On 23/2/23 21:43, Richard Henderson wrote:
If translation is disabled, the default memory type is Device,
which requires alignment checking. This is more optimially done
"optimally"?
early via the MemOp given to the TCG memory operation.
Reported-by: Idan Horowitz
Resolves:
On 1/30/23 17:01, Akihiko Odaki wrote:
We found a case where the source passed to flatview_write_continue() may
overlap with the destination when fuzzing igb, a new proposed network
device with sanitizers.
igb uses pci_dma_map() to get Tx packet, and pci_dma_write() to write Rx
buffer. While
On 23/2/23 21:43, Richard Henderson wrote:
Allow the target to set tlb flags to apply to all of the
comparators. Remove MemTxAttrs.byte_swap, as the bit is
not relevant to memory transactions, only the page mapping.
Adjust target/sparc to set TLB_BSWAP directly.
Signed-off-by: Richard
On 23/2/23 21:43, Richard Henderson wrote:
These fields are no longer used.
(last use removed in commit 937f224559 "target/arm: Use
probe_access_full for BTI").
Target specific extensions
to the page tables should be done with TARGET_PAGE_ENTRY_EXTRA.
Signed-off-by: Richard Henderson
---
On 23/02/2023 20:55, Jason Gunthorpe wrote:
> On Thu, Feb 23, 2023 at 01:06:33PM -0700, Alex Williamson wrote:
>>> #2 is the presumption that the guest is using an identity map.
>> Isn't it reasonable to require that a device support dirty tracking for
>> the entire extent if its DMA address width
On 23/2/23 21:43, Richard Henderson wrote:
Atomic operations are read-modify-write, and we'd like to
be able to test both read and write with one call. This is
easy enough, with BP_MEM_READ | BP_MEM_WRITE.
Add BP_HIT_SHIFT to make it easy to set BP_WATCHPOINT_HIT_*.
Signed-off-by: Richard
On 23/2/23 21:43, Richard Henderson wrote:
Pass CPUTLBEntryFull to get_physical_address instead
of a collection of pointers.
Signed-off-by: Richard Henderson
---
Cc: Mark Cave-Ayland
Cc: Artyom Tarasenko
---
target/sparc/mmu_helper.c | 121 +-
1 file
On Thu, Feb 23, 2023 at 02:36:33AM -0500, Michael S. Tsirkin wrote:
> On Wed, Feb 22, 2023 at 03:21:42PM -0500, Michael S. Tsirkin wrote:
> > On Wed, Feb 22, 2023 at 08:25:19PM +0200, Anton Kuchin wrote:
> > > On 22/02/2023 19:12, Michael S. Tsirkin wrote:
> > > > On Wed, Feb 22, 2023 at
On 23/2/23 19:01, Richard Henderson wrote:
On 2/23/23 00:09, Philippe Mathieu-Daudé wrote:
+#include "cpu.h"
Does it work to include "exec/cpu-all.h" instead?
We get:
include/exec/cpu-all.h:110:5: warning: 'TARGET_LONG_SIZE' is not
defined, evaluates to 0 [-Wundef]
#if TARGET_LONG_SIZE
On 23/02/2023 21:05, Alex Williamson wrote:
> On Thu, 23 Feb 2023 10:37:10 +
> Joao Martins wrote:
>> On 22/02/2023 22:10, Alex Williamson wrote:
>>> On Wed, 22 Feb 2023 19:49:05 +0200
>>> Avihai Horon wrote:
From: Joao Martins
@@ -612,6 +665,16 @@ static int
Hello,
I have found that x86_64 shift instructions incorrectly set eflags.
Vilen Kamalov (1):
target/i386: Fix gen_shift_rm_T1, wrong eflags calculation
target/i386/tcg/translate.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
--
2.34.7
From: Vilen Kamalov
gen_shift_rm_T1 in the uses wrong tmp0 register, eflags calculation uses tmp4
at target/i386/tcg/translate.c, line 5488
`tcg_gen_mov_tl(cpu_cc_src, s->tmp4);`
QEMU fails to pass int3 in next sample, vs real cpu
-
push rcx
mov dword ptr [rsp], 01000h
mov rcx,
On Thu, 23 Feb 2023 17:25:12 +0200
Avihai Horon wrote:
> On 22/02/2023 22:58, Alex Williamson wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On Wed, 22 Feb 2023 19:48:58 +0200
> > Avihai Horon wrote:
> >
> >> @@ -302,23 +380,44 @@ static void
On Thu, 23 Feb 2023, Bernhard Beschow wrote:
The real VIA south bridges implement a PCI IRQ router which is configured
by the BIOS or the OS. In order to respect these configurations, QEMU
needs to implement it as well.
Note: The implementation was taken from piix4_set_irq() in hw/isa/piix4.
On 12/16/22 12:52, Philippe Mathieu-Daudé wrote:
'dh_ctype_f32' is defined as 'float32', itself declared
in "fpu/softfloat-types.h". Include this header to avoid
when refactoring other headers:
In file included from include/exec/helper-proto.h:7,
from
On Thu, 23 Feb 2023 10:37:10 +
Joao Martins wrote:
> On 22/02/2023 22:10, Alex Williamson wrote:
> > On Wed, 22 Feb 2023 19:49:05 +0200
> > Avihai Horon wrote:
> >> From: Joao Martins
> >> @@ -612,6 +665,16 @@ static int vfio_dma_map(VFIOContainer *container,
> >> hwaddr iova,
> >>
On Thu, Feb 23, 2023 at 01:06:33PM -0700, Alex Williamson wrote:
> > #2 is the presumption that the guest is using an identity map.
>
> This is a dangerous assumption.
>
> > > I'd think the only viable fallback if the vIOMMU doesn't report its max
> > > IOVA is the full 64-bit address space,
On Thu, Feb 23, 2023 at 01:16:40PM -0700, Alex Williamson wrote:
> On Thu, 23 Feb 2023 15:30:28 -0400
> Jason Gunthorpe wrote:
>
> > On Thu, Feb 23, 2023 at 12:27:23PM -0700, Alex Williamson wrote:
> > > So again, I think I'm just looking for a better comment that doesn't
> > > add FUD to the
Am 7. Februar 2023 20:52:02 UTC schrieb Mark Cave-Ayland
:
>On 06/02/2023 23:40, Bernhard Beschow wrote:
>
>> Am 5. Februar 2023 22:32:03 UTC schrieb Mark Cave-Ayland
>> :
>>> On 05/02/2023 22:21, BALATON Zoltan wrote:
>>>
On Sun, 5 Feb 2023, Mark Cave-Ayland wrote:
> On 26/01/2023
These fields are no longer used. Target specific extensions
to the page tables should be done with TARGET_PAGE_ENTRY_EXTRA.
Signed-off-by: Richard Henderson
---
include/exec/memattrs.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/exec/memattrs.h
Fixes a bug in that we weren't reporting these changes.
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 40 +---
1 file changed, 29 insertions(+), 11 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 74ad8e0876..e0765c8c10
While changes are made to prot within tlb_set_page_full, they are
an implementation detail of softmmu. Retain the original for any
target use of probe_access_full.
Fixes: 4047368938f6 ("accel/tcg: Introduce tlb_set_page_full")
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c | 1 -
1
We have run out of bits we can use within the CPUTLBEntry comparators,
as TLB_FLAGS_MASK cannot overlap alignment.
Store slow_flags[] in CPUTLBEntryFull, and merge with the flags from
the comparator. A new TLB_FORCE_SLOW bit is set within the comparator
as an indication that the slow path must
Atomic operations are read-modify-write, and we'd like to
be able to test both read and write with one call. This is
easy enough, with BP_MEM_READ | BP_MEM_WRITE.
Add BP_HIT_SHIFT to make it easy to set BP_WATCHPOINT_HIT_*.
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 7
Now that we have removed TARGET_PAGE_BITS_MIN-6 from
TLB_FLAGS_MASK, we can test for 32-byte alignment.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index
Pass CPUTLBEntryFull to get_physical_address instead
of a collection of pointers.
Signed-off-by: Richard Henderson
---
Cc: Mark Cave-Ayland
Cc: Artyom Tarasenko
---
target/sparc/mmu_helper.c | 121 +-
1 file changed, 54 insertions(+), 67 deletions(-)
diff
If translation is enabled, and the PTE memory type is Device,
enable checking alignment via TLB_CHECK_ALIGNMENT. While the
check is done later than it should be per the ARM, it's better
than not performing the check at all.
Signed-off-by: Richard Henderson
---
target/arm/ptw.c | 28
Allow the target to set tlb flags to apply to all of the
comparators. Remove MemTxAttrs.byte_swap, as the bit is
not relevant to memory transactions, only the page mapping.
Adjust target/sparc to set TLB_BSWAP directly.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 3 +++
This creates a per-page method for checking of alignment.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 4 +++-
accel/tcg/cputlb.c | 25 -
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
Using an atomic write or read-write insn on ROM is basically
a happens-never case. Handle it via stop-the-world, which
will generate non-atomic serial code, where we can correctly
ignore the write while producing the correct read result.
Signed-off-by: Richard Henderson
---
accel/tcg/cputlb.c
This frees up one bit of the primary tlb flags without
impacting the TLB_NOTDIRTY logic.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 12 ++--
accel/tcg/cputlb.c | 23 ---
2 files changed, 22 insertions(+), 13 deletions(-)
diff --git
If translation is disabled, the default memory type is Device,
which requires alignment checking. This is more optimially done
early via the MemOp given to the TCG memory operation.
Reported-by: Idan Horowitz
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1204
Signed-off-by: Richard
Based-on: 20230216025739.1211680-1-richard.hender...@linaro.org
("[PATCH v2 00/30] tcg: Improve atomicity support")
This adds some plumbing to handle an ARM page table corner case.
But first, we need to reorg the page table bits to make room,
and in the process resolve a long-standing FIXME for
On Thu, Feb 23, 2023 at 12:48:18PM +0100, Kevin Wolf wrote:
> Am 21.02.2023 um 23:13 hat Stefan Hajnoczi geschrieben:
> > On Fri, Feb 03, 2023 at 04:21:39PM +0100, Kevin Wolf wrote:
> > > After introducing the graph lock in a previous series, this series
> > > actually starts making widespread use
Hi Alex,
> Daniel P. Berrangé writes:
>
>> On Thu, Feb 23, 2023 at 11:21:53AM -0300, Fabiano Rosas wrote:
>>> I'm not sure if this was discussed previously, but I noticed we're not
>>> pulling the images we push to the registry at every pipeline run.
>>>
>>> I would expect we don't actually
On Thu, Feb 23, 2023 at 3:23 PM BALATON Zoltan wrote:
> On Thu, 23 Feb 2023, Bernhard Beschow wrote:
> > On Thu, Feb 23, 2023 at 1:34 PM BALATON Zoltan
> wrote:
> >> I don't get your approach.
> >
> > I hope that I could help you get a better understanding. The linked
> > .pdf
This series is v2 of [1] ("[PATCH 0/5] Pegasos2 fixes and audio output
support"). It makes PCI interrupt routing on the VIA south bridges more
compliant to the PCI specification and adds partial implementation of the
via-ac97 sound part enough to get audio output working on the ppc/pegasos2
The firmware of the real PegasosII board routes all PIRQx to IRQ9, so do
the same in QEMU. The PCI_INTERRUPT_LINE registers of the respective
internal PCI functions are already initialized with IRQ9 which are
currently used for routing.
Note that the PCI interrupt router isn't implemented yet in
The real VIA south bridges implement a PCI IRQ router which is configured
by the BIOS or the OS. In order to respect these configurations, QEMU
needs to implement it as well.
Note: The implementation was taken from piix4_set_irq() in hw/isa/piix4.
Signed-off-by: Bernhard Beschow
---
From: BALATON Zoltan
This adds basic implementation of the AC'97 sound part used in VIA
south bridge chips. Not all features of the device is emulated, only
one playback channel is supported but this is enough to get sound
output from some guests running on machines using this device such as
From: BALATON Zoltan
These can be shared with other AC97 implementations.
Signed-off-by: BALATON Zoltan
---
hw/audio/ac97.h | 65 +
hw/audio/ac97.c | 43 +---
2 files changed, 66 insertions(+), 42 deletions(-)
create
According to the PCI specification, PCI_INTERRUPT_LINE shall have no
effect on hardware operations. Now that the VIA south bridges implement
the internal PCI interrupt router let's be more conformant to the PCI
specification.
Signed-off-by: Bernhard Beschow
---
hw/usb/vt82c686-uhci-pci.c | 12
On 23/2/23 20:13, Thomas Huth wrote:
When handling pull requests in the staging branch, it often happens
that one of the job fails due to a problem, so that the pull request
can't be merged. Peter/Richard/Stefan then informs the sender of the
pull request and continues by pushing the next
On Thu, 23 Feb 2023 15:30:28 -0400
Jason Gunthorpe wrote:
> On Thu, Feb 23, 2023 at 12:27:23PM -0700, Alex Williamson wrote:
> > So again, I think I'm just looking for a better comment that doesn't
> > add FUD to the reasoning behind switching to a single range,
>
> It isn't a single range,
On Wed, 22 Feb 2023 22:08:33 -0400
Jason Gunthorpe wrote:
> On Wed, Feb 22, 2023 at 04:34:39PM -0700, Alex Williamson wrote:
> > > +/*
> > > + * With vIOMMU we try to track the entire IOVA space. As the IOVA
> > > space can
> > > + * be rather big, devices might not be able to track
Am 21.02.23 um 19:44 schrieb BALATON Zoltan:
This adds basic implementation of the AC'97 sound part used in VIA
south bridge chips. Not all features of the device is emulated, only
one playback channel is supported but this is enough to get sound
output from some guests running on machines using
For long-term distributions that release a new version only very
seldom, we limit the support to five years after the initial release.
Otherwise, we might need to support distros like openSUSE 15 for
up to 7 or even more years in total due to our "two more years
after the next major release" rule,
On Fri, 10 Feb 2023 09:30:18 +
Yangming via wrote:
> Hello all:
>
> I found VM crashed while hot-plugging memory.
>
> Base infomation:
> qemu version: qemu-master
> requirements: hugepages, virtio-gpu
>
> It happens by the following steps:
> 1. Booting a VM with hugepages and a virtio-gpu
On Thu, Feb 23, 2023 at 12:27:23PM -0700, Alex Williamson wrote:
> So again, I think I'm just looking for a better comment that doesn't
> add FUD to the reasoning behind switching to a single range,
It isn't a single range, it is a single page of ranges, right?
The comment should say
"Keep the
On Wed, 22 Feb 2023 22:02:24 -0400
Jason Gunthorpe wrote:
> On Wed, Feb 22, 2023 at 03:40:43PM -0700, Alex Williamson wrote:
> > > +/*
> > > + * DMA logging uAPI guarantees to support at least num_ranges that
> > > fits into
> > > + * a single host kernel page. To be on the safe
When handling pull requests in the staging branch, it often happens
that one of the job fails due to a problem, so that the pull request
can't be merged. Peter/Richard/Stefan then informs the sender of the
pull request and continues by pushing the next pending pull request
from another subsystem
From: Emanuele Giuseppe Esposito
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_flush() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add
On 2023-02-20 10:44, Daniel P. Berrangé wrote:
On Mon, Feb 13, 2023 at 01:00:49PM -0500, matoro_mailinglist_qemu---
via wrote:
From: matoro
The existing implementation assumes that client/server certificates
are
single individual certificates. If using publicly-issued
certificates,
or
From: Emanuele Giuseppe Esposito
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_pdiscard() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add
On 2/23/23 19:04, Philippe Mathieu-Daudé wrote:
Although TCGv is defined as TCGv_i64 on alpha,
make it clear tcg_temp_new_i64() returns a TCGv_i64.
Free calling tcg_temp_free_i64().
Suggested-by: Ilya Leoshkevich
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 4 ++--
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_register_buf() and bdrv_unregister_buf() need to hold a reader lock
for the graph.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-21-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin
From: Emanuele Giuseppe Esposito
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_copy_range() need to hold a reader lock for the graph.
Signed-off-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-15-kw...@redhat.com>
Reviewed-by:
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_block_status() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add assume_graph_lock()
with a FIXME comment.
From: Emanuele Giuseppe Esposito
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_is_inserted() need to hold a reader lock for the graph.
blk_is_inserted() is done as a co_wrapper_mixed_bdrv_rdlock (unlike most
other blk_* functions) because it is called a lot from other
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-16-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
---
include/block/block_int-common.h | 12 +++-
include/block/block_int-io.h | 8
block/copy-before-write.c| 6
From: Or Ozeri
Ceph RBD encryption API required specifying the encryption format
for loading encryption. The supported formats were LUKS (v1) and LUKS2.
Starting from Reef release, RBD also supports loading with "luks-any" format,
which works for both versions of LUKS.
This commit extends the
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_io_plug() and bdrv_co_io_unplug() need to hold a reader lock for
the graph.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-18-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_pwrite_zeroes() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add assume_graph_lock()
with a FIXME comment.
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_*_dirty_bitmap() need to hold a reader lock for the graph.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-23-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
---
From: Stefan Hajnoczi
If requests are being processed in the IOThread when a SCSIDevice is
unplugged, scsi_device_purge_requests() -> scsi_req_cancel_async() races
with I/O completion callbacks. Both threads load and store req->aiocb.
This can lead to assert(r->req.aiocb == NULL) failures and
From: Or Ozeri
Signed-off-by: Or Ozeri
Message-Id: <20230129113120.722708-2-...@oro.sl.cloud9.ibm.com>
Reviewed-by: Ilya Dryomov
Reviewed-by: Kevin Wolf
Signed-off-by: Kevin Wolf
---
block/rbd.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_pwrite_sync() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add assume_graph_lock()
with a FIXME comment.
From: Stefan Hajnoczi
When an IOThread is configured, the ctrl virtqueue is processed in the
IOThread. TMFs that reset SCSI devices are currently called directly
from the IOThread and trigger an assertion failure in blk_drain() from
the following call stack:
virtio_scsi_handle_ctrl_req ->
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_pread*/pwrite*() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add assume_graph_lock()
with a FIXME comment.
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_delete_file() need to hold a reader lock for the graph.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-22-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
---
From: Or Ozeri
Starting from ceph Reef, RBD has built-in support for layered encryption,
where each ancestor image (in a cloned image setting) can be possibly
encrypted using a unique passphrase.
A new function, rbd_encryption_load2, was added to librbd API.
This new function supports an array
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_driver_*() need to hold a reader lock for the graph. It doesn't add
the annotation to public functions yet.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case,
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_eject() and bdrv_co_lock_medium() need to hold a reader lock for
the graph.
Signed-off-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-20-kw...@redhat.com>
Reviewed-by: Emanuele
It is never called outside of block.c.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-2-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Reviewed-by: Vladimir Sementsov-Ogievskiy
Signed-off-by: Kevin Wolf
---
include/block/block-io.h | 2 --
block.c | 4
All callers are already GRAPH_RDLOCK, so just add the annotation and
remove assume_graph_lock().
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-14-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
---
block/io.c | 7 +++
1 file changed, 3
From: Emanuele Giuseppe Esposito
This function is called in two different places:
- timer callback, which does not take the graph rdlock.
- bdrv_qed_drain_begin(), which is .bdrv_drain_begin()
callback documented as function that does not take the lock.
Since it calls recursive functions that
From: Stefan Hajnoczi
dma_blk_cb() only takes the AioContext lock around ->io_func(). That
means the rest of dma_blk_cb() is not protected. In particular, the
DMAAIOCB field accesses happen outside the lock.
There is a race when the main loop thread holds the AioContext lock and
invokes
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_refresh_total_sectors() need to hold a reader lock for the
graph.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-24-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
---
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_ioctl() need to hold a reader lock for the graph.
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-6-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
---
This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_create() need to hold a reader lock for the graph.
Signed-off-by: Emanuele Giuseppe Esposito
Signed-off-by: Kevin Wolf
Message-Id: <20230203152202.49054-17-kw...@redhat.com>
Reviewed-by: Emanuele Giuseppe Esposito
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