[PATCH v3 43/47] e1000e: Notify only new interrupts

In MSI-X mode, if there are interrupts already notified but not cleared and a new interrupt arrives, e1000e incorrectly notifies the notified ones again along with the new one. To fix this issue, replace e1000e_update_interrupt_state() with two new functions: e1000e_raise_interrupts() and

[PATCH v3 20/47] igb: Remove goto

The goto is a bit confusing as it changes the control flow only if L4 protocol is not recognized. It is also different from e1000e, and noisy when comparing e1000e and igb. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/igb_core.c | 2 +- 1 file changed, 1 insertion(+),

[PATCH v3 09/47] igb: Always copy ethernet header

igb_receive_internal() used to check the iov length to determine copy the iovs to a contiguous buffer, but the check is flawed in two ways: - It does not ensure that iovcnt > 0. - It does not take virtio-net header into consideration. The size of this copy is just 22 octets, which can be even

[PATCH v3 33/47] tests/qtest/libqos/igb: Set GPIE.Multiple_MSIX

GPIE.Multiple_MSIX is not set by default, and needs to be set to get interrupts from multiple MSI-X vectors. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- tests/qtest/libqos/igb.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/libqos/igb.c

[PATCH v3 21/47] igb: Read DCMD.VLE of the first Tx descriptor

Section 7.2.2.3 Advanced Transmit Data Descriptor says: > For frames that spans multiple descriptors, all fields apart from > DCMD.EOP, DCMD.RS, DCMD.DEXT, DTALEN, Address and DTYP are valid only > in the first descriptors and are ignored in the subsequent ones. Signed-off-by: Akihiko Odaki

[PATCH v3 39/47] igb: Filter with the second VLAN tag for extended VLAN

Signed-off-by: Akihiko Odaki --- hw/net/igb_core.c | 23 ++- 1 file changed, 18 insertions(+), 5 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index a51c435084..667ff47701 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -69,7 +69,7 @@ typedef

[PATCH v3 32/47] hw/net/net_rx_pkt: Enforce alignment for eth_header

eth_strip_vlan and eth_strip_vlan_ex refers to ehdr_buf as struct eth_header. Enforce alignment for the structure. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/net_rx_pkt.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git

[PATCH v3 41/47] igb: Implement Rx PTP2 timestamp

Signed-off-by: Akihiko Odaki --- hw/net/igb_common.h | 16 +++--- hw/net/igb_regs.h | 23 hw/net/igb_core.c | 129 3 files changed, 127 insertions(+), 41 deletions(-) diff --git a/hw/net/igb_common.h b/hw/net/igb_common.h index

[PATCH v3 05/47] igb: Do not require CTRL.VME for tx VLAN tagging

While the datasheet of e1000e says it checks CTRL.VME for tx VLAN tagging, igb's datasheet has no such statements. It also says for "CTRL.VLE": > This register only affects the VLAN Strip in Rx it does not have any > influence in the Tx path in the 82576. (Appendix A. Changes from the 82575)

[PATCH v3 25/47] igb: Share common VF constants

The constants need to be consistent between the PF and VF. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Sriram Yagnaraman --- hw/net/igb_common.h | 8 hw/net/igb.c| 10 +- hw/net/igbvf.c | 7 --- 3 files changed, 13

[PATCH v3 45/47] vmxnet3: Do not depend on PC

vmxnet3 has no dependency on PC, and VMware Fusion actually makes it available on Apple Silicon according to: https://kb.vmware.com/s/article/90364 Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- hw/net/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH v3 36/47] igb: Implement Rx SCTP CSO

Signed-off-by: Akihiko Odaki --- hw/net/igb_regs.h | 1 + include/net/eth.h | 4 ++- include/qemu/crc32c.h | 1 + hw/net/e1000e_core.c | 5 hw/net/igb_core.c | 15 +- hw/net/net_rx_pkt.c | 64 +++ net/eth.c | 4

[PATCH v3 10/47] Fix references to igb Avocado test

Fixes: 9f95111474 ("tests/avocado: re-factor igb test to avoid timeouts") Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS| 2 +- docs/system/devices/igb.rst| 2 +-

[PATCH v3 16/47] e1000x: Take CRC into consideration for size check

Section 13.7.15 Receive Length Error Count says: > Packets over 1522 bytes are oversized if LongPacketEnable is 0b > (RCTL.LPE). If LongPacketEnable (LPE) is 1b, then an incoming packet > is considered oversized if it exceeds 16384 bytes. > These lengths are based on bytes in the received packet

[PATCH v3 27/47] igb: Clear EICR bits for delayed MSI-X interrupts

Section 7.3.4.1 says: > When auto-clear is enabled for an interrupt cause, the EICR bit is > set when a cause event mapped to this vector occurs. When the EITR > Counter reaches zero, the MSI-X message is sent on PCIe. Then the > EICR bit is cleared and enabled to be set by a new cause event

[PATCH v3 35/47] igb: Use UDP for RSS hash

e1000e does not support using UDP for RSS hash, but igb does. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/igb_regs.h | 3 +++ hw/net/igb_core.c | 16 2 files changed, 19 insertions(+) diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index

[PATCH v3 46/47] MAINTAINERS: Add a reviewer for network packet abstractions

I have made significant changes for network packet abstractions so add me as a reviewer. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index c31d2279ab..8b2ef5943c 100644 ---

[PATCH v3 31/47] net/eth: Always add VLAN tag

It is possible to have another VLAN tag even if the packet is already tagged. Signed-off-by: Akihiko Odaki --- include/net/eth.h | 4 ++-- hw/net/net_tx_pkt.c | 16 +++- net/eth.c | 22 ++ 3 files changed, 15 insertions(+), 27 deletions(-) diff

[PATCH v3 12/47] tests/avocado: Remove test_igb_nomsi_kvm

It is unlikely to find more bugs with KVM so remove test_igb_nomsi_kvm to save time to run it. Signed-off-by: Akihiko Odaki Reviewed-by: Thomas Huth Acked-by: Alex Bennée --- tests/avocado/netdev-ethtool.py | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git

[PATCH v3 06/47] igb: Clear IMS bits when committing ICR access

The datasheet says contradicting statements regarding ICR accesses so it is not reliable to determine the behavior of ICR accesses. However, e1000e does clear IMS bits when reading ICR accesses and Linux also expects ICR accesses will clear IMS bits according to:

[PATCH v3 47/47] docs/system/devices/igb: Note igb is tested for DPDK

Signed-off-by: Akihiko Odaki --- docs/system/devices/igb.rst | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/docs/system/devices/igb.rst b/docs/system/devices/igb.rst index afe036dad2..60c10bf7c7 100644 --- a/docs/system/devices/igb.rst +++

[PATCH v3 07/47] net/net_rx_pkt: Use iovec for net_rx_pkt_set_protocols()

igb does not properly ensure the buffer passed to net_rx_pkt_set_protocols() is contiguous for the entire L2/L3/L4 header. Allow it to pass scattered data to net_rx_pkt_set_protocols(). Fixes: 3a977deebe ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki Reviewed-by: Sriram

[PATCH v3 18/47] e1000e: Always log status after building rx metadata

Without this change, the status flags may not be traced e.g. if checksum offloading is disabled. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- hw/net/e1000e_core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/net/e1000e_core.c

[PATCH v3 40/47] igb: Implement igb-specific oversize check

igb has a configurable size limit for LPE, and uses different limits depending on whether the packet is treated as a VLAN packet. Signed-off-by: Akihiko Odaki --- hw/net/igb_core.c | 36 +--- 1 file changed, 21 insertions(+), 15 deletions(-) diff --git

[PATCH v3 02/47] hw/net/net_tx_pkt: Decouple interface from PCI

This allows to use the network packet abstractions even if PCI is not used. Signed-off-by: Akihiko Odaki --- hw/net/net_tx_pkt.h | 31 --- hw/net/e1000e_core.c | 13 - hw/net/igb_core.c| 13 ++--- hw/net/net_tx_pkt.c | 36

[PATCH v3 37/47] igb: Implement Tx SCTP CSO

Signed-off-by: Akihiko Odaki --- hw/net/net_tx_pkt.h | 8 hw/net/igb_core.c | 12 +++- hw/net/net_tx_pkt.c | 18 ++ 3 files changed, 33 insertions(+), 5 deletions(-) diff --git a/hw/net/net_tx_pkt.h b/hw/net/net_tx_pkt.h index 4d7233e975..0a716e74a5 100644

[PATCH v3 26/47] igb: Fix igb_mac_reg_init coding style alignment

Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- hw/net/igb_core.c | 96 +++ 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 5fb2a38a6f..3c1ef11afd 100644 ---

[PATCH v3 42/47] igb: Implement Tx timestamp

Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/igb_regs.h | 3 +++ hw/net/igb_core.c | 7 +++ 2 files changed, 10 insertions(+) diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index 894705599d..82ff195dfc 100644 --- a/hw/net/igb_regs.h +++ b/hw/net/igb_regs.h @@

[PATCH v3 03/47] e1000x: Fix BPRC and MPRC

Before this change, e1000 and the common code updated BPRC and MPRC depending on the matched filter, but e1000e and igb decided to update those counters by deriving the packet type independently. This inconsistency caused a multicast packet to be counted twice. Updating BPRC and MPRC depending on

[PATCH v3 29/47] igb: Rename a variable in igb_receive_internal()

Rename variable "n" to "causes", which properly represents the content of the variable. Signed-off-by: Akihiko Odaki --- hw/net/igb_core.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index ef29e68096..77e4ee42a5 100644

[PATCH v3 22/47] e1000e: Reset packet state after emptying Tx queue

Keeping Tx packet state after the transmit queue is emptied has some problems: - The datasheet says the descriptors can be reused after the transmit queue is emptied, but the Tx packet state may keep references to them. - The Tx packet state cannot be migrated so it can be reset anytime the

[PATCH v3 30/47] net/eth: Use void pointers

The uses of uint8_t pointers were misleading as they are never accessed as an array of octets and it even require more strict alignment to access as struct eth_header. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- include/net/eth.h | 4 ++-- net/eth.c | 6 +++---

[PATCH v3 38/47] igb: Strip the second VLAN tag for extended VLAN

Signed-off-by: Akihiko Odaki --- hw/net/net_rx_pkt.h | 19 include/net/eth.h| 4 ++-- hw/net/e1000e_core.c | 3 ++- hw/net/igb_core.c| 14 ++-- hw/net/net_rx_pkt.c | 15 + net/eth.c| 52 6

[PATCH v3 01/47] hw/net/net_tx_pkt: Decouple implementation from PCI

This is intended to be followed by another change for the interface. It also fixes the leak of memory mapping when the specified memory is partially mapped. Fixes: e263cd49c7 ("Packet abstraction for VMWARE network devices") Signed-off-by: Akihiko Odaki --- hw/net/net_tx_pkt.h | 9

[PATCH v3 34/47] igb: Implement MSI-X single vector mode

Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/igb_core.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index 77e4ee42a5..46babe85a9 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1873,7

[PATCH v3 14/47] net/eth: Rename eth_setup_vlan_headers_ex

The old eth_setup_vlan_headers has no user so remove it and rename eth_setup_vlan_headers_ex. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- include/net/eth.h | 9 + hw/net/net_tx_pkt.c | 2 +- net/eth.c | 2 +- 3 files changed, 3 insertions(+), 10

[PATCH v3 19/47] igb: Always log status after building rx metadata

Without this change, the status flags may not be traced e.g. if checksum offloading is disabled. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- hw/net/igb_core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c

[PATCH v3 44/47] igb: Notify only new interrupts

This follows the corresponding change for e1000e. This fixes: tests/avocado/netdev-ethtool.py:NetDevEthtool.test_igb Signed-off-by: Akihiko Odaki --- hw/net/igb_core.c | 201 -- hw/net/trace-events | 11 +-

[PATCH v3 28/47] e1000e: Rename a variable in e1000e_receive_internal()

Rename variable "n" to "causes", which properly represents the content of the variable. Signed-off-by: Akihiko Odaki --- hw/net/e1000e_core.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index

[PATCH v3 23/47] vmxnet3: Reset packet state after emptying Tx queue

Keeping Tx packet state after the transmit queue is emptied but this behavior is unreliable as the state can be reset anytime the migration happens. Always reset Tx packet state always after the queue is emptied. Signed-off-by: Akihiko Odaki --- hw/net/vmxnet3.c | 3 ++- 1 file changed, 2

[PATCH v3 24/47] igb: Add more definitions for Tx descriptor

Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/igb_regs.h | 32 +++- hw/net/igb_core.c | 4 ++-- 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index 21ee9a3b2d..eb995d8b2e 100644 ---

[PATCH v3 13/47] hw/net/net_tx_pkt: Remove net_rx_pkt_get_l4_info

This function is not used. Signed-off-by: Akihiko Odaki --- hw/net/net_rx_pkt.h | 9 - hw/net/net_rx_pkt.c | 5 - 2 files changed, 14 deletions(-) diff --git a/hw/net/net_rx_pkt.h b/hw/net/net_rx_pkt.h index a06f5c2675..ce8dbdb284 100644 --- a/hw/net/net_rx_pkt.h +++

[PATCH v3 04/47] igb: Fix Rx packet type encoding

igb's advanced descriptor uses a packet type encoding different from one used in e1000e's extended descriptor. Fix the logic to encode Rx packet type accordingly. Fixes: 3a977deebe ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman ---

[PATCH v3 17/47] e1000x: Rename TcpIpv6 into TcpIpv6Ex

e1000e and igb employs NetPktRssIpV6TcpEx for RSS hash if TcpIpv6 MRQC bit is set. Moreover, igb also has a MRQC bit for NetPktRssIpV6Tcp though it is not implemented yet. Rename it to TcpIpv6Ex to avoid confusion. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman ---

[PATCH v3 00/47] igb: Fix for DPDK

Based-on: <366bbcafdb6e0373f0deb105153768a8c0bded87.ca...@gmail.com> ("[PATCH 0/1] e1000e: Fix tx/rx counters") This series has fixes and feature additions to pass DPDK Test Suite with igb. It also includes a few minor changes related to networking. Patch [01, 10] are bug fixes. Patch [11, 14]

[PATCH v3 11/47] tests/avocado: Remove unused imports

Signed-off-by: Akihiko Odaki --- tests/avocado/netdev-ethtool.py | 1 - 1 file changed, 1 deletion(-) diff --git a/tests/avocado/netdev-ethtool.py b/tests/avocado/netdev-ethtool.py index f7e9464184..8de118e313 100644 --- a/tests/avocado/netdev-ethtool.py +++ b/tests/avocado/netdev-ethtool.py @@

[PATCH v3 15/47] e1000x: Share more Rx filtering logic

This saves some code and enables tracepoint for e1000's VLAN filtering. Signed-off-by: Akihiko Odaki Reviewed-by: Sriram Yagnaraman --- hw/net/e1000x_common.h | 4 +++- hw/net/e1000.c | 35 +-- hw/net/e1000e_core.c | 47

[PATCH v3 08/47] e1000e: Always copy ethernet header

e1000e_receive_internal() used to check the iov length to determine copy the iovs to a contiguous buffer, but the check is flawed in two ways: - It does not ensure that iovcnt > 0. - It does not take virtio-net header into consideration. The size of this copy is just 18 octets, which can be even

Re: [PATCH v5] cxl-cdat:Fix open file not closed in ct3_load_cdat

hi Jonathan: Thank you very much Best regards --- Hao On Fri, 2023-04-21 at 14:14 +0100, Jonathan Cameron wrote: > On Thu, 13 Apr 2023 20:23:58 +0800 > Hao Zeng wrote: > > > Open file descriptor not closed in error paths. Fix by replace > > open coded handling of read of whole file into a

RE: [PATCH v2 6/6] tests/migration: Only run auto_converge in slow mode

> -Original Message- > From: Daniel P. Berrangé > Sent: Saturday, April 22, 2023 1:14 AM > To: qemu-devel@nongnu.org > Cc: qemu-bl...@nongnu.org; Paolo Bonzini ; > Thomas Huth ; John Snow ; Li > Zhijian ; Juan Quintela ; > Stefan Hajnoczi ; Zhang, Chen > ; Laurent Vivier > Subject:

RE: [PATCH v2 1/6] tests/qtest: replace qmp_discard_response with qtest_qmp_assert_success

> -Original Message- > From: Daniel P. Berrangé > Sent: Saturday, April 22, 2023 1:14 AM > To: qemu-devel@nongnu.org > Cc: qemu-bl...@nongnu.org; Paolo Bonzini ; > Thomas Huth ; John Snow ; Li > Zhijian ; Juan Quintela ; > Stefan Hajnoczi ; Zhang, Chen > ; Laurent Vivier ; Daniel P. >

RE: [PATCH v2 4/4] configure: add --disable-colo-filters option

> -Original Message- > From: Vladimir Sementsov-Ogievskiy > Sent: Friday, April 21, 2023 4:53 PM > To: Zhang, Chen ; qemu-devel@nongnu.org > Cc: qemu-bl...@nongnu.org; michael.r...@amd.com; arm...@redhat.com; > ebl...@redhat.com; jasow...@redhat.com; quint...@redhat.com; Zhang, >

RE: [PATCH v2 3/4] build: move COLO under CONFIG_REPLICATION

> -Original Message- > From: Vladimir Sementsov-Ogievskiy > Sent: Friday, April 21, 2023 4:36 PM > To: Zhang, Chen ; qemu-devel@nongnu.org > Cc: qemu-bl...@nongnu.org; michael.r...@amd.com; arm...@redhat.com; > ebl...@redhat.com; jasow...@redhat.com; quint...@redhat.com; Zhang, >

Re: [PATCH 13/13] hw/ide: Extract bmdma_clear_status()

On Sat, 22 Apr 2023, Bernhard Beschow wrote: Extract bmdma_clear_status() mirroring bmdma_cmd_writeb(). Signed-off-by: Bernhard Beschow --- include/hw/ide/pci.h | 1 + hw/ide/cmd646.c | 2 +- hw/ide/pci.c | 7 +++ hw/ide/piix.c| 2 +- hw/ide/sii3112.c | 12

Re: [PATCH 13/13] hw/ide: Extract bmdma_clear_status()

On Sat, 22 Apr 2023, Bernhard Beschow wrote: Extract bmdma_clear_status() mirroring bmdma_cmd_writeb(). Is adding a trace point useful? This is called from places that already have traces so I don't think we need another separate trace point here. Also the names don't match but maybe rename

Re: [PATCH 11/13] hw/ide/sii3112: Reuse PCIIDEState::{cmd,data}_ops

On Sat, 22 Apr 2023, Bernhard Beschow wrote: Allows to unexport pci_ide_{cmd,data}_le_ops and models TYPE_SII3112_PCI as a standard-compliant PCI IDE device. Signed-off-by: Bernhard Beschow --- include/hw/ide/pci.h | 2 -- hw/ide/pci.c | 4 ++-- hw/ide/sii3112.c | 50

Re: [PATCH 01/11] Signed-off-by: Karim Taha

I made a fork on gitlab and pushed a branch at https://gitlab.com/Kariiem/qemu/-/tree/gsoc23-task3/ . On Sat, Apr 22, 2023 at 1:18 AM Warner Losh wrote: > Usually this means pushing a branch off of mastar to a service like github > or gitlab, and then > posting a URL with where to get it. > >

Re: [PATCH 02/13] hw/ide/via: Implement ISA IRQ routing

On Sat, 22 Apr 2023, Bernhard Beschow wrote: Am 22. April 2023 17:23:56 UTC schrieb BALATON Zoltan : On Sat, 22 Apr 2023, Bernhard Beschow wrote: The VIA south bridge allows the legacy IDE interrupts to be routed to four different ISA interrupts. This can be configured through the 0x4a

Re: [RFC PATCH 12/13] HACK: use memory region API to inject memory to guest

On Fri, 21 Apr 2023 at 02:13, Gurchetan Singh wrote: > Though the api does make an exception: > > "There is an exception to the above rule: it is okay to call > object_unparent at any time for an alias or a container region. It is > therefore also okay to create or destroy alias and container

Re: [PATCH 05/13] hw/ide: Extract pci_ide_class_init()

Am 22. April 2023 17:34:30 UTC schrieb BALATON Zoltan : >On Sat, 22 Apr 2023, Bernhard Beschow wrote: >> Resolves redundant code in every PCI IDE device model. > >This patch could be broken up a bit more as it seems to do unrelated changes. >Such as setting DEVICE_CATEGORY_STORAGE in a

Re: [PATCH 02/13] hw/ide/via: Implement ISA IRQ routing

Am 22. April 2023 17:23:56 UTC schrieb BALATON Zoltan : >On Sat, 22 Apr 2023, Bernhard Beschow wrote: >> The VIA south bridge allows the legacy IDE interrupts to be routed to four >> different ISA interrupts. This can be configured through the 0x4a register in >> the PCI configuration space of

Re: [PATCH 08/13] hw/ide: Rename PCIIDEState::*_bar attributes

On Sat, 22 Apr 2023, Bernhard Beschow wrote: The attributes represent memory regions containing operations which are mapped by the device models into PCI BARs. Reflect this by changing the suffic into "_ops". Note that in a few commits piix will also use the {cmd,data}_ops but won't map them

Re: [PATCH 05/13] hw/ide: Extract pci_ide_class_init()

On Sat, 22 Apr 2023, Bernhard Beschow wrote: Resolves redundant code in every PCI IDE device model. This patch could be broken up a bit more as it seems to do unrelated changes. Such as setting DEVICE_CATEGORY_STORAGE in a different way could be a separate patch to make it simpler to review.

Re: [PATCH 04/13] hw/ide: Extract IDEBus assignment into bmdma_init()

On Sat, 22 Apr 2023, Bernhard Beschow wrote: Every invocation of bmdma_init() is followed by `d->bmdma[i].bus = >bus[i]`. Resolve this redundancy by extracting it into bmdma_init(). Signed-off-by: Bernhard Beschow Reviewed-by: BALATON Zoltan

[PATCH 7/7] Added safe_syscalls for time functions.

From: Warner Losh +Added safe_syscalls Signed-off-by: Warner Losh Signed-off-by: Ajeets6 --- bsd-user/freebsd/os-syscall.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/bsd-user/freebsd/os-syscall.c b/bsd-user/freebsd/os-syscall.c index 8fd6eb05cb..3d56aff0fd 100644 ---

[PATCH 1/7] Create os-time.c and add t2h_freebsd_timeval

From: Stacey Son os-time.c contains various functions to convert FreeBSD-specific time structure between host and guest formats Signed-off-by: Ajeets6 Signed-off-by: Stacey Son --- bsd-user/freebsd/os-time.c | 41 ++ 1 file changed, 41 insertions(+)

[PATCH 4/7] Added clock_gettime(2) and clock_getres(2)

From: Stacey Son +Added clock_gettime(2) which gets the time +Added clock_getres(2) which finds the resoultion of the specidfied clock Signed-off-by: Ajeets6 Signed-off-by: Stacey Son --- bsd-user/freebsd/os-time.h | 32 1 file changed, 32 insertions(+) diff

[PATCH 2/7] Create os-time.h and modify os-time.c

From: Stacey Son +add nanosleep(2) in os-time.h +add t2h_freebsd_timeval and h2t_freebsd_timeval time conversion functions -remove t2h_freebsd_timeval in os-time.c Co-Authored-By: Kyle Evans Signed-off-by: Ajeets6 Signed-off-by: Kyle Evans Signed-off-by: Stacey Son ---

[PATCH 6/7] Added case staements for time functions

From: Warner Losh +Added cases for nanosleep(2),clock_nanosleep(2),clock_gettime(2) and clock_getres(2) +Updated meson.build Signed-off-by: Warner Losh Signed-off-by: Ajeets6 --- bsd-user/freebsd/meson.build | 1 + bsd-user/freebsd/os-syscall.c | 20 2 files changed,

[PATCH 5/7] Created qemu-os.h for function prototype

From: Stacey Son +Added t2h_freebsd_timespec and h2t_freebsd_timespec function protype in qemu-is.h +included qemu-os.h in os-time.c and os-time.h Signed-off-by: Stacey Son Signed-off-by: Ajeets6 --- bsd-user/freebsd/os-time.c | 2 ++ bsd-user/freebsd/os-time.h | 5 -

[PATCH 3/7] Add clock_nanosleep

From: Kyle Evans +Add clock_nanosleep(2) Provide sleep interval in nanoseconds and allows to choose which clock to measure it against. Signed-off-by: Ajeets6 Signed-off-by: Kyle Evans --- bsd-user/freebsd/os-time.h | 21 + 1 file changed, 21 insertions(+) diff --git

Re: [PATCH 02/13] hw/ide/via: Implement ISA IRQ routing

On Sat, 22 Apr 2023, Bernhard Beschow wrote: The VIA south bridge allows the legacy IDE interrupts to be routed to four different ISA interrupts. This can be configured through the 0x4a register in the PCI configuration space of the ISA function. The default routing matches the legacy ISA IRQs,

Re: [RFC PATCH 00/13] gfxstream + rutabaga_gfx: a surprising delight or startling epiphany?

On 2023/04/22 8:54, Gurchetan Singh wrote: On Fri, Apr 21, 2023 at 9:02 AM Stefan Hajnoczi wrote: On Thu, 20 Apr 2023 at 21:13, Gurchetan Singh wrote: From: Gurchetan Singh Rationale: - gfxstream [a] is good for the Android Emulator/upstream QEMU alignment - Wayland passhthrough [b]

Re: [PATCH v2 08/10] hw/ide: Let ide_init_ioport() take a MemoryRegion argument instead of ISADevice

Am 5. Februar 2023 22:02:02 UTC schrieb Mark Cave-Ayland : >On 26/01/2023 21:17, Bernhard Beschow wrote: > >> Both callers to ide_init_ioport() have access to the I/O memory region >> of the ISA bus, so can pass it directly. This allows ide_init_ioport() >> to directly call portio_list_init().

Re: [RFC PATCH 12/13] HACK: use memory region API to inject memory to guest

On 2023/04/21 10:12, Gurchetan Singh wrote: I just copied the patches that have been floating around that do this, but it doesn't seem to robustly work. This current implementation is probably good enough to run vkcube or simple apps, but whenever a test starts to aggressively map/unmap memory,

Re: [RFC PATCH 10/13] gfxstream + rutabaga: add initial support for gfxstream

On 2023/04/21 10:12, Gurchetan Singh wrote: This adds initial support for gfxstream and cross-domain. Both features rely on virtio-gpu blob resources and context types, which are also implemented in this patch. gfxstream has a long and illustrious history in Android graphics

Re: [PATCH v3 00/18] hw/ide: Untangle ISA/PCI abuses of ide_init_ioport()

Am 2. März 2023 22:40:40 UTC schrieb "Philippe Mathieu-Daudé" : >Since v2: rebased > >I'm posting this series as it to not block Bernhard's PIIX >cleanup work. I don't have code change planned, but eventually >reword / improve commit descriptions. > >Tested commit after commit to be sure it is

[PATCH 03/13] hw/isa/vt82c686: Remove via_isa_set_irq()

Now that via_isa_set_irq() is unused it can be removed. Signed-off-by: Bernhard Beschow --- include/hw/isa/vt82c686.h | 2 -- hw/isa/vt82c686.c | 6 -- 2 files changed, 8 deletions(-) diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index da1722daf2..b6e95b2851

[PATCH 12/13] hw/ide/sii3112: Reuse PCIIDEState::bmdma_ops

Allows to unexport bmdma_addr_ioport_ops and models TYPE_SII3112_PCI as a standard-compliant PCI IDE device. Signed-off-by: Bernhard Beschow --- include/hw/ide/pci.h | 1 - hw/ide/pci.c | 2 +- hw/ide/sii3112.c | 94 ++-- hw/ide/trace-events

[PATCH 05/13] hw/ide: Extract pci_ide_class_init()

Resolves redundant code in every PCI IDE device model. --- include/hw/ide/pci.h | 1 - hw/ide/cmd646.c | 15 --- hw/ide/pci.c | 25 - hw/ide/piix.c| 19 --- hw/ide/sii3112.c | 3 ++- hw/ide/via.c | 15

[PATCH 02/13] hw/ide/via: Implement ISA IRQ routing

The VIA south bridge allows the legacy IDE interrupts to be routed to four different ISA interrupts. This can be configured through the 0x4a register in the PCI configuration space of the ISA function. The default routing matches the legacy ISA IRQs, that is 14 and 15. Implement this missing

[PATCH 06/13] hw/ide: Extract bmdma_init_ops()

There are three private copies of bmdma_setup_bar() with small adaptions. Consolidate them into one public implementation. While at it rename the function to bmdma_init_ops() to reflect that the memory regions being initialized represent BMDMA operations. The actual mapping as a PCI BAR is still

[PATCH 04/13] hw/ide: Extract IDEBus assignment into bmdma_init()

Every invocation of bmdma_init() is followed by `d->bmdma[i].bus = >bus[i]`. Resolve this redundancy by extracting it into bmdma_init(). Signed-off-by: Bernhard Beschow --- hw/ide/cmd646.c | 1 - hw/ide/pci.c | 1 + hw/ide/piix.c| 1 - hw/ide/sii3112.c | 1 - hw/ide/via.c | 1 - 5

[PATCH 07/13] hw/ide: Extract pci_ide_{cmd, data}_le_ops initialization into base class constructor

There is redundant code in cmd646 and via which can be extracted into the base class. In case of piix and sii3112 this is currently unneccessary but shouldn't interfere since the memory regions aren't mapped by those devices. In few commits later this will be changed, i.e. those device models will

[PATCH 11/13] hw/ide/sii3112: Reuse PCIIDEState::{cmd,data}_ops

Allows to unexport pci_ide_{cmd,data}_le_ops and models TYPE_SII3112_PCI as a standard-compliant PCI IDE device. Signed-off-by: Bernhard Beschow --- include/hw/ide/pci.h | 2 -- hw/ide/pci.c | 4 ++-- hw/ide/sii3112.c | 50 3 files

[PATCH 08/13] hw/ide: Rename PCIIDEState::*_bar attributes

The attributes represent memory regions containing operations which are mapped by the device models into PCI BARs. Reflect this by changing the suffic into "_ops". Note that in a few commits piix will also use the {cmd,data}_ops but won't map them into BARs. This further suggests that the "_bar"

[PATCH 01/13] hw/ide/pci: Expose legacy interrupts as GPIOs

Exposing the legacy IDE interrupts as GPIOs allows them to be connected in the parent device through qdev_connect_gpio_out(), i.e. without accessing private data of TYPE_PCI_IDE. Signed-off-by: Bernhard Beschow --- hw/ide/pci.c | 8 1 file changed, 8 insertions(+) diff --git

[PATCH 00/13] Clean up PCI IDE device models

This series is yet another attempt to clean up the PCI IDE models. It is mainly inspired the Mark's invaluable input from previous discussions. In particular, this series attempts to follow the "PCI IDE controller specification" closer. As a side effect, it also resolves usage of the isabus global

[PATCH 13/13] hw/ide: Extract bmdma_clear_status()

Extract bmdma_clear_status() mirroring bmdma_cmd_writeb(). Signed-off-by: Bernhard Beschow --- include/hw/ide/pci.h | 1 + hw/ide/cmd646.c | 2 +- hw/ide/pci.c | 7 +++ hw/ide/piix.c| 2 +- hw/ide/sii3112.c | 12 +--- hw/ide/via.c | 2 +-

[PATCH 10/13] hw/ide/piix: Reuse PCIIDEState::{cmd,data}_ops

Now that PCIIDEState::{cmd,data}_ops are initialized in the base class constructor there is an opportunity for PIIX to reuse these attributes. This resolves usage of ide_init_ioport() which would fall back internally to using the isabus global due to NULL being passed as ISADevice by PIIX.

[PATCH 09/13] hw/ide/piix: Disuse isa_get_irq()

isa_get_irq() asks for an ISADevice which piix-ide doesn't provide. Passing a NULL pointer works but causes the isabus global to be used then. By fishing out TYPE_ISA_BUS from the QOM tree it is possible to achieve the same as using isa_get_irq(). This is an alternative solution to commit

Re: [RFC PATCH 08/13] gfxstream + rutabaga prep: added need defintions, fields, and options

On 2023/04/21 10:12, Gurchetan Singh wrote: This modifies the common virtio-gpu.h file have the fields and defintions needed by gfxstream/rutabaga. It also modifies VirtioGPUGL to have the runtime options needed by rutabaga. They are: - a colon separated list of capset names, defined in the

Re: [PATCH] async: Suppress GCC13 false positive in aio_bh_poll()

On Thu, 20 Apr 2023 at 16:31, Cédric Le Goater wrote: > > From: Cédric Le Goater > > GCC13 reports an error : > > ../util/async.c: In function ‘aio_bh_poll’: > include/qemu/queue.h:303:22: error: storing the address of local variable > ‘slice’ in ‘*ctx.bh_slice_list.sqh_last’

[PATCH v4 6/7] target/riscv: Make the short cut really work in pmp_hart_has_privs

Return the result directly for short cut, since we needn't do the following check on the PMP entries if there is no PMP rules. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/pmp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/pmp.c

[PATCH v4 1/7] target/riscv: Update pmp_get_tlb_size()

PMP entries before the matched PMP entry (including the matched PMP entry) may only cover partial of the TLB page, which may make different regions in that page allow different RWX privs, such as for PMP0 (0x8008~0x800F, R) and PMP1 (0x80001000~0x80001FFF, RWX) write access to 0x8000

[PATCH v4 7/7] target/riscv: Separate pmp_update_rule() in pmpcfg_csr_write

Use pmp_update_rule_addr() and pmp_update_rule_nums() separately to update rule nums only once for each pmpcfg_csr_write. Then we can also move tlb_flush into pmp_update_rule_nums(). Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/pmp.c | 7 --- 1 file changed, 4

[PATCH v4 4/7] target/riscv: Flush TLB only when pmpcfg/pmpaddr really changes

TLB needn't be flushed when pmpcfg/pmpaddr don't changes. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei --- target/riscv/pmp.c | 24 1 file changed, 16 insertions(+), 8 deletions(-) diff --git

[PATCH v4 5/7] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1

When PMP entry overlap part of the page, we'll set the tlb_size to 1, which will make the address in tlb entry set with TLB_INVALID_MASK, and the next access will again go through tlb_fill.However, this way will not work in tb_gen_code() => get_page_addr_code_hostp(): the TLB host address will be

[PATCH v4 3/7] target/riscv: Flush TLB when pmpaddr is updated

TLB should be flushed not only for pmpcfg csr changes, but also for pmpaddr csr changes. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: LIU Zhiwei --- target/riscv/pmp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/pmp.c

[PATCH v4 0/7] target/riscv: Fix PMP related problem

This patchset tries to fix the PMP bypass problem issue https://gitlab.com/qemu-project/qemu/-/issues/1542: TLB will be cached if the matched PMP entry cover the whole page. However PMP entries with higher priority may cover part of the page (but not match the access address), which means

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