On 5/30/23 22:34, Philippe Mathieu-Daudé wrote:
On 8/5/23 09:58, Cédric Le Goater wrote:
Simple routine to retrieve a DeviceState object on a SPI bus using its
address/cs. It will be useful for the board to wire the CS lines.
Cc: Alistair Francis
Signed-off-by: Cédric Le Goater
---
On 5/30/23 23:27, Philippe Mathieu-Daudé wrote:
On 8/5/23 09:58, Cédric Le Goater wrote:
This change completes commits 5aa281d757 ("aspeed: Introduce a
spi_boot region under the SoC") and 8b744a6a47 ("aspeed: Add a
boot_rom overlap region in the SoC spi_boot container") which
introduced a
On 30/5/23 20:03, Thomas Huth wrote:
The test_vhost_user_vga_virgl test currently fails on some CI
machines with:
qemu-system-x86_64: egl: no drm render node available
qemu-system-x86_64: egl: render node init failed
The other test in this file already checks whether there is
an error
On 31/5/23 03:23, Nicholas Piggin wrote:
Make sure each CPU gets its state set up for gdb, not just the ones
before PowerPCCPUClass has had its gdb state set up.
Cc: qemu-sta...@nongnu.org
Fixes: 707c7c2ee1 ("target/ppc: Enable reporting of SPRs to GDB")
Signed-off-by: Nicholas Piggin
---
Hi Li,
On 31/5/23 04:34, Li Zhijian wrote:
Only 'fw' pointer is marked as g_autofree, so we shoud free other
resource manually in error path.
Signed-off-by: Li Zhijian
---
V2: Delete unnecesarry check
---
hw/cxl/cxl-host.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
On 31/5/23 06:03, Richard Henderson wrote:
Create two static libraries for use by each execution mode.
Signed-off-by: Richard Henderson
---
tcg/meson.build | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 31/5/23 06:03, Richard Henderson wrote:
This finally paves the way for tcg/ to be built once per mode.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 -
accel/tcg/plugin-gen.c | 1 +
tcg/region.c | 2 +-
tcg/tcg-op.c | 2 +-
tcg/tcg.c
On Wed, May 31, 2023 at 11:55 AM Jason Wang wrote:
>
> On Wed, May 31, 2023 at 11:47 AM Jon Kohler wrote:
> >
> >
> >
> > > On May 30, 2023, at 11:35 PM, Jason Wang wrote:
> > >
> > > On Wed, May 31, 2023 at 11:32 AM Jason Wang wrote:
> > >>
> > >> On Wed, May 31, 2023 at 11:17 AM Jon Kohler
On 31/5/23 06:03, Richard Henderson wrote:
Since the change to CPUArchState, we have a common typedef
that can always be used.
Signed-off-by: Richard Henderson
---
include/exec/helper-head.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 31/5/23 06:03, Richard Henderson wrote:
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Signed-off-by: Richard Henderson
---
On 31/5/23 06:03, Richard Henderson wrote:
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Signed-off-by: Richard Henderson
---
On 31/5/23 06:03, Richard Henderson wrote:
The only usage of gen_tb_start and gen_tb_end are here.
Move the static icount_start_insn variable into a local
within translator_loop. Simplify the two subroutines
by passing in the existing local cflags variable.
Leave only the declaration of
On 31/5/23 06:03, Richard Henderson wrote:
From this remove, it's no longer clear what this is attempting
to protect. The last time a use of this define was added to
the source tree, as opposed to merely moved around, was 2008.
There have been many cleanups since that time and this is
no
On Fri, May 26, 2023 at 5:41 PM Sunil V L wrote:
>
> This series improves the pflash usage in RISC-V virt machine with solutions to
> below issues.
>
> 1) Currently the first pflash is reserved for ROM/M-mode firmware code. But
> S-mode
> payload firmware like EDK2 need both pflash devices to
On 23/05/2023 16.38, Milan Zamazal wrote:
We don't have a virtio-scmi implementation in QEMU and only support a
vhost-user backend. This is very similar to virtio-gpio and we add the same
set of tests, just passing some vhost-user messages over the control socket.
Signed-off-by: Milan Zamazal
On 24/05/2023 15.34, Milan Zamazal wrote:
Signed-off-by: Milan Zamazal
---
tests/qtest/vhost-user-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/vhost-user-test.c b/tests/qtest/vhost-user-test.c
index e4f95b2858..8ab10732f8 100644
---
All uses replaced with TCGContext.addr_type.
Signed-off-by: Richard Henderson
---
tcg/sparc64/tcg-target.c.inc | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index d2d0f604c2..48efd83817 100644
---
This had been pulled in from tcg/tcg.h, via exec/cpu_ldst.h,
via exec/exec-all.h, but the include of tcg.h will be removed.
Signed-off-by: Richard Henderson
---
target/avr/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/avr/helper.c b/target/avr/helper.c
index
Create two static libraries for use by each execution mode.
Signed-off-by: Richard Henderson
---
tcg/meson.build | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/tcg/meson.build b/tcg/meson.build
index bdc185a485..565c60bc96 100644
---
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Signed-off-by: Richard Henderson
---
target/mips/tcg/translate.h| 6 --
The symbol is always defined, even if to 0.
We wanted to test for TCG_OVERSIZED_GUEST == 0.
Signed-off-by: Richard Henderson
---
target/arm/ptw.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 69c05cd9da..b0d2a05403 100644
---
This finally paves the way for tcg/ to be built once per mode.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 -
accel/tcg/plugin-gen.c | 1 +
tcg/region.c | 2 +-
tcg/tcg-op.c | 2 +-
tcg/tcg.c | 2 +-
5 files changed, 4 insertions(+), 4
If CONFIG_USER_ONLY is ok generically, so is CONFIG_SOFTMMU,
because they are exactly opposite.
Signed-off-by: Richard Henderson
---
include/exec/poison.h | 1 -
scripts/make-config-poison.sh | 5 +++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/exec/poison.h
Create helper-proto-common.h without the target specific portion.
Use that in tcg-op-common.h. Include helper-proto.h in target/arm
and target/hexagon before helper-info.c.inc; all other targets are
already correct in this regard.
Signed-off-by: Richard Henderson
---
The last use was removed with 2ac01d6dafab.
Fixes: 2ac01d6dafab ("translate-all: use a binary search tree to track TBs in
TBContext")
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/exec/exec-all.h
Since the change to CPUArchState, we have a common typedef
that can always be used.
Signed-off-by: Richard Henderson
---
include/exec/helper-head.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index
Create helper-gen-common.h without the target specific portion.
Use that in tcg-op-common.h. Reorg headers in target/arm to
ensure that helper-gen.h is included before helper-info.c.inc.
All other targets are already correct in this regard.
Signed-off-by: Richard Henderson
---
The only usage of gen_tb_start and gen_tb_end are here.
Move the static icount_start_insn variable into a local
within translator_loop. Simplify the two subroutines
by passing in the existing local cflags variable.
Leave only the declaration of gen_io_start in gen-icount.h.
Signed-off-by:
The bug was hidden because they happen to have the same values.
Signed-off-by: Richard Henderson
---
tcg/region.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index bef4c4756f..f8410ba5db 100644
--- a/tcg/region.c
+++
This will be required outside of tcg-internal.h soon.
Signed-off-by: Richard Henderson
---
include/tcg/helper-info.h | 59 +++
tcg/tcg-internal.h| 47 +--
2 files changed, 60 insertions(+), 46 deletions(-)
create mode
This makes CPUTLBEntry agnostic to the address size of the guest.
When 32-bit addresses are in effect, we can simply read the low
32 bits of the 64-bit field. Similarly when we need to update
the field for setting TLB_NOTDIRTY.
For TCG backends that could in theory be big-endian, but in
practice
This function is only used in translator.c, and uses a
target-specific typedef, abi_ptr.
Signed-off-by: Richard Henderson
---
include/exec/plugin-gen.h | 22 --
accel/tcg/translator.c| 21 +
2 files changed, 21 insertions(+), 22 deletions(-)
diff
This had been pulled in via exec/exec-all.h, via exec/translator.h,
but the include of exec-all.h will be removed.
Signed-off-by: Richard Henderson
---
target/hexagon/translate.c | 1 +
target/loongarch/translate.c | 3 +--
target/mips/tcg/translate.c | 1 +
3 files changed, 3 insertions(+),
Removes a multiplicty of calls to __assert_fail, saving up
to 360kiB of .text space as measured on an x86_64 host.
Old New Less%Change
9257272 680 368592 3.98% qemu-system-aarch64
6100968 5911832 189136 3.10% qemu-system-riscv64
5839112 5707032 132080 2.26%
These two items are the last uses of TARGET_LONG_BITS within tcg.h,
and are more in common with the other "_tl" definitions within that file.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op.h| 15 ++-
include/tcg/tcg.h | 19 ---
Reduce the header to only bswap.h and cpu_ldst.h.
Move exec/translate-all.h to translator.c.
Reduce tcg.h and tcg-op.h to tcg-op-common.h.
Remove otherwise unused headers.
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 6 +-
accel/tcg/translator.c| 8 +++-
2 files
This makes TranslationBlock agnostic to the address size of the guest.
Use vaddr for pc, since that's always a virtual address.
Use uint64_t for cs_base, since usage varies between guests.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 4 ++--
This had been pulled in from exec/cpu_ldst.h, via exec/exec-all.h,
but the include of tcg.h will be removed.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/monitor.c | 1 +
accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
accel/tcg/tcg-accel-ops-rr.c|
Often, the only thing we need to know about the TCG host
is the register size.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 12 +---
tcg/aarch64/tcg-target-reg-bits.h | 12
tcg/arm/tcg-target-reg-bits.h | 12
Make tcg_gen_callN a static function. Create tcg_gen_call[0-7]
functions for use by helper-gen.h.inc.
Removes a multiplicty of calls to __stack_chk_fail, saving up
to 143kiB of .text space as measured on an x86_64 host.
Old New Less%Change
680 8741816 146864 1.65%
Two headers are not required for the rest of the
contents of plugin-gen.h.
Signed-off-by: Richard Henderson
---
include/exec/plugin-gen.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/plugin-gen.h b/include/exec/plugin-gen.h
index e9a976f815..52828781bc 100644
---
The replacement isn't ideal, as the raw count of bits
is not easily synced with exec/cpu-all.h, but it does
remove from tcg.h the target dependency on TARGET_PAGE_BITS_MIN
which is built into TLB_FLAGS_MASK.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 3 +++
include/tcg/tcg.h
This is used by exactly one host in extraordinary circumstances.
This means that translator.h need not include plugin-gen.h;
translator.c already includes plugin-gen.h.
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 8 +---
accel/tcg/translator.c| 5 +
2 files
This had been pulled in via exec/translator.h,
but the include of exec-all.h will be removed.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index 5b53b6215d..4d88197715
New wrapper around gen_io_start which takes care of the USE_ICOUNT
check, as well as marking the DisasContext to end the TB.
Remove exec/gen-icount.h.
Signed-off-by: Richard Henderson
---
MAINTAINERS | 1 -
include/exec/gen-icount.h | 6 --
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h| 3 +++
This had been pulled in from tcg/tcg.h, via exec/cpu_ldst.h,
via exec/exec-all.h, but the include of tcg.h will be removed.
Signed-off-by: Richard Henderson
---
target/avr/cpu.c | 1 +
target/rx/cpu.c | 1 +
target/rx/op_helper.c | 1 +
target/tricore/cpu.c | 1 +
4 files changed, 4
All uses replaced with TCGContext.addr_type.
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 503126cd66..2795242b60 100644
---
Create tcg/tcg-op-common.h, moving everything that does not concern
TARGET_LONG_BITS or TCGv. Adjust tcg/*.c to use the new header
instead of tcg-op.h, in preparation for compiling tcg/ only once.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op-common.h | 996
Move a use of TARGET_LONG_BITS out of tcg/tcg.h.
Include the new file only where required.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst.h | 3 +--
include/tcg/oversized-guest.h | 23 +++
include/tcg/tcg.h
In preparation for compiling tcg/ only once, eliminate
the all_helpers array. Instantiate the info structs for
the generic helpers in accel/tcg/, and the structs for
the target-specific helpers in each translate.c.
Since we don't see all of the info structs at startup,
initialize at first use,
Removes the only use of TARGET_LONG_BITS from tcg.h, which is to be
target independent. Move the symbol to a define in tcg-op.h, which
will continue to be target dependent. Rather than complicate matters
for the use in tb_gen_code(), expand the definition there.
Reviewed-by: Philippe
This is a step toward making TranslationBlock agnostic
to the address size of the guest.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index
Create tcg/tcg-op-gvec-common.h, moving everything that does not
concern TARGET_LONG_BITS. Adjust tcg-op-gvec.c to use the new header.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op-gvec-common.h | 426 +
include/tcg/tcg-op-gvec.h| 444
This replaces of TCG_GUEST_DEFAULT_MO in tcg-op-ldst.c.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 +
accel/tcg/translate-all.c | 5 +
tcg/tcg-op-ldst.c | 4 +---
3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/tcg/tcg.h
Disconnect the layout of ArchCPU from TCG compilation.
Pass the relative offset of 'env' and 'neg.tlb.f' as a parameter.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 39 +-
include/exec/tlb-common.h| 56
This had been included via tcg-op-common.h via tcg-op.h,
but that is going away.
It is needed for inlines within translator.h, so we might as well
do it there and not individually in each translator c file.
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 1 +
The goal here is only tcg/, leaving accel/tcg/ for future work.
Changes for v3:
* Prerequisites and 3 patches merged.
r~
Richard Henderson (48):
tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL
tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL
tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL
Signed-off-by: Richard Henderson
---
include/exec/helper-head.h | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index f863a6ef5d..a355ef8ebe 100644
--- a/include/exec/helper-head.h
+++
All uses replaced with TCGContext.addr_type.
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.c.inc | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index c0257124fa..a8f99f7e77 100644
---
This had been included via tcg-op-common.h via tcg-op.h,
but that is going away. In idef-parser.y, shuffle some
tcg related includes into a more logical order.
Signed-off-by: Richard Henderson
---
target/hexagon/genptr.c | 1 +
target/hexagon/translate.c | 1 +
This will enable replacement of TARGET_INSN_START_WORDS in tcg.c.
Split out "tcg/insn-start-words.h" and use it in target/.
Signed-off-by: Richard Henderson
---
include/tcg/insn-start-words.h | 17 +
include/tcg/tcg-op.h | 8
include/tcg/tcg-opc.h |
This is all that is required by tcg/ from exec-all.h.
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 135 +--
include/exec/translation-block.h | 152 +++
tcg/tcg-op-ldst.c| 2 +-
3 files changed, 154
>From this remove, it's no longer clear what this is attempting
to protect. The last time a use of this define was added to
the source tree, as opposed to merely moved around, was 2008.
There have been many cleanups since that time and this is
no longer required for the build to succeed.
All uses replaced with TCGContext.addr_type.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.c.inc | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index d47a9e3478..11955a6cc2 100644
---
On Wed, May 31, 2023 at 11:47 AM Jon Kohler wrote:
>
>
>
> > On May 30, 2023, at 11:35 PM, Jason Wang wrote:
> >
> > On Wed, May 31, 2023 at 11:32 AM Jason Wang wrote:
> >>
> >> On Wed, May 31, 2023 at 11:17 AM Jon Kohler wrote:
> >>>
> >>> If kernel supports IFF_NAPI, lets use it, which is
> On May 30, 2023, at 11:35 PM, Jason Wang wrote:
>
> On Wed, May 31, 2023 at 11:32 AM Jason Wang wrote:
>>
>> On Wed, May 31, 2023 at 11:17 AM Jon Kohler wrote:
>>>
>>> If kernel supports IFF_NAPI, lets use it, which is especially useful
>>> on kernels containing fb3f903769e8 ("tun:
On 5/31/2023 9:32 AM, Binbin Wu wrote:
From: Robert Hoo
Linear Address Masking (LAM) is a new Intel CPU feature, which allows software
to use of the untranslated address bits for metadata.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[26]
Add CPUID definition for LAM.
More info can be found
On Wed, May 31, 2023 at 11:32 AM Jason Wang wrote:
>
> On Wed, May 31, 2023 at 11:17 AM Jon Kohler wrote:
> >
> > If kernel supports IFF_NAPI, lets use it, which is especially useful
> > on kernels containing fb3f903769e8 ("tun: support NAPI for packets
> > received from batched XDP buffs"), as
On Wed, May 31, 2023 at 11:17 AM Jon Kohler wrote:
>
> If kernel supports IFF_NAPI, lets use it, which is especially useful
> on kernels containing fb3f903769e8 ("tun: support NAPI for packets
> received from batched XDP buffs"), as IFF_NAPI allows the
> vhost_tx_batch path to use NAPI on XDP
If kernel supports IFF_NAPI, lets use it, which is especially useful
on kernels containing fb3f903769e8 ("tun: support NAPI for packets
received from batched XDP buffs"), as IFF_NAPI allows the
vhost_tx_batch path to use NAPI on XDP buffs.
Benchmark w/ iperf -c (remote srv) -P (thread count) -l
Only 'fw' pointer is marked as g_autofree, so we shoud free other
resource manually in error path.
Signed-off-by: Li Zhijian
---
V2: Delete unnecesarry check
---
hw/cxl/cxl-host.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/cxl/cxl-host.c
On 2023/5/30 22:24, Yeqi Fu wrote:
This patch introduces a set of feature instructions for native calls
and provides helpers to translate these instructions to corresponding
native functions. A shared library is also implemented, where native
functions are rewritten as feature instructions. At
On 5/30/2023 6:08 PM, Alex Bennée wrote:
>
> "Wu, Fei" writes:
>
>> On 5/30/2023 1:01 PM, Wu, Fei wrote:
>>> On 5/30/2023 12:07 PM, Richard Henderson wrote:
On 5/29/23 04:49, Fei Wu wrote:
> +/*
> + * The TCGProfile structure holds data for analysing the quality of
> + * the
On 30/05/2023 23:14, Jonathan Cameron via wrote:
> On Mon, 29 May 2023 15:59:56 +0800
> Li Zhijian wrote:
>
>> Only 'fw' pointer is marked as g_autofree, so we shoud free other
>> resource manually in error path.
>>
> Good spot.
>
> Patch title typo
> hw/cxl:>
OMG, it was the 2nd time i
On Mon, May 29, 2023 at 9:18 PM Hawkins Jiawei wrote:
>
> Enable SVQ with VIRTIO_NET_F_CTRL_GUEST_OFFLOADS feature.
>
> Signed-off-by: Hawkins Jiawei
Acked-by: Jason Wang
Thanks
> ---
> net/vhost-vdpa.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/net/vhost-vdpa.c
On Mon, May 29, 2023 at 9:18 PM Hawkins Jiawei wrote:
>
> This patch introduces vhost_vdpa_net_load_offloads() to
> restore offloads state at device's startup.
>
> Signed-off-by: Hawkins Jiawei
> ---
> net/vhost-vdpa.c | 26 ++
> 1 file changed, 26 insertions(+)
>
> diff
On Fri, May 26, 2023 at 11:31 PM Eugenio Pérez wrote:
>
> Evaluating it at start time instead of initialization time may make the
> guest capable of dynamically adding or removing migration blockers.
>
> Also, moving to initialization reduces the number of ioctls in the
> migration, reducing
From: Robert Hoo
Linear Address Masking (LAM) is a new Intel CPU feature, which allows software
to use of the untranslated address bits for metadata.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[26]
Add CPUID definition for LAM.
More info can be found in Intel ISE Chapter "LINEAR ADDRESS
Linear-address masking (LAM) [1], modifies the checking that is applied to
*64-bit* linear addresses, allowing software to use of the untranslated address
bits for metadata and masks the metadata bits before using them as linear
addresses to access memory.
When the feature is virtualized and
A relatively simple case to begin with, CTRL is a SMT shared register
where reads and writes need to synchronise against state changes by
other threads in the core.
Atomic serialisation operations are used to achieve this.
Signed-off-by: Nicholas Piggin
---
target/ppc/helper.h | 2 ++
Doorbells in SMT need to coordinate msgsnd/msgclr and DPDES access from
multiple threads that affect the same state.
Signed-off-by: Nicholas Piggin
---
hw/ppc/ppc.c | 6 ++
include/hw/ppc/ppc.h | 1 +
target/ppc/cpu.h
SMT TCG emulation needs to be able to iterate over siblings in a core,
and needs to serialise core access to shared SPRs and state.
Signed-off-by: Nicholas Piggin
---
target/ppc/cpu.h | 9 +
target/ppc/cpu_init.c | 5 +
target/ppc/translate.c | 20
3
Make sure each CPU gets its state set up for gdb, not just the ones
before PowerPCCPUClass has had its gdb state set up.
Signed-off-by: Nicholas Piggin
---
target/ppc/gdbstub.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git
TCG now supports multi-threaded configuration at least enough for
pseries to be functional enough to boot Linux.
This requires PIR and TIR be set, because that's how sibling thread
matching is done.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 4 ++--
hw/ppc/spapr_cpu_core.c |
Hi,
I'm posting this now just to get some first thoughts. I wouldn't say
it's ready but it does actually work with some basic tests including
pseries booting a Linux distro. I have powernv booting too, it just
requires some more SPRs converted, nothing fundamentally different so
for the purpose
On Mon, May 29, 2023 at 7:41 PM P J P wrote:
>
> From: Prasad Pandit
>
> vhost_dev_start function does not release virtqueue objects when
> event_notifier_init() function fails. Release virtqueue objects
> and log a message about function failure.
>
> Signed-off-by: Prasad Pandit
Cc:
On Mon, May 29, 2023 at 7:41 PM P J P wrote:
>
> From: Prasad Pandit
>
> vhost_dev_start function does not release memory_listener object
> in case of an error. This may crash the guest when vhost is unable
> to set memory table:
>
> stack trace of thread 125653:
> Program terminated with
On 5/30/23 11:59, Richard Henderson wrote:
The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0:
Merge tag 'pull-target-arm-20230530-1'
ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-05-30
08:02:05 -0700)
are available in the Git repository
On 5/30/23 6:55 PM, Tony Krowiak wrote:
> Signed-off-by: Tony Krowiak
> ---
> linux-headers/linux/vfio.h | 9 +
> 1 file changed, 9 insertions(+)
Worth nothing here that linux-headers patches should be generated using
scripts/update-linux-headers.sh.
Since this linux-headers update
On 5/30/2023 5:37 PM, Markus Armbruster wrote:
> Fei Wu writes:
>
>> This collects all the statistics for TBStatistics, not only for the
>> whole emulation but for each TB.
>>
>> Signed-off-by: Vanderson M. do Rosario
>> Signed-off-by: Alex Bennée
>> Signed-off-by: Fei Wu
>> ---
>>
On 5/30/2023 6:08 PM, Alex Bennée wrote:
>
> "Wu, Fei" writes:
>
>> On 5/30/2023 1:01 PM, Wu, Fei wrote:
>>> On 5/30/2023 12:07 PM, Richard Henderson wrote:
On 5/29/23 04:49, Fei Wu wrote:
> +/*
> + * The TCGProfile structure holds data for analysing the quality of
> + * the
On 2023/5/31 04:23, Daniel Henrique Barboza wrote:
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_helper.c | 3 ++-
On Mon, May 29, 2023 at 06:48:03PM +0200, Mickaël Salaün wrote:
>
> On 08/05/2023 23:11, Wei Liu wrote:
> > On Fri, May 05, 2023 at 05:20:42PM +0200, Mickaël Salaün wrote:
> > > This enables guests to lock their CR0 and CR4 registers with a subset of
> > > X86_CR0_WP, X86_CR4_SMEP, X86_CR4_SMAP,
When a user attempts to remove a vfio-ap mediated device attached to a
guest, the operation hangs until the mdev's fd is closed by the guest
(i.e., the guest is shut down). This patch series provides userspace
(i.e., qemu) code to handle device unplug requests for AP. When notified
that the mdev
Signed-off-by: Tony Krowiak
---
linux-headers/linux/vfio.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h
index 4a534edbdcba..2658fda219e8 100644
--- a/linux-headers/linux/vfio.h
+++ b/linux-headers/linux/vfio.h
@@ -646,6
Let's wire up the device request notifier interface to handle device unplug
requests for AP.
Signed-off-by: Tony Krowiak
---
hw/vfio/ap.c | 113 +++
1 file changed, 113 insertions(+)
diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c
index
Hi Joao,
On 30/5/23 19:59, Joao Martins wrote:
Rename pci_device_iommu_address_space() into pci_device_iommu_info().
In the new function return a new type PCIAddressSpace that encapsulates
the AddressSpace pointer that originally was returned.
The new type is added in preparation to expanding
On 30/5/23 19:59, Joao Martins wrote:
From: Avihai Horon
Implement get_attr() method and use the address width property to report
the IOMMU_ATTR_MAX_IOVA attribute.
Signed-off-by: Avihai Horon
Signed-off-by: Joao Martins
---
hw/i386/intel_iommu.c | 7 +++
1 file changed, 7
On 30/5/23 19:59, Joao Martins wrote:
Relax the vIOMMU migration blocker when the underlying IOMMU reports that
DMA translation disabled. When it is disabled there will be no DMA mappings
via the vIOMMU and the guest only uses it for Interrupt Remapping.
The latter is done via the
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