Prcb may be set to 0 for some CPUs if the dump was taken before they
start. The dump may still contain valuable information for started CPUs
so don't abandon conversion in such a case.
Signed-off-by: Akihiko Odaki
---
contrib/elf2dmp/main.c | 5 +
1 file changed, 5 insertions(+)
diff --git
I have now changed the patch to instead use
-global escc.chnA-sunkbd-layout=
and documented in docs/system/keyboard.rst which I have linked from
target-sparc.rst. Unfortunately, I am not very used to these .rst files
and have not found out how to create html files from them, so I don't know
for
On 09/06/2023 16.06, Igor Mammedov wrote:
On Mon, 22 May 2023 15:17:17 +0200
Igor Mammedov wrote:
Paolo,
can you pick it up?
It's merged already (commit a37531f2381c4e294e48b14170894741283)
Cheers,
Thomas
This is a perfectly natural occurrence for x86 "rep movb",
where the "rep" prefix forms a counted loop of the one insn.
During the tests/tcg/multiarch/memory test, this logging is
triggered over 35 times. Within the context of cross-i386-tci
build, which is already slow by nature, the logging
ository at:
https://gitlab.com/mjt0k/qemu.git tags/trivial-patches-20230610
for you to fetch changes up to e928907105cfeb48b68cedce232bbd4784536707:
linux-user: elfload: Specify -R is an option for qemu-user binaries
(2023-06-10 09:40:46 +0300)
----
/qemu.git tags/pull-ppc-20230610
for you to fetch changes up to 9ec08f3569be3bc8bfd4d9b8b0445b9136910661:
hw/ppc/Kconfig: MAC_NEWWORLD should always select USB_OHCI_PCI (2023-06-10
10:19:24 -0300)
ppc patch queue for 2023-06-10:
This
On 6/10/23 03:55, Bastian Koppelmann wrote:
+/*
+ * table from
+ * https://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable
+ */
+static const unsigned char BitReverseTable256[256] = {
+# define R2(n) n, n + 2 * 64, n + 1 * 64, n + 3 * 64
+# define R4(n) R2(n), R2(n + 2 * 16), R2(
On 6/10/23 03:55, Bastian Koppelmann wrote:
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.h | 1 +
target/tricore/op_helper.c | 8
target/tricore/translate.c | 7 +++
target/tricore/tricore-opcodes.h | 1 +
4 files changed, 17 insertions(+)
On 6/10/23 03:55, Bastian Koppelmann wrote:
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.h | 3 ++-
target/tricore/op_helper.c | 10 +-
target/tricore/translate.c | 12 ++--
target/tricore/tricore-opcodes.h | 3 ++-
4 files changed, 23 i
On 6/10/23 03:55, Bastian Koppelmann wrote:
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 14 --
target/tricore/tricore-opcodes.h | 9 -
2 files changed, 20 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/10/23 03:55, Bastian Koppelmann wrote:
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 7 +++
target/tricore/tricore-opcodes.h | 1 +
2 files changed, 8 insertions(+)
Reviewed-by: Richard Henderson
r~
On 6/10/23 03:55, Bastian Koppelmann wrote:
we also introduce the tc37x CPU that implements that ISA version.
Signed-off-by: Bastian Koppelmann
---
target/tricore/cpu.c | 13 +
target/tricore/cpu.h | 1 +
2 files changed, 14
Acked-by: Richard Henderson
r~
As recent CVE-2023-2861 once again showed, the 9p 'proxy' fs driver is in
bad shape. Using the 'proxy' backend was already discouraged for safety
reasons before and we recommended to use the 'local' backend instead,
but now it is time to officially deprecate the 'proxy' backend.
Signed-off-by: Chr
From: Nicholas Piggin
BookS msgsndp instruction to self or DPDES register can cause SDOOR
interrupts which crash QEMU with exception not implemented.
Linux does not use msgsndp in SMT1, and KVM only uses DPDES to cause
doorbells when emulating a SMT guest (which is not the default), so
this has
From: Frederic Barrat
When dumping the END and NVP tables ("info pic" from the HMP) on the
P10 model, we're likely to be flooded with error messages such as:
XIVE[0] - VST: invalid NVPT entry f33800 !?
The error is printed when finding an empty VSD in an indirect
table (thus END and NVP table
From: BALATON Zoltan
This is only used by one caller so simplify function by removing this
parameter and move the operation to the single place where it's used.
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
Message-Id:
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/cpu
From: BALATON Zoltan
Count exceptions which can be queried with info irq monitor command.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20230606220200.7ebcc746...@zero.eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/cpu.h | 1 +
tar
From: Thomas Huth
The PowerMacs have an OHCI controller soldered on the motherboard,
so this should always be enabled for the "mac99" machine.
This fixes the problem that QEMU aborts when the user tries to run
the "mac99" machine with a build that has been compiled with the
"--without-default-dev
From: Nicholas Piggin
It is possible to store a very large value to the decrementer that it
does not raise the decrementer exception so the timer is scheduled, but
the next time value wraps and is treated as in the past.
This can occur if (u64)-1 is stored on a zero-triggered exception, or
(u64)
From: Nicholas Piggin
Differently-sized larx/stcx. pairs can succeed if the starting address
matches. Add a check to require the size of stcx. exactly match the larx
that established the reservation. Use the term "reserve_length" for this
state, which matches the terminology used in the ISA.
Rev
From: Nicholas Piggin
Rework store conditional to avoid a branch in the success case.
Change some of the variable names and layout while here so
gen_conditional_store more closely matches gen_stqcx_.
Reviewed-by: Richard Henderson
Signed-off-by: Nicholas Piggin
Message-Id: <20230605025445.1619
From: BALATON Zoltan
Move out checking PID registers into a separate function which makes
mmubooke_check_tlb() simpler and avoids using goto.
Signed-off-by: BALATON Zoltan
Reviewed-by: Daniel Henrique Barboza
Message-Id:
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/mmu_common.c |
From: Nicholas Piggin
The PMU raises a performance monitor exception (causing an interrupt
when MSR[EE]=1) when MMCR0[PMAO] is set, and lowers it when clear.
Wire this up and implement the interrupt delivery for books. Linux perf
record can now collect PMI-driven samples.
fire_PMC_interrupt is
From: Nicholas Piggin
Some of the PMU hflags bits can go out of synch, for example a store to
MMCR0 with PMCjCE=1 fails to update hflags correctly and results in
hflags mismatch:
qemu: fatal: TCG hflags mismatch (current:0x2408003d rebuilt:0x240a003d)
This can be reproduced by running perf on
From: BALATON Zoltan
This function is the only reason why ppcemb_tlb_check() is not static
to mmu_common.c but it also better fits in mmu_common.c so move it
there.
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
Message-Id:
Signed-off-by: Daniel Henrique Barboza
---
target/ppc
From: Nicholas Piggin
lqarx does not set cpu_reserve, which causes stqcx. to never succeed.
Cc: qemu-sta...@nongnu.org
Fixes: 94bf2658676 ("target/ppc: Use atomic load for LQ and LQARX")
Fixes: 57b38ffd0c6 ("target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ,
STQ")
Signed-off-by: Nicholas
From: Frederic Barrat
Fix what was probably a silly mistake and allow to write the Physical
Thread enable registers 0 and 1. Skiboot prefers to use the ENx_SET
variant so it went unnoticed, but there's no reason to discard a write
to the full register, it is Read-Write.
Fixes: da71b7e3ed45 ("ppc
From: Nicholas Piggin
ppc hypervisors turn HEAI interrupts into program interrupts injected
into the guest that executed the illegal instruction, if the hypervisor
doesn't handle it some other way.
The nested-hv implementation failed to account for this HEAI->program
conversion. The virtual hype
From: BALATON Zoltan
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
Message-Id:
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/mmu_common.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/p
From: Nicholas Piggin
larx and stcx. are not defined to order any memory operations.
Remove the barriers.
Reviewed-by: Richard Henderson
Signed-off-by: Nicholas Piggin
Message-Id: <20230605025445.161932-3-npig...@gmail.com>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/translate.c |
From: Frederic Barrat
Add basic read/write support for the ESB cache configuration register
on P10. We don't model the ESB cache in qemu so reading/writing the
register won't do anything, but it avoids logging a guest error when
skiboot configures it:
qemu-system-ppc64 -machine powernv10 ... -d
From: BALATON Zoltan
Make lines shorter and fix indentation in some functions prototypes.
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
Message-Id:
<70952ba2d82141db1cf5cfcf4b227402be575874.1685448535.git.bala...@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza
---
target/pp
From: Nicholas Piggin
msgclrp matches msgsndp and should clear PPC_INTERRUPT_DOORBELL.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
Message-Id: <20230530130714.373215-1-npig...@gmail.com>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/excp_helper.c | 2 +-
1 file chang
The following changes since commit 3673ad389622d9ef4d2743101253c642def7935a:
tcg/tci: Fix MemOpIdx operand index for 3-operand memops (2023-06-09 08:30:56
-0700)
are available in the Git repository at:
https://gitlab.com/danielhb/qemu.git tags/pull-ppc-20230610
for you to fetch changes up
From: Nicholas Piggin
The decrementer store function has logic that short-cuts the timer if a
very small value is stored (0, 1, or 2) and raises an interrupt
directly. There are two problem with this on BookE.
First is that BookE says a decrementer interrupt should not be raised
on a store of 0,
From: Frederic Barrat
Add basic read/write support for the TCTXT Config register on P10. qemu
doesn't do anything with it yet, but it avoids logging a guest error
when skiboot configures the fused-core state:
qemu-system-ppc64 -machine powernv10 ... -d guest_errors
...
[0.13167,5] XIVE
From: BALATON Zoltan
No nead to store return value and break from loop when we can return
directly.
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
Message-Id:
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/mmu_common.c | 10 +++---
1 file changed, 3 insertions(+), 7
From: Thomas Huth
The ppc64 tuxrun tests are currently failing if "slirp" has been
disabled in the binary since they are using "-netdev user" now.
We have to skip the test if this network backend is missing.
Fixes: 6ee3624236 ("improve code coverage for ppc64")
Signed-off-by: Thomas Huth
Review
From: BALATON Zoltan
The get_physical_address() function is a trivial wrapper of
get_physical_address_wtlb() that is only used once. Remove it and call
get_physical_address_wtlb() directly instead.
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
Message-Id:
<302697d63d26caebefaeee
From: Philippe Mathieu-Daudé
While reviewing, the ROUND_UP() macro is easier to figure out.
Besides, the comment confirms we want to round up here.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Mark Cave-Ayland
Message-Id: <20230523061546.49031-1-phi...@lin
From: Nicholas Piggin
FCECE does not get cleared according to the ISA v3.1B.
Signed-off-by: Nicholas Piggin
Reviewed-by: Daniel Henrique Barboza
Message-Id: <20230530134313.387252-1-npig...@gmail.com>
Signed-off-by: Daniel Henrique Barboza
---
target/ppc/power8-pmu.c | 1 -
1 file changed, 1
From: Frederic Barrat
The Thread Interrupt Management Area (TIMA) can be accessed through 4
ports, targeted by the address. The base address of a TIMA
is using port 0 and the other ports are 0x80 apart. Using one port or
another can be useful to balance the load on the snoop buses. With
skiboot a
From: Frederic Barrat
TIMA addresses are somewhat special and are split in several bit
fields with different meanings. This patch describes it and introduce
macros to more easily access the various fields.
Signed-off-by: Frederic Barrat
Reviewed-by: Cédric Le Goater
Message-Id: <20230601121331
On Saturday, June 10, 2023 1:07:27 PM CEST Christian Schoenebeck wrote:
> As recent CVE-2023-2861 once again showed, the 9p 'proxy' fs driver is in
> bad shape. Using the 'proxy' backend was already discouraged for safety
> reasons before and we recommended to use the 'local' backend instead,
> but
As recent CVE-2023-2861 once again showed, the 9p 'proxy' fs driver is in
bad shape. Using the 'proxy' backend was already discouraged for safety
reasons before and we recommended to use the 'local' backend instead,
but now it is time to officially deprecate the 'proxy' backend.
Signed-off-by: Chr
this is mostly authored by volumit (https://github.com/volumit/qemu/)
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.h | 1 +
target/tricore/op_helper.c | 48
target/tricore/translate.c | 8 ++
target/tricore/tricore-opcode
Hi,
this patch series is in response to the tickets [1] [2], which point out missing
instructions from ISA v1.6.2. This is the first series that implements the low
hanging fruits.
Cheers,
Bastian
[1] https://gitlab.com/qemu-project/qemu/-/issues/1452
[2] https://gitlab.com/qemu-project/qemu/-/is
we also introduce the tc37x CPU that implements that ISA version.
Signed-off-by: Bastian Koppelmann
---
target/tricore/cpu.c | 13 +
target/tricore/cpu.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 7fa113fed2..f15169bd1b 1
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 7 +++
target/tricore/tricore-opcodes.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index cd33a1dcdd..26b284bcec 100644
--- a/target/tricore/translate.c
+
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.h | 1 +
target/tricore/op_helper.c | 8
target/tricore/translate.c | 7 +++
target/tricore/tricore-opcodes.h | 1 +
4 files changed, 17 insertions(+)
diff --git a/target/tricore/helper.h b/target/trico
Signed-off-by: Bastian Koppelmann
---
target/tricore/translate.c | 14 --
target/tricore/tricore-opcodes.h | 9 -
2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 26b284bcec..898557d22a 100644
Signed-off-by: Bastian Koppelmann
---
target/tricore/helper.h | 3 ++-
target/tricore/op_helper.c | 10 +-
target/tricore/translate.c | 12 ++--
target/tricore/tricore-opcodes.h | 3 ++-
4 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/target/
Thanks for your thoughts on this! Getting the variable in ESCCChannelState
instead of ESCCState is nice as it means that I don't have to add the
ESCCState variable to the handle_kbd_command.
So I will rewrite the patch to use argumetns like "-global
escc.chrA-sunkbd-layout=sv" (or do we want it t
We initialize cur_pmmask as -1(UINT32_MAX/UINT64_MAX) and regard it
as if pointer mask is disabled in current implementation. However,
the addresses for vector load/store will be adjusted to zero in this
case and -1(UINT32_MAX/UINT64_MAX) is valid value for pmmask when
pointer mask is enabled.
Sig
On 08/06/2023 17:14, Henrik Carlqvist wrote:
I didn't get much response to my last version of the patch to implement
emulation of language selection dip switch on SUN keyboards. By request, I
changed the patch to listen for -global escc.sunkbd_layout= instead of using
the -k switch to select key
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Michael Tokarev
---
hw/usb/hcd-ehci-pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c
index 4c37c8e227..345444
There are 2 pairs of identical code (with different types)
for TARGET_NR_setgroups & TARGET_NR_setgroups32, and
for TARGET_NR_getgroups & TARGET_NR_getgroups32. Add
comments stating this fact, so that further modifications
are done in two places.
Signed-off-by: Michael Tokarev
---
linux-user/sy
From: Milan Zamazal
Signed-off-by: Milan Zamazal
Signed-off-by: Michael Tokarev
---
docs/system/devices/vhost-user.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/system/devices/vhost-user.rst
b/docs/system/devices/vhost-user.rst
index 86128114fa..a80e95a48a 1
From: Philippe Mathieu-Daudé
Remove unnecessary intermediate variables.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Michael Tokarev
---
hw/pci/pci.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
inde
3 trivial fixes: 2 .json comments which goes to
executables, and 1 .h file comment.
Signed-off-by: Michael Tokarev
---
include/ui/clipboard.h | 2 +-
qapi/cryptodev.json| 2 +-
qga/qapi-schema.json | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/ui/clipboard.
From: Philippe Mathieu-Daudé
Use the FloatRelation enum to hold the comparison result (missed
in commit 71bfd65c5f "softfloat: Name compare relation enum").
Inspired-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Michael Tokarev
---
Add the forgotten trailing newline.
Signed-off-by: Michael Tokarev
Reviewed-by: Philippe Mathieu-Daudé
---
block.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/block.c b/block.c
index dae629075c..0637265c26 100644
--- a/block.c
+++ b/block.c
@@ -7158,7 +7158,7 @@ void bdr
From: Anastasia Belova
job may be NULL if queue->exit is true. Check
it before dereference job.
Fixes: f31f9c1080 ("vnc: add magic cookie to VncState")
Signed-off-by: Anastasia Belova
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
---
ui/vnc-jobs.c | 3 ++-
1 file changed, 2 ins
From: Peter Maydell
Coverity doesn't like the way we might end up calling getgroups()
with a NULL grouplist pointer. This is fine for the special case
of gidsetsize == 0, but we will also do it if the guest passes
us a negative gidsetsize. (CID 1512465)
Explicitly fail the negative gidsetsize wi
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Signed-off-by: Michael Tokarev
---
hw/core/cpu-common.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index f4e51c8a1b..ced66c2
From: Andrew Jeffery
Given several different concepts are suggested for investigation, let's
not confuse e.g. ulimit's -R with what was actually intended.
Signed-off-by: Andrew Jeffery
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
---
linux-user/elfload.c | 3 ++-
1 file change
From: Carlos Santos
They are required only for system emulation (i.e. have_system is true).
Signed-off-by: Carlos Santos
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Michael Tokarev
---
pc-bios/keymaps/meson.build | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/pc
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