There is no need to acquire the AioContext lock around blk_aio_*() or
blk_get_geometry() anymore. I/O plugging (defer_call()) also does not
require the AioContext lock anymore.
Signed-off-by: Stefan Hajnoczi
---
hw/block/virtio-blk.c | 5 -
1 file changed, 5 deletions(-)
diff --git
s->rq is accessed from IO_CODE and GLOBAL_STATE_CODE. Introduce a lock
to protect s->rq and eliminate reliance on the AioContext lock.
Signed-off-by: Stefan Hajnoczi
---
include/hw/virtio/virtio-blk.h | 3 +-
hw/block/virtio-blk.c | 67 +++---
2 files
Nothing in the completion code path relies on the AioContext lock
anymore. Virtqueues are only accessed from one thread at any moment and
the s->rq global state is protected by its own lock now.
Signed-off-by: Stefan Hajnoczi
---
hw/block/virtio-blk.c | 34 --
1
PATCH 01-06,09:
Reviewed-by: Markus Armbruster
Victor Toso writes:
> Example output has a comment embedded in the array. Remove it.
> The end result is a list of size 1.
>
> Signed-off-by: Victor Toso
> ---
> qapi/rocker.json | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/qapi/rocker.json b/qapi/rocker.json
>
From: Pierre Morel
Add some basic examples for the definition of cpu topology
in s390x.
Signed-off-by: Pierre Morel
Co-developed-by: Nina Schoetterl-Glausch
Reviewed-by: Thomas Huth
Signed-off-by: Nina Schoetterl-Glausch
---
MAINTAINERS| 2 +
On 04.09.23 10:03, Eric Auger wrote:
This helper will allow to convey information about valid
IOVA ranges to virtual IOMMUS.
Signed-off-by: Eric Auger
---
include/exec/memory.h | 26 ++
softmmu/memory.c | 15 +++
2 files changed, 41 insertions(+)
Am 07.09.2023 um 23:02 hat Andrey Drobyshev via geschrieben:
> v2 --> v3:
> * Make "compressed" field mandatory, not optional;
> * Adjust field description in qapi/block-core.json;
> * Squash patch 3 into patch 2 so that failing tests don't break bisect;
> * Update even more tests' outputs
On 14.09.23 15:00, lixianglai wrote:
Hi David:
Hi!
On 12.09.23 04:11, xianglai li wrote:
Introduce new function to destroy CPU address space resources
for cpu hot-(un)plug.
How do other archs handle that? Or how are they able to get away
without destroying?
They do not remove the cpu
Peter Xu writes:
> On Wed, Sep 13, 2023 at 06:53:20PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Mon, Sep 11, 2023 at 02:13:19PM -0300, Fabiano Rosas wrote:
>> >> The core yank code is strict about balanced registering and
>> >> unregistering of yank functions.
>> >>
>> >>
On 9/14/23 02:04, Philippe Mathieu-Daudé wrote:
The base register address offset is*signed*.
Cc:qemu-sta...@nongnu.org
Fixes: 82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/tcg/tx79.decode | 2 +-
1 file changed, 1
On 9/14/23 01:58, Philippe Mathieu-Daudé wrote:
The PC offset is*signed*.
Cc:qemu-sta...@nongnu.org
Reported-by: Sergey Evlashev
Resolves:https://gitlab.com/qemu-project/qemu/-/issues/1624
Fixes: c7a9ef7517 ("target/mips: Introduce decode tree bindings for MSA ASE")
Signed-off-by: Philippe
14.09.2023 15:59, Philippe Mathieu-Daudé wrote:
Cc: qemu-sta...@nongnu.org
for stable-8.1.
[not related to this particular patch]
Maybe this can help if we specify the releases range as a comment
in the Cc tag, for example here:
Cc: qemu-sta...@nongnu.org # v8.1
and if it were a range:
On 14/9/23 09:56, Philippe Mathieu-Daudé wrote:
On 9/9/23 11:48, Mark Cave-Ayland wrote:
MacOS (un)helpfully leaves the FIFO engine running even when all the
samples have
been written to the hardware, and expects the FIFO status flags and
IRQ to be
updated continuously.
There is an
W dniu 14.09.2023 o 14:01, Leif Lindholm pisze:
While reviewing Marcin's patch this morning, cross referencing different
specifications and looking at various places around the source code in
order to convinced myself he really hadn't missed something out (the
existing plumbing made it *so*
Am 12.09.2023 um 18:49 hat Stefan Hajnoczi geschrieben:
> On Mon, Sep 11, 2023 at 11:45:59AM +0200, Kevin Wolf wrote:
> > The previous parts of the graph locking changes focussed mostly on the
> > BlockDriver side and taking reader locks while performing I/O. This
> > series focusses more on the
On 14.09.23 05:50, Xiaoyao Li wrote:
It's the v2 RFC of enabling KVM gmem[1] as the backend for private
memory.
For confidential-computing, KVM provides gmem/guest_mem interfaces for
userspace, like QEMU, to allocate user-unaccesible private memory. This
series aims to add gmem support in
Hi Anastasia,
On 14/9/23 11:27, Anastasia Belova wrote:
If slot_id >= NUM_MEMSLOTS, buffer overflow is possible.
overflow: unlikely. Do you mean over-read?
Did you found that by code audit? I can't see where this
function get slot_id >= NUM_MEMSLOTS.
This isn't guest triggerable and seems
Hi David:
On 12.09.23 04:11, xianglai li wrote:
Introduce new function to destroy CPU address space resources
for cpu hot-(un)plug.
How do other archs handle that? Or how are they able to get away
without destroying?
They do not remove the cpu address space, taking the X86 architecture as
On 14/9/23 14:38, Michael Tokarev wrote:
14.09.2023 15:37, Michael Tokarev:
13.09.2023 13:10, Dmitry Frolov wrote:
According to cxl_interleave_ways_enc(),
fw->num_targets is allowed to be up to 16.
This also corresponds to CXL specs.
So, the fw->target_hbs[] array is iterated from 0 to 15.
But
13.09.2023 18:05, Jonathan Cameron via wrote:
Michael Tsirkin observed that there were some unnecessarily
long lines in the CXL code in a recent review.
This patch is intended to rectify that where it does not
hurt readability.
Reviewed-by: Michael Tokarev
This whole series can be picked up
13.09.2023 18:05, Jonathan Cameron via wrote:
Indexing has to be done into an array with the right size elements.
As such, the size parameter always matches the array element size
and can be used in place of the longer sizeof(*array)
Signed-off-by: Jonathan Cameron
---
No checks, dereferencing possible.
Return value of a function 'virDomainChrSourceDefNew'
is dereferenced at qemu_command.c without checking
for NULL, but it is usually checked for this function.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: 1f85f0967b ("ci:
There are no checks, virDomainChrSourceDefNew can return 0.
Return value of a function 'virDomainChrSourceDefNew'
is dereferenced at qemu_hotplug.c without checking for NULL,
but it is usually checked for this function.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Paolo: ping?
On Thu, 3 Aug 2023 at 15:51, Stefan Hajnoczi wrote:
>
> qdev_alias_all_properties() aliases a DeviceState's qdev properties onto
> an Object. This is used for VirtioPCIProxy types so that --device
> virtio-blk-pci has properties of its embedded --device virtio-blk-device
> object.
>
From: Pierre Morel
The modification of the CPU attributes are done through a monitor
command.
It allows to move the core inside the topology tree to optimize
the cache usage in the case the host's hypervisor previously
moved the CPU.
The same command allows to modify the CPU attributes
From: Pierre Morel
The maximum nested topology entries is used by the guest to
know how many nested topology are available on the machine.
Let change the MNEST value from 2 to 4 in the SCLP READ INFO
structure now that we support books and drawers.
Signed-off-by: Pierre Morel
Reviewed-by:
From: Pierre Morel
S390 topology adds books and drawers topology containers.
Let's add these to the HMP information for hotpluggable cpus.
Signed-off-by: Pierre Morel
Reviewed-by: Nina Schoetterl-Glausch
Reviewed-by: Thomas Huth
---
hw/core/machine-hmp-cmds.c | 6 ++
1 file changed, 6
From: Pierre Morel
S390 adds two new SMP levels, drawers and books to the CPU
topology.
S390 CPUs have specific topology features like dedication and
entitlement. These indicate to the guest information on host
vCPU scheduling and help the guest make better scheduling decisions.
Let us provide
From: Pierre Morel
When the guest asks to change the polarization this change
is forwarded to the upper layer using QAPI.
The upper layer is supposed to take according decisions concerning
CPU provisioning.
Signed-off-by: Pierre Morel
Reviewed-by: Thomas Huth
Reviewed-by: Nina
From: Pierre Morel
The topology information are attributes of the CPU and are
specified during the CPU device creation.
On hot plug we:
- calculate the default values for the topology for drawers,
books and sockets in the case they are not specified.
- verify the CPU attributes
- check that
From: Pierre Morel
This test verifies that QEMU refuses to move a CPU to an
nonexistent location.
Signed-off-by: Pierre Morel
Reviewed-by: Thomas Huth
---
tests/avocado/s390_topology.py | 25 +
1 file changed, 25 insertions(+)
diff --git
From: Pierre Morel
Polarization is changed on a request from the guest.
Let's verify the polarization is accordingly set by QEMU.
Signed-off-by: Pierre Morel
Co-developed-by: Nina Schoetterl-Glausch
Reviewed-by: Thomas Huth
Reviewed-by: Nina Schoetterl-Glausch
Signed-off-by: Nina
14.09.2023 15:37, Michael Tokarev:
13.09.2023 13:10, Dmitry Frolov wrote:
According to cxl_interleave_ways_enc(),
fw->num_targets is allowed to be up to 16.
This also corresponds to CXL specs.
So, the fw->target_hbs[] array is iterated from 0 to 15.
But it is staticaly declared of length 8.
Changes since v22 (range-diff below):
* fix compile issues (thanks Thomas, Cédric)
* incorporate feedback (thanks Thomas!), most notably
* forbid books and drawers in older machine types
* changed implementation of TLE entry ordering
* also got rid of another ERRP_GUARD in s390_change_topology
13.09.2023 13:10, Dmitry Frolov wrote:
According to cxl_interleave_ways_enc(),
fw->num_targets is allowed to be up to 16.
This also corresponds to CXL specs.
So, the fw->target_hbs[] array is iterated from 0 to 15.
But it is staticaly declared of length 8.
Thus, out of bound array access may
14.09.2023 10:06, Dmitry Frolov wrote:
According to cxl_interleave_ways_enc(), fw->num_targets is allowed to be up
to 16. This also corresponds to CXL specs. So, the fw->target_hbs[] array
is iterated from 0 to 15. But it is statically declared of length 8. Thus,
out of bound array access may
14.09.2023 12:27, Anastasia Belova wrote:
If slot_id >= NUM_MEMSLOTS, buffer overflow is possible.
So the check should be upper than d->guest_slots[slot_id]
where size of d->guest_slots is NUM_MEMSLOTS.
Fixes: e954ea2873 ("qxl: qxl_add_memslot: remove guest trigerrable panics")
Signed-off-by:
As per the Priv spec: "The R, W, and X fields form a collective WARL
field for which the combinations with R=0 and W=1 are reserved."
However currently such writes are not ignored as ought to be. The
combinations with RW=01 are allowed only when the Smepmp extension
is enabled and mseccfg.MML is
On Thu, 14 Sept 2023 at 13:29, Kevin Wolf wrote:
>
> Am 13.09.2023 um 18:31 hat Eric Blake geschrieben:
> > I guess it boils down to whether there is an actionable response in
> > that message. If a test is skipped because it is the wrong format
> > (for example, ./check -raw skipping a test
From: Pierre Morel
S390x provides two more topology attributes, entitlement and dedication.
Let's add these CPU attributes to the QAPI command query-cpu-fast.
Signed-off-by: Pierre Morel
Reviewed-by: Nina Schoetterl-Glausch
Co-developed-by: Nina Schoetterl-Glausch
Reviewed-by: Thomas Huth
From: Pierre Morel
A dedicated CPU in vertical polarization can only have
a high entitlement.
Let's check this from both host and guest point of view.
Signed-off-by: Pierre Morel
Co-developed-by: Nina Schoetterl-Glausch
Reviewed-by: Thomas Huth
Reviewed-by: Nina Schoetterl-Glausch
From: Pierre Morel
When the host supports the CPU topology facility, the PTF
instruction with function code 2 is interpreted by the SIE,
provided that the userland hypervisor activates the interpretation
by using the KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
The PTF instructions with function
From: Pierre Morel
Introduction of the s390x cpu topology core functions and
basic tests.
We test the correlation between the command line and
the QMP results in query-cpus-fast for various CPU topology.
Signed-off-by: Pierre Morel
Reviewed-by: Nina Schoetterl-Glausch
Co-developed-by: Nina
From: Pierre Morel
This test verifies that QMP set-cpu-topology does not accept
to overload a socket.
Signed-off-by: Pierre Morel
Reviewed-by: Thomas Huth
---
tests/avocado/s390_topology.py | 26 ++
1 file changed, 26 insertions(+)
diff --git
From: Pierre Morel
During a subsystem reset the Topology-Change-Report is cleared
by the machine.
Let's ask KVM to clear the Modified Topology Change Report (MTCR)
bit of the SCA in the case of a subsystem reset.
Signed-off-by: Pierre Morel
Reviewed-by: Thomas Huth
Reviewed-by: Nina
Hi Nikita,
On 14/9/23 14:25, Nikita Shubin wrote:
From: Nikita Shubin
target_xml is a dynamic GString, use NULL to initialize it.
Fixes: 56e534bd11 ("gdbstub: refactor get_feature_xml")
Signed-off-by: Nikita Shubin
---
Observed with:
build-qemu/qemu-system-riscv64 -M sifive_u -bios none
On 13/9/23 00:40, Akihiko Odaki wrote:
target_xml is no longer a fixed-length array but a pointer to a
variable-length memory.
Fixes: 56e534bd11 ("gdbstub: refactor get_feature_xml")
Signed-off-by: Akihiko Odaki
---
gdbstub/softmmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Am 13.09.2023 um 18:31 hat Eric Blake geschrieben:
> On Wed, Sep 13, 2023 at 04:47:54PM +0100, Daniel P. Berrangé wrote:
> > On Wed, Sep 06, 2023 at 04:09:17PM +0200, Denis V. Lunev wrote:
> > > Each particular testcase could skipped intentionally and accidentally.
> > > For example the test is
On 14/9/23 14:01, Leif Lindholm wrote:
Use the private peripheral interrupt definitions from bsa.h instead of
defining them locally. Refactor to use PPI() to convert from INTID macro
where necessary.
Signed-off-by: Leif Lindholm
---
hw/arm/sbsa-ref.c | 24 +++-
1 file
From: Nikita Shubin
target_xml is a dynamic GString, use NULL to initialize it.
Fixes: 56e534bd11 ("gdbstub: refactor get_feature_xml")
Signed-off-by: Nikita Shubin
---
Observed with:
build-qemu/qemu-system-riscv64 -M sifive_u -bios none -nographic -s
Segmentation fault
---
gdbstub/softmmu.c
On 14/9/23 14:01, Leif Lindholm wrote:
GIC Private Peripheral Interrupts (PPI) are defined as GIC INTID 16-31.
As in, PPI0 is INTID16 .. PPI15 is INTID31.
Arm's Base System Architecture specification (BSA) lists the mandated and
recommended private interrupt IDs by INTID, not by PPI index. But
From: Pierre Morel
The query-cpu-polarization qmp command returns the current
CPU polarization of the machine.
Signed-off-by: Pierre Morel
Reviewed-by: Thomas Huth
Reviewed-by: Nina Schoetterl-Glausch
Co-developed-by: Nina Schoetterl-Glausch
Signed-off-by: Nina Schoetterl-Glausch
---
From: Pierre Morel
On interception of STSI(15.1.x) the System Information Block
(SYSIB) is built from the list of pre-ordered topology entries.
Signed-off-by: Pierre Morel
Reviewed-by: Nina Schoetterl-Glausch
Co-developed-by: Nina Schoetterl-Glausch
Signed-off-by: Nina Schoetterl-Glausch
From: Pierre Morel
Test changes in the entitlement from both a guest and a host point of
view, depending on the polarization.
Signed-off-by: Pierre Morel
Reviewed-by: Nina Schoetterl-Glausch
Co-developed-by: Nina Schoetterl-Glausch
Signed-off-by: Nina Schoetterl-Glausch
---
On Wed, Sep 13, 2023 at 05:44:38PM +0300, Michael Tokarev wrote:
> 13.09.2023 17:27, Stefan Hajnoczi wrote:
> ...
> > > For example, recent tpm bugfix, which is trivial by its own,
> > > uses RETRY_ON_EINTR helper which were introduced recently and
> > > which is now used everywhere. coroutine_fn
From: Pierre Morel
The KVM capability KVM_CAP_S390_CPU_TOPOLOGY is used to
activate the S390_FEAT_CONFIGURATION_TOPOLOGY feature and
the topology facility in the host CPU model for the guest
in the case the topology is available in QEMU and in KVM.
The feature is disabled by default and fenced
From: Pierre Morel
Let's test that QEMU refuses to setup a dedicated CPU with
low or medium entitlement.
Signed-off-by: Pierre Morel
Reviewed-by: Thomas Huth
---
tests/avocado/s390_topology.py | 48 ++
1 file changed, 48 insertions(+)
diff --git
GIC Private Peripheral Interrupts (PPI) are defined as GIC INTID 16-31.
As in, PPI0 is INTID16 .. PPI15 is INTID31.
Arm's Base System Architecture specification (BSA) lists the mandated and
recommended private interrupt IDs by INTID, not by PPI index. But current
definitions in qemu define them by
Use the private peripheral interrupt definitions from bsa.h instead of
defining them locally. Refactor to use PPI() to convert from INTID macro
where necessary.
Signed-off-by: Leif Lindholm
---
hw/arm/sbsa-ref.c | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
virt.h defines a number of IRQs that are ultimately described by Arm's
Base System Architecture specification. Move these to a dedicated header
so that they can be reused by other platforms that do the same.
Include that header from virt.h to minimise churn.
Signed-off-by: Leif Lindholm
---
While reviewing Marcin's patch this morning, cross referencing different
specifications and looking at various places around the source code in
order to convinced myself he really hadn't missed something out (the
existing plumbing made it *so* clean to add), my brain broke slightly
at keeping
On Wed, Sep 13, 2023 at 11:08:54AM -0500, Eric Blake wrote:
> On Tue, Sep 12, 2023 at 07:10:34PM -0400, Stefan Hajnoczi wrote:
> > This patch fixes a race condition in test-bdrv-drain that is difficult
> > to reproduce. test-bdrv-drain sometimes fails without an error message
> > on the block pull
Am 14.09.2023 um 12:24 hat Peter Maydell geschrieben:
> On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
> >
> > Until now, array properties are actually implemented with a hack that
> > uses multiple properties on the QOM level: a static "foo-len" property
> > and after it is set, dynamically
Ping for review please. This series still applies to git master.
On Tue, Jul 18, 2023 at 10:26:28AM +0100, Daniel P. Berrangé wrote:
> Changed in v2:
>
> - Tweaked commit messages
> - Also add GraniteRapids CPU model
>
> Daniel P. Berrangé (3):
> scripts: drop comment about autogenerated
On Tue, Sep 12, 2023 at 02:46:48PM +0400, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Ensure that it only get called when dpy_ui_info_supported(). The
> function should always return a result. There should be a non-null
> console or active_console.
Empirically that does not
We requested a to hotplug a maximum of "8 GiB", and sized the area slightly
larger to allow for some flexibility
when it comes to placing DIMMs in that "device-memory" area.
Right but here in this example you do not hot plug memory while the VM is
running. We can hot plug 8G yes, but the
This implements support for simple 16-bit and 32-bit instructions.
Support for 48-bit instructions and support for load/store memory
instructions is not implemented yet.
Signed-off-by: Thomas Huth
---
risugen_s390x.pm | 186 +++
1 file changed, 186
On s390x, we need the si_addr from the siginfo_t to get to
the address of the illegal instruction (the PSW address in
the ucontext_t is already pointing to the next instruction
there). So let's prepare for that situation and pass the
si_addr to the reginfo_init() function everywhere.
Hi Peter!
Here are some patches that add basic support for s390x to RISU.
It's still quite limited, e.g. no support for load/store memory
operations yet, but the basics with simple 16-bit or 32-bit
instructions work *now* already fine.
(I'm also already experimenting in extending RISU to
To avoid regressions, let's check s390x also via this file.
Suggested-by: Peter Maydell
Signed-off-by: Thomas Huth
---
build-all-archs | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/build-all-archs b/build-all-archs
index e5dcfc8..e89851b 100755
--- a/build-all-archs
+++
Travis-CI offers native build machines for aarch64, ppc64le
and s390x, so this is very useful for testing RISU on these
architectures. While compiling works fine for all architectures,
running the binary currently only works for s390x (the aarch64
runner reports a mismatch when comparing the
With these changes, it is now possible to compile the "risu" binary
for s390x hosts.
Signed-off-by: Thomas Huth
---
risu_reginfo_s390x.c | 140 +++
risu_reginfo_s390x.h | 25
risu_s390x.c | 51
test_s390x.S |
This only adds a limited set of s390x instructions for initial testing.
More instructions will be added later.
Signed-off-by: Thomas Huth
---
s390x.risu | 81 ++
1 file changed, 81 insertions(+)
create mode 100644 s390x.risu
diff --git
Auto-detect s390x hosts and add s390x information to the help text.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
configure | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index ca2d7db..2f7c580 100755
--- a/configure
+++
> On 14-Sep-2023, at 2:07 PM, David Hildenbrand wrote:
>
> On 14.09.23 07:53, Ani Sinha wrote:
>>> On 12-Sep-2023, at 9:04 PM, David Hildenbrand wrote:
>>>
>>> [...]
>>>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 54838c0c41..d187890675 100644
> --- a/hw/i386/pc.c
>
When the block job ends, it removes filter from the tree. However the
last reference to filter bds is dropped when the job is destroyed.
So when we have finalized but not dismissed job, if we try to
'query-named-block-nodes', QEMU will stumble upon a half-dead filter
and crash, since the filter
QEMU crashes on QMP command 'query-named-block-nodes' if we have
finalized but not dismissed block job with filter, for example
block-stream.
This happens because the filter no longer has references from which
QEMU can query block info. Skip such filters while listing block nodes.
This patchset
Check if we can list named block nodes when the block-stream is
finalized but not yet dismissed
This previously led to a crash
Signed-off-by: Andrey Zhadchenko
---
tests/qemu-iotests/030 | 17 +
tests/qemu-iotests/030.out | 4 ++--
2 files changed, 19 insertions(+), 2
On Thu, Sep 14, 2023 at 02:05:21PM +0300, Michael Tokarev wrote:
> 14.09.2023 11:26, Michael Tokarev wrote:
> > 14.09.2023 11:18, Daniel P. Berrangé wrote:
> ..
> > > > - struct pollfd *pfd = NULL;
> > > > + struct pollfd *pfd = NULL, *heap_pfd = NULL;
> > >
> > > g_autofree struct pollfd
14.09.2023 11:26, Michael Tokarev wrote:
14.09.2023 11:18, Daniel P. Berrangé wrote:
..
- struct pollfd *pfd = NULL;
+ struct pollfd *pfd = NULL, *heap_pfd = NULL;
g_autofree struct pollfd *heap_pdf = NULL;
...
out:
+ g_free(heap_pfd);
This can be dropped with g_autofree
QE tested this patch with real nic,guest can works well after
cancelling migration.
Tested-by: Lei Yang
On Thu, Sep 14, 2023 at 11:23 AM Jason Wang wrote:
>
> On Wed, Sep 13, 2023 at 8:34 PM Eugenio Pérez wrote:
> >
> > Not zeroing it causes a SIGSEGV if the live migration is cancelled, at
>
On 9/14/23 04:44, Richard Henderson wrote:
Accept that we will consume space in CPUState for CONFIG_USER_ONLY,
since we cannot test CONFIG_SOFTMMU within hw/core/cpu.h.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 150
On 9/14/23 04:44, Richard Henderson wrote:
Now that there is no padding between CPUNegativeOffsetState
and CPUArchState, this value is constant across all targets.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 -
accel/tcg/translate-all.c | 2 --
tcg/tcg.c
On 9/14/23 04:44, Richard Henderson wrote:
Replace the single use within env_tlb() and remove.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
On 9/14/23 04:44, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
include/hw/core/cpu.h| 9 ++---
target/arm/common-semi-target.h | 2 +-
accel/tcg/cpu-exec.c | 8
On 9/14/23 04:44, Richard Henderson wrote:
We can now access icount_decr directly.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
include/hw/core/cpu.h | 2 --
hw/core/cpu-common.c | 4 ++--
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git
On Fri, 8 Sept 2023 at 15:37, Kevin Wolf wrote:
>
> Until now, array properties are actually implemented with a hack that
> uses multiple properties on the QOM level: a static "foo-len" property
> and after it is set, dynamically created "foo[i]" properties.
>
> In external interfaces (-device on
On 9/14/23 04:44, Richard Henderson wrote:
Retain the separate structure to emphasize its importance.
Enforce CPUArchState always follows CPUState without padding.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h| 22 +-
include/hw/core/cpu.h | 14
On Thu, Sep 14, 2023 at 01:02:05PM +0300, Manos Pitsidianakis wrote:
On Thu, 14 Sep 2023 12:54, Stefano Garzarella wrote:
We are seeing something strange with the virtio-sound Linux driver.
It seems that the driver modifies the buffers after exposing them to
the device via the avail ring.
I
On Thu, Sep 14, 2023 at 09:44:16 +, Миронов Сергей Владимирович wrote:
> No checks, dereferencing possible.
>
>
> Return value of a function 'virDomainChrSourceDefNew'
> is dereferenced at qemu_command.c without checking
> for NULL, but it is usually checked for this function.
This
On 9/14/23 04:44, Richard Henderson wrote:
Verify that the distance between CPUNegativeOffsetState and
CPUArchState is no greater than any alignment requirements.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 6 ++
1 file changed, 6 insertions(+)
diff --git
CC-ing qemu-devel with a patch solely for libvirt doesn't make sense.
Also 'libvirt-security' list is private and is is intended as a first
contact list for stuff to be embargoed. It makes little sense to include
it when posting to the public 'libvir-list'.
On Thu, Sep 14, 2023 at 09:44:13
On Thu, 14 Sep 2023 12:54, Stefano Garzarella wrote:
We are seeing something strange with the virtio-sound Linux driver.
It seems that the driver modifies the buffers after exposing them to
the device via the avail ring.
I need more information about this bug. What is the unexpected behavior
From: Klaus Jensen
Add an abstract MCTP over I2C endpoint model. This implements MCTP
control message handling as well as handling the actual I2C transport
(packetization).
Devices are intended to derive from this and implement the class
methods.
Parts of this implementation is inspired by
From: Klaus Jensen
Add i2c_smbus_pec() to calculate the SMBus Packet Error Code for a
message.
Reviewed-by: Jonathan Cameron
Signed-off-by: Klaus Jensen
---
hw/i2c/smbus_master.c | 26 ++
include/hw/i2c/smbus_master.h | 2 ++
2 files changed, 28 insertions(+)
From: Klaus Jensen
Add the 'nmi-i2c' device that emulates an NVMe Management Interface
controller.
Initial support is very basic (Read NMI DS, Configuration Get).
This is based on previously posted code by Padmakar Kalghatgi, Arun
Kumar Agasar and Saurav Kumar.
Reviewed-by: Jonathan Cameron
On Wed, Sep 13, 2023 at 10:33:07AM +0300, Emmanouil Pitsidianakis wrote:
This patch series adds an audio device implementing the recent virtio
sound spec (1.2) and a corresponding PCI wrapper device.
v9 can be found online at:
https://gitlab.com/epilys/qemu/-/tree/virtio-snd-v9
Ref 06e6b17186
This adds a generic MCTP endpoint model that other devices may derive
from.
Also included is a very basic implementation of an NVMe-MI device,
supporting only a small subset of the required commands.
Since this all relies on i2c target mode, this can currently only be
used with an SoC that
Hi Eric,
>-Original Message-
>From: Eric Auger
>Sent: Thursday, September 14, 2023 5:04 PM
>To: Duan, Zhenzhong ; qemu-devel@nongnu.org
>Cc: alex.william...@redhat.com; c...@redhat.com; j...@nvidia.com;
>nicol...@nvidia.com; Martins, Joao ;
>pet...@redhat.com; jasow...@redhat.com; Tian,
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