On Sat, Dec 02, 2023 at 01:41:22AM +, Volodymyr Babchuk wrote:
> diff --git a/hw/xenpv/xen_machine_pv.c b/hw/xenpv/xen_machine_pv.c
> index 9f9f137f99..03a55f345c 100644
> --- a/hw/xenpv/xen_machine_pv.c
> +++ b/hw/xenpv/xen_machine_pv.c
> @@ -37,7 +37,9 @@ static void xen_init_pv(MachineState
On Thu, 9 Nov 2023 at 10:33, Woodhouse, David wrote:
>
> We can't just embed labels directly into files like qemu-options.hx which
> are included from multiple top-level RST files, because Sphinx sees the
> labels as duplicate: https://github.com/sphinx-doc/sphinx/issues/9707
>
> So add an
The Big QEMU Lock (BQL) has many names and they are confusing. The
actual QemuMutex variable is called qemu_global_mutex but it's commonly
referred to as the BQL in discussions and some code comments. The
locking APIs, however, are called qemu_mutex_lock_iothread() and
The name "iothread" is overloaded. Use the term Big QEMU Lock (BQL)
instead, it is already widely used and unambiguous.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Paul Durrant
Acked-by: David Woodhouse
Reviewed-by: Cédric Le Goater
Acked-by: Ilya Leoshkevich
---
include/qemu/main-loop.h |
The term "QEMU global mutex" is identical to the more widely used Big
QEMU Lock ("BQL"). Update the code comments and documentation to use
"BQL" instead of "QEMU global mutex".
Signed-off-by: Stefan Hajnoczi
Acked-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
---
The name "iothread" is overloaded. Use the term Big QEMU Lock (BQL)
instead, it is already widely used and unambiguous.
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Cédric Le Goater
Reviewed-by: Philippe Mathieu-Daudé
---
include/qemu/main-loop.h | 10 +-
v2:
- Rename APIs bql_*() [PeterX]
- Spell out "Big QEMU Lock (BQL)" in doc comments [PeterX]
- Rename "iolock" variables in hw/remote/mpqemu-link.c [Harsh]
- Fix bql_auto_lock() indentation in Patch 2 [Ilya]
- "with BQL taken" -> "with the BQL taken" [Philippe]
- "under BQL" -> "under the BQL"
The term "iothread lock" is obsolete. The APIs use Big QEMU Lock (BQL)
in their names. Update the code comments to use "BQL" instead of
"iothread lock".
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Philippe Mathieu-Daudé
---
docs/devel/reset.rst | 2 +-
hw/display/qxl.h
Hi Anthony
Anthony PERARD writes:
> On Fri, Dec 08, 2023 at 02:49:27PM -0800, Stefano Stabellini wrote:
>> On Fri, 8 Dec 2023, Daniel P. Berrangé wrote:
>> > On Thu, Dec 07, 2023 at 11:12:48PM +, Michael Young wrote:
>> > > Builds of qemu-8.2.0rc2 with xen-4.18.0 are currently failing
>> >
On Tue, 2023-12-12 at 14:08 +0100, Christian Borntraeger wrote:
>
>
> Am 12.12.23 um 12:36 schrieb Philippe Mathieu-Daudé:
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > hw/s390x/ipl.c | 1 -
> > 1 file changed, 1 deletion(-)
> >
> > diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
> >
On 11/29/23 00:56, Ninad Palsule wrote:
This patchset introduces IBM's Flexible Service Interface(FSI).
Time for some fun with inter-processor buses. FSI allows a service
processor access to the internal buses of a host POWER processor to
perform configuration or debugging.
FSI has long
On 11/29/23 00:56, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
An APB-to-OPB bridge enabling access to the OPB from the ARM core in
the AST2600. Hardware limitations prevent the OPB from being directly
mapped into APB, so all accesses
On 11/29/23 00:56, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
This commit models the FSI master. CFAM is hanging out of FSI master which is a
bus controller.
The FSI master: A controller in the platform service processor (e.g.
BMC)
On 11/29/23 00:56, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The Common FRU Access Macro (CFAM), an address space containing
various "engines" that drive accesses on busses internal and external
to the POWER chip. Examples include the
On 11/29/23 00:56, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in
POWER processors. This now makes an appearance in the ASPEED SoC due
to tight integration of the FSI
On 11/29/23 00:56, Ninad Palsule wrote:
This is a part of patchset where IBM's Flexible Service Interface is
introduced.
The LBUS is modelled to maintain mapped memory for the devices. The
memory is mapped after CFAM config, peek table and FSI slave registers.
Signed-off-by: Andrew Jeffery
On Tue, 12 Dec 2023 at 14:20, Anthony PERARD wrote:
> Building qemu with something like:
> ./configure --enable-xen --cpu=x86_64
> used to work. Can we fix that? It still works with v8.1.0.
> At least, it works on x86, I never really try to build qemu for arm.
> Notice that there's no
In many configurations, e.g. multiple vNICs with multiple queues or
with many Ceph OSDs, the default soft limit of 1024 is not enough.
QEMU is supposed to work fine with file descriptors >= 1024 and does
not use select() on POSIX. Bump the soft limit to the allowed hard
limit to avoid issues with
This patch adds a new STM32L4x5 EXTI device and is part
of a series implementing the STM32L4x5 with a few peripherals.
Thank you Philippe for letting us know we're on your review list and
that you're busy.
Please take your time, in the meantime we'll make progress on more
peripherals :-)
On Fri, Dec 08, 2023 at 02:49:27PM -0800, Stefano Stabellini wrote:
> On Fri, 8 Dec 2023, Daniel P. Berrangé wrote:
> > On Thu, Dec 07, 2023 at 11:12:48PM +, Michael Young wrote:
> > > Builds of qemu-8.2.0rc2 with xen-4.18.0 are currently failing
> > > with errors like
> > >
From: Inès Varhol
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/arm/Kconfig | 1 +
hw/arm/stm32l4x5_soc.c | 56 --
include/hw/arm/stm32l4x5_soc.h | 3 ++
3 files changed, 58 insertions(+), 2 deletions(-)
diff --git
From: Inès Varhol
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
tests/qtest/meson.build | 5 +
tests/qtest/stm32l4x5_exti-test.c | 485 ++
2 files changed, 490 insertions(+)
create mode 100644 tests/qtest/stm32l4x5_exti-test.c
diff --git
From: Inès Varhol
Although very similar to the STM32F4xx EXTI, STM32L4x5 EXTI generates
more than 32 event/interrupt requests and thus uses more registers
than STM32F4xx EXTI which generates 23 event/interrupt requests.
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
On Sun, 12 Nov 2023 at 09:22, Nikita Ostrenkov wrote:
Hi; thanks for this patch, and sorry I haven't got round
to reviewing it earlier.
> Signed-off-by: Nikita Ostrenkov
> ---
> hw/misc/imx7_snvs.c | 59 -
> hw/misc/trace-events| 4 +--
>
Traditional mmio in balloon makes qemu do balloon inflation in the same
thread as vcpu thread.In a CPU overcommitment scenario, host may run
more than one vcpu threads on one host thread, which makes
madvise_dontneed_free() wait for a long time due to the function
cond_resched() at host side.
If
Thank you for the information.
I know you're busy so I appreciate you taking the time to do a quick check
:-)
Marek Głogowski
wt., 12 gru 2023 o 09:28 Akihiko Odaki
napisał(a):
> On 2023/12/12 17:04, Marek Glogowski wrote:
> > Hi
> >
> > I checked on the emulation "qemu-system-ppc -machine
Hi
I checked on the emulation "qemu-system-ppc -machine pegasos".
Full-screen seems to work fine. The screen is correctly initialised in
full-screen mode and there are no problems with closing the window when the
session is suspended.
With this series of patches, there is also the option "Move
On Wednesday, November 15, 2023 3:14 PM, Xiaoyao Li wrote:
> Introduce the helper functions to set the attributes of a range of memory to
> private or shared.
>
> This is necessary to notify KVM the private/shared attribute of each gpa
> range.
> KVM needs the information to decide the GPA needs
On Mon, Dec 11, 2023 at 04:32:06PM +0100, Markus Armbruster wrote:
> Kevin Wolf writes:
>
> > Am 18.09.2023 um 18:16 hat Stefan Hajnoczi geschrieben:
> >> virtio-blk and virtio-scsi devices will need a way to specify the
> >> mapping between IOThreads and virtqueues. At the moment all virtqueues
StringOutputVisitor crashes when it visits a struct because
->start_struct() is NULL.
Show "" instead of crashing. This is necessary because the
virtio-blk-pci iothread-vq-mapping parameter that I'd like to introduce
soon is a list of IOThreadMapping structs.
This patch is a quick fix to solve
On 12/12/2023 12.30, Philippe Mathieu-Daudé wrote:
Outside of system emulation, only qtest_enabled() can be used.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/qtest.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/sysemu/qtest.h b/include/sysemu/qtest.h
index
Am 12.12.23 um 12:36 schrieb Philippe Mathieu-Daudé:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/ipl.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 515dcf51b5..62182d81a0 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -35,7 +35,6 @@
Hi all,
I tried to implement the RCC (Reset and Clock Control) for the STM32L4x5_SoC
but ran into some problems regarding clock emulation in Qemu.
In this SoC, it is possible to change the source of several clocks used for
devices like the CPU, the USART, and approximately every other device on
On Wed, 22 Nov 2023 at 12:17, Mikhail Tyutin wrote:
>
> In system mode emulation, some of translation blocks could be
> interrupted on memory I/O operation. That leads to artificial
> construction of another translation block that contains memory
> operation only. If TCG plugin is not aware of
On 12/12/23 13:33, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (23):
exec/cpu-all: Remove unused tswapls() definitions
exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h'
target/ppc/excp_helper: Avoid 'abi_ptr' in system emulation
accel/tcg: Un-inline
int128_make128(), int128_getlo() and int128_urshift() are
declared in "qemu/int128.h". qatomic_read__nocheck() is
declared in "qemu/atomic.h".
Signed-off-by: Philippe Mathieu-Daudé
---
host/include/generic/host/load-extract-al16-al8.h | 3 +++
1 file changed, 3 insertions(+)
diff --git
On Fri, 24 Nov 2023 at 08:26, gaosong wrote:
>
> Ping !!
>
> Since [1] series had merged into master three weeks ago,
>
> I ping this series again.
Apologies for taking so long with this, I think I
lost track of it and then we've had the release period.
I have no particular issues with the
Theses files call cpu_ldl_code() which is declared
in "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/translator.c| 1 +
target/hexagon/translate.c| 1 +
target/microblaze/cpu.c | 1 +
target/microblaze/translate.c | 1 +
On Wed, 25 Oct 2023 at 10:29, Song Gao wrote:
>
> The result of the LSX instruction is in the low 128 bits
> of the vreg register. We use clean_lsx_result() to clean up
> the high 128 bits of the vreg register.
>
> Signed-off-by: Song Gao
> ---
> loongarch64.risu | 2121
"exec/user/abitypes.h" requires:
- "exec/cpu-defs.h" (TARGET_LONG_BITS)
- "exec/tswap.h" (tswap32)
In order to avoid "cpu.h", pick the minimum required headers.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
CPUArchState 'env' field is defined within the ArchCPU structure,
so we need to include each target "cpu.h" header which defines it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
---
include/exec/cpu-all.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff
"exec/cpu_ldst.h" doesn't need to huge "cpu.h" header,
but simply:
- exec/cpu-defs.h (TARGET_LONG_BITS)
- exec/tlb-common.h (CPUTLBEntry)
- exec/user/abitypes.h (abi_ulong)
- exec/user/guest-base.h(guest_base)
- exec/cpu-all.h(GUEST_ADDR_MAX and
The abi_ptr type is declared in "exec/cpu_ldst.h" with all
the load/store helpers. Some source files requiring abi_ptr
type don't need the load/store helpers. In order to simplify,
create a new "exec/abi_ptr.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
The XRSTOR instruction ends calling tlb_flush(), declared
in "exec/exec-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/i386/tcg/fpu_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
tswapl() and bswaptls() are target-dependent and only used
by user emulation. Move their definitions to a new header:
"exec/user/tswap-target.h".
Signed-off-by: Philippe Mathieu-Daudé
---
bsd-user/freebsd/target_os_elf.h | 1 +
bsd-user/freebsd/target_os_stack.h | 1 +
Declare 'have_guest_base' in "exec/user/guest-base.h".
Very few files require this header, so explicitly include
it there instead of "exec/cpu-all.h" which is used in many
source files.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
accel/tcg/ files requires the following definitions:
- TARGET_LONG_BITS
- TARGET_PAGE_BITS
- TARGET_PHYS_ADDR_SPACE_BITS
- TCG_GUEST_DEFAULT_MO
The first 3 are defined in "cpu-param.h". The last one
in "cpu.h", with a bunch of definitions irrelevant for
TCG. By moving the
We usually check target endianess before swapping values,
so target_words_bigendian() declaration makes sense in
"exec/tswap.h" with the target swapping helpers.
Remove "hw/core/cpu.h" when it was only included to get
the target_words_bigendian() declaration.
Signed-off-by: Philippe
set_helper_retaddr() is only used in accel/tcg/user-exec.c.
clear_helper_retaddr() is only used in accel/tcg/user-exec.c
and accel/tcg/user-exec.c.
No need to expose their definitions to all user-emulation
files including "exec/cpu_ldst.h", move them to a new
"user-retaddr.h" header (restricted
'abi_ptr' is a user specific type. The system emulation
equivalent is 'target_ulong'. Use it in ppc_ldl_code()
to emphasis this is not an user emulation function.
Signed-off-by: Philippe Mathieu-Daudé
---
target/ppc/excp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Extract page-protection definitions from "exec/cpu-all.h"
to "exec/page-prot-common.h".
The list of files requiring the new header was generated
using:
$ git grep -wE \
'PAGE_(READ|WRITE|EXEC|BITS|VALID|ANON|RESERVED|TARGET_.|PASSTHROUGH)'
Signed-off-by: Philippe Mathieu-Daudé
---
User-only objects might benefit from the "exec/target_page.h"
API, which allows to build some objects once for all targets.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Reviewed-by: Richard Henderson
---
meson.build | 2 +-
page-target.c| 43
"exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h",
however "exec/ram_addr.h" does.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
include/exec/ram_addr.h | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git
"semihosting/uaccess.h" only requires declarations
from "exec/cpu-defs.h". Avoid including the huge "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
include/semihosting/uaccess.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
qatomic_cmpxchg__nocheck(), qatomic_read__nocheck(),
qatomic_set__nocheck() are defined in "qemu/atomic.h".
Include it in order to avoid:
In file included from include/exec/helper-proto.h:10:
In file included from include/exec/helper-proto-common.h:10:
In file included from
Last use of tswapls() was removed 2 years ago in commit
aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64").
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index
Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h".
Signed-off-by: Philippe Mathieu-Daudé
---
semihosting/guestfd.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/semihosting/guestfd.c b/semihosting/guestfd.c
index 955c2efbd0..d3241434c5 100644
---
Nothing is required from the "qemu/thread.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 9a7b5737d3..26b44ca125 100644
--- a/include/exec/cpu-all.h
+++
tcg_cpu_init_cflags() accesses CPUState fields, so requires
"hw/core/cpu.h" to get its structure definition.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/tcg-accel-ops.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index
Hi,
These patches are extracted from a bigger work where
"exec/{exec,cpu,translate}-all.h" are split in various
specific APIs. This helped:
- differenciate/build:
. user VS system
. target-specific VS generic
which is necessary for heterogeneous build
- reduced header pressure
Functions such gdb_get_cpu_pid() dereference CPUState so
require the structure declaration from "hw/core/cpu.h":
static uint32_t gdb_get_cpu_pid(CPUState *cpu)
{
...
return cpu->cluster_index + 1;
}
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
---
From: Volker Rümelin
After a relatively short time, there is an multiplication overflow
when multiplying (now - buft_start) with hda_bytes_per_second().
While the uptime now - buft_start only overflows after 2**63 ns
= 292.27 years, this happens hda_bytes_per_second() times faster
with the
From: Philippe Mathieu-Daudé
The VirtioPCIDeviceTypeInfo structure, added in commit a4ee4c8baa
("virtio: Helper for registering virtio device types") got extended
in commit 8ea90ee690 ("virtio: add class_size") with the @class_size
field. Do similarly with the @instance_finalize field.
From: Philippe Mathieu-Daudé
assertRegexpMatches() has been removed in Python 3.12 and should be replaced by
assertRegex(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3
Inspired-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Message-ID:
On 12/12/23 00:16, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
Nothing is required from the "qemu/thread.h" and
"hw/core/cpu.h" headers.
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-all.h | 2 --
1 file changed, 2 deletions(-)
diff --git
From: Akihiko Odaki
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
This implementation follows what bottom half does, but it does not add
a tracepoint for the
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 8077b8e549 added:
Mikhail Tyutin writes:
> In system mode emulation, some of translation blocks could be
> interrupted on memory I/O operation. That leads to artificial
> construction of another translation block that contains memory
> operation only. If TCG plugin is not aware of that TB kind, it
> attempts to
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 4fb013afcc added:
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 9e4aa1fafe added:
From: Ivan Klokov
According to RISCV Specification sect 9.5 on two stage translation when
V=1 the vsstatus(mstatus in QEMU's terms) field MXR, which makes
execute-only pages readable, only overrides VS-stage page protection.
Setting MXR at HS-level(mstatus_hs), however, overrides both VS-stage
From: Fam Zheng
If the text description file is larger than DESC_SIZE, we force the last
byte in the buffer to be 0 and write it out.
This results in a corruption.
Try to allocate a big buffer in this case.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1923
Signed-off-by: Fam Zheng
From: Ivan Klokov
According to RISCV privileged spec sect. 5.3.2 Virtual Address Translation
Process
access-fault exceptions may raise only after PMA/PMP check. Current
implementation
generates an access-fault for mbare mode even if there were no PMA/PMP errors.
This patch removes the
From: Philippe Mathieu-Daudé
Commit 0be6bfac62 ("qdev: Implement variable length array properties")
added the DEFINE_PROP_ARRAY() macro with the following comment:
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
Commit 68fbcc344e added:
From: Thomas Huth
assertEquals() has been removed in Python 3.12 and should be replaced by
assertEqual(). See: https://docs.python.org/3.12/whatsnew/3.12.html#id3
Message-ID: <20231114134326.287242-1-th...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
(cherry
From: Max Filippov
In FDPIC signal handlers are passed around as FD pointers. Actual code
address and GOT pointer must be fetched from memory by the QEMU code
that implements kernel signal delivery functionality. This change is
equivalent to the following kernel change:
9c2cc74fb31e ("xtensa:
From: Richard Henderson
The file offset of the load segment is not relevant to the
low address, only the beginning of the virtual address page.
Cc: qemu-sta...@nongnu.org
Fixes: a93934fecd4 ("elf: take phdr offset into account when calculating the
program load address")
Resolves:
From: Gihun Nam
The current implementation initializes the stack pointer of AVR devices
to 0. Although older AVR devices used to be like that, newer ones set
it to RAMEND.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1525
Signed-off-by: Gihun Nam
Reviewed-by: Philippe Mathieu-Daudé
From: Akihiko Odaki
Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.
In preparation for such a change, add MemReentrancyGuard * as a
parameter of qemu_new_nic().
From: Peter Maydell
In commit edac4d8a168 back in 2015 when we added support for
the virtual timer offset CNTVOFF_EL2, we didn't correctly update
the timer-recalculation code that figures out when the timer
interrupt is next going to change state. We got it wrong in
two ways:
* for the 0->1
From: Palmer Dabbelt
Support for probing the Zicboz block size landed in Linux 6.6, which was
released a few weeks ago. This provides the user-configured block size
when Zicboz is enabled.
Signed-off-by: Palmer Dabbelt
Reviewed-by: Alistair Francis
Reviewed-by: Daniel Henrique Barboza
From: Daniel Henrique Barboza
Commit 49554856f0 fixed a problem, where TPM devices were not appearing
in the FDT, by delaying the FDT creation up until virt_machine_done().
This create a side effect (see gitlab #1925) - devices that need access
to the '/chosen' FDT node during realize() stopped
From: Román Cárdenas
If you check the manual of SiFive E310
(https://cdn.sparkfun.com/assets/7/f/0/2/7/fe310-g002-manual-v19p05.pdf),
you can see in Figure 1 that the CLINT is connected to the real time clock,
which also feeds the AON peripheral (they share the same clock).
In page 43, the
From: Peter Maydell
The syndrome register value always has an IL field at bit 25, which
is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32
bit instruction (or for exceptions which aren't traps on a known
instruction, like PC alignment faults). This means that our
syn_*() functions
From: Niklas Cassel
Legacy software contains a standard mechanism for generating a reset to a
Serial ATA device - setting the SRST (software reset) bit in the Device
Control register.
Serial ATA has a more robust mechanism called COMRESET, also referred to
as port reset. A port reset is the
The following patches are queued for QEMU stable v8.1.4:
https://gitlab.com/qemu-project/qemu/-/commits/staging-8.1
Patch freeze is 2023-12-20, and the release is planned for 2023-12-22:
https://wiki.qemu.org/Planning/8.1
Please respond here or CC qemu-sta...@nongnu.org on any additional
From: Richard Henderson
Perform the loop increment unconditionally, not nested
within the predication.
Cc: qemu-sta...@nongnu.org
Fixes: 3916841ac75 ("target/arm: Implement FMOPA, FMOPS (widening)")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1985
Signed-off-by: Richard Henderson
On 12/12/2023 12.30, Philippe Mathieu-Daudé wrote:
"hw/core/cpu.h" declares 'first_cpu'. Include it to avoid
when unrelated headers are refactored:
system/qtest.c:548:33: error: use of undeclared identifier 'first_cpu'
address_space_write(first_cpu->as, addr,
Mikhail Tyutin writes:
> TCG Plugin callback to notify plugins when interrupt is triggered for
> a vCpu. The plugin can optionally use this notification to see reason
> of aborted instruction execution.
>
> Signed-off-by: Mikhail Tyutin
> ---
> accel/tcg/cpu-exec.c | 5 +
>
On 12/12/23 00:00, Richard Henderson wrote:
On 12/11/23 13:19, Philippe Mathieu-Daudé wrote:
Nothing in guestfd.c requires "semihosting/uaccess.h".
Signed-off-by: Philippe Mathieu-Daudé
---
semihosting/guestfd.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/semihosting/guestfd.c
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/ipl.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 515dcf51b5..62182d81a0 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -35,7 +35,6 @@
#include "qemu/cutils.h"
#include "qemu/option.h"
vCPU "reset" is only possible with system emulation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Reviewed-by: Song Gao
---
target/i386/cpu.c | 2 +-
target/loongarch/cpu.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c
mips_itu.c only requires declarations from "hw/core/cpu.h"
and "cpu.h". Avoid including the huge "exec/exec-all.h" header.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/mips_itu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/spapr_hcall.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 522a2396c7..fcefd1d1c7 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -8,7 +8,6 @@
#include "qemu/main-loop.h"
Philippe Mathieu-Daudé (4):
hw/ppc/spapr_hcall: Remove unused 'exec/exec-all.h' included header
hw/misc/mips_itu: Remove unnecessary 'exec/exec-all.h' header
hw/s390x/ipl: Remove unused 'exec/exec-all.h' included header
target: Restrict 'sysemu/reset.h' to system emulation
"hw/core/cpu.h" declares 'first_cpu'. Include it to avoid
when unrelated headers are refactored:
system/qtest.c:548:33: error: use of undeclared identifier 'first_cpu'
address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
^
Signed-off-by:
Outside of system emulation, only qtest_enabled() can be used.
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/qtest.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/sysemu/qtest.h b/include/sysemu/qtest.h
index 85f05b0e46..b5d5fd3463 100644
--- a/include/sysemu/qtest.h
Add missing header and restrict to sysemu.
Philippe Mathieu-Daudé (2):
system/qtest: Include missing 'hw/core/cpu.h' header
system/qtest: Restrict QTest API to system emulation
include/sysemu/qtest.h | 2 ++
system/qtest.c | 1 +
2 files changed, 3 insertions(+)
--
2.41.0
Ilya Leoshkevich writes:
> Stop using TARGET_PAGE_MASK in order to make perf.c more
> target-agnostic.
>
> Signed-off-by: Ilya Leoshkevich
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Akihiko Odaki writes:
> On 2023/12/12 2:01, Alex Bennée wrote:
>> Cleber Rosa writes:
>>
>>> Based on many runs, the average run time for these 4 tests is around
>>> 250 seconds, with 320 seconds being the ceiling. In any way, the
>>> default 120 seconds timeout is inappropriate in my
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