On Fri, Jan 19, 2024 at 03:55:49PM +, Thomas Huth wrote:
>
> Hi,
>
> since we recently introduced test timouts in QEMU's meson set up, I noticed
> that the tests/unit/test-iov times out when doing "make vm-build-netbsd
> BUILD_TARGET=check-unit" (or vm-build-openbsd).
>
> And indeed, when
On 19/1/24 15:39, Anton Johansson wrote:
Allows for future commits to use TargetPageBits to access page bits and
mask, thus making TARGET_PAGE_* independent of softmmu target.
In the future, this will also be important fo allowing heterogeneous CPUs
on the same board.
Yeah I carry an almost
Hi,
since we recently introduced test timouts in QEMU's meson set up, I noticed
that the tests/unit/test-iov times out when doing "make vm-build-netbsd
BUILD_TARGET=check-unit" (or vm-build-openbsd).
And indeed, when increasing the timeout, you can see that the test-iov runs
for multiple
From: Philippe Mathieu-Daudé
Since the pkgsrc-2023Q3 release [*], the py-expat package has been
merged into the base 'python' package:
- Several packages have been folded into base packages. While the
result is simpler, those updating may need to force-remove the
secondary packages,
On Fri, 19 Jan 2024 at 14:07, Kevin Wolf wrote:
>
> Am 19.01.2024 um 13:55 hat Peter Maydell geschrieben:
> > How are the iotests supposed to select a machine model to run
> > on, and how are they intended to mark themselves as requiring
> > particular facilities, like PCI? Presumably some of the
From: Philippe Mathieu-Daudé
This option has been deprecated before the 8.1 release,
in commit 12fd0f41d0 ("Document that -singlestep command
line option is deprecated"). Time to drop it.
Inspired-by: Thomas Huth
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by:
From: Philippe Mathieu-Daudé
This member has been deprecated before the 8.1 release, in commit
34c18203d4 ("qmp: Deprecate 'singlestep' member of StatusInfo").
Time to drop it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Markus Armbruster
Message-ID:
From: Philippe Mathieu-Daudé
This command has been deprecated before the 8.1 release,
in commit e9ccfdd91d ("hmp: Add 'one-insn-per-tb' command
equivalent to 'singlestep'"). Time to drop it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: "Dr. David Alan Gilbert"
Reviewed-by: Markus
From: Matthew Rosato
Typically we refresh the host fh during CLP enable, however it's possible
that the device goes through multiple reset events before the guest
performs another CLP enable. Let's handle this for now by refreshing the
host handle from vfio before disabling aif.
Fixes:
It's been marked as deprecated since QEMU 8.0, so it should be fine
to remove this now.
Message-ID: <20240118103759.130748-3-th...@redhat.com>
Reviewed-by: Markus Armbruster
Reviewed-by: Michael Tokarev
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 6 --
It's been marked as deprecated since QEMU 8.1 (and was only available
since QEMU 8.0 anyway), so it should be fine to remove this now.
Reviewed-by: Claudio Imbrenda
Reviewed-by: Markus Armbruster
Message-ID: <20240118103759.130748-4-th...@redhat.com>
Signed-off-by: Thomas Huth
---
The following changes since commit 88cf5fec91e50cd34bc002b633b4116228db0bc8:
Merge tag 'pull-target-arm-20240118' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-01-18
12:48:17 +)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git
It's been marked as deprecated since QEMU 8.1, so it should be fine
to remove this now.
Reviewed-by: Markus Armbruster
Message-ID: <20240118103759.130748-5-th...@redhat.com>
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 5 -
docs/about/removed-features.rst | 5 +
From: Matthew Rosato
ISM devices are sensitive to manipulation of the IOMMU, so the ISM device
needs to be reset before the vfio-pci device is reset (triggering a full
UNMAP). In order to ensure this occurs, trigger ISM device resets from
subsystem_reset before triggering the PCI bus reset
It's been marked as deprecated since QEMU 8.0, so it should be fine
to remove this now.
Reviewed-by: Markus Armbruster
Message-ID: <20240118103759.130748-2-th...@redhat.com>
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 6 --
docs/about/removed-features.rst | 8
From: Matthew Rosato
Use a flag to keep track of whether AIF is currently enabled. This can be
used to avoid enabling/disabling AIF multiple times as well as to determine
whether or not it should be disabled during reset processing.
Fixes: d0bc7091c2 ("s390x/pci: enable adapter event
Only depends on cpu.h.
Signed-off-by: Anton Johansson
---
accel/tcg/tcg-runtime-gvec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c
index afca89baa1..52f983dd4c 100644
--- a/accel/tcg/tcg-runtime-gvec.c
+++
Only depends on cpu.h.
Signed-off-by: Anton Johansson
---
accel/tcg/tcg-runtime.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c
index 9fa539ad3d..fd78a10fe2 100644
--- a/accel/tcg/tcg-runtime.c
+++ b/accel/tcg/tcg-runtime.c
Uses target_supports_mttcg() and target_long_bits() to turn ifdefs into
runtime branches.
Signed-off-by: Anton Johansson
---
accel/tcg/tcg-all.c | 25 +
1 file changed, 9 insertions(+), 16 deletions(-)
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index
Build a common static library for a few softmmu files.
Signed-off-by: Anton Johansson
---
accel/tcg/meson.build | 57 ++-
1 file changed, 45 insertions(+), 12 deletions(-)
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index
Make CPUState offset calculations target independent by using that
CPUState and CPUArchState are statically guaranteed to lie next to each
other in memory.
Signed-off-by: Anton Johansson
---
accel/tcg/translator.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff
Am 17.01.24 um 17:07 schrieb Vladimir Sementsov-Ogievskiy:
> Add a parameter that enables discard-after-copy. That is mostly useful
> in "push backup with fleecing" scheme, when source is snapshot-access
> format driver node, based on copy-before-write filter snapshot-access
> API:
>
> [guest]
Functions are target independent.
Signed-off-by: Anton Johansson
---
include/exec/cpu-all.h| 25 -
include/exec/cpu-common.h | 25 +
2 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/include/exec/cpu-all.h
Uninlines the target-defined cpu_mmu_index() function by moving its
definition to target/*/cpu.c. This allows for compiling memory access
functions in accel/tcg/cputlb.c without having to know target specifics.
Signed-off-by: Anton Johansson
---
include/exec/cpu-common.h | 10 ++
TCGCPUOps contains an extra function pointer when included with
NEED_CPU_H, these are moved from the middle to the end of the struct. As
such offsets to target independent function pointers don't vary in
target specific and independent code.
[Move target specfic fields to separate struct?]
These don't vary across targets and are used in soon-to-be common code
(cputlb.c).
Signed-off-by: Anton Johansson
---
include/exec/cpu-all.h| 24
include/exec/cpu-common.h | 30 ++
2 files changed, 30 insertions(+), 24 deletions(-)
diff
Signed-off-by: Anton Johansson
---
accel/tcg/internal-target.h | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
index 4e36cf858e..3bcd1bbc84 100644
--- a/accel/tcg/internal-target.h
+++
Initializes mo_te field of TCGContext to the target endian memory order
MO_TE, so it can be used within cputlb.c.
Signed-off-by: Anton Johansson
---
accel/tcg/translate-all.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c
Makes xen.h header independent of softmmu target. Note:
CONFIG_XEN_IS_POSSIBLE is only used define stubs in xen.h and optimize
xen_enabled().
Required by cpu_physical_memory_set_dirty_range() in ram_addr.h.
Signed-off-by: Anton Johansson
---
include/sysemu/xen.h | 27
These macros are only used for softmmu targets and only used in
cputlb.c, move definitions there.
Signed-off-by: Anton Johansson
---
include/exec/cpu-defs.h | 3 ---
accel/tcg/cputlb.c | 3 +++
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/exec/cpu-defs.h
Signed-off-by: Anton Johansson
---
include/exec/cpu_ldst.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index 6061e33ac9..eb8f3f0595 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -121,8 +121,8 @@
TARGET_PAGE_* are now target-independent for softmmu targets, and can
safely be accessed common code.
Signed-off-by: Anton Johansson
---
include/exec/poison.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 1ea5633eb3..6d87954a91 100644
We need to be able access the variable TARGET_PAGE_* macros in a
target-independent manner.
Signed-off-by: Anton Johansson
---
include/exec/cpu-all.h| 29 ++---
include/exec/cpu-common.h | 25 +
2 files changed, 35 insertions(+), 19
Based on an older version of rth/tcg-next and some patches by me, Philippe,
and Richard (most of which have since been merged), base branch here
https://gitlab.com/AntonJohansson/qemu/-/tree/feature/accel-tcg-once-base
Rebase is in the works, but should not affect the larger parts of this
TLB_* macros and tlb_*() functions are target independent, move to cpu-common.h.
Signed-off-by: Anton Johansson
---
include/exec/cpu-all.h| 81 --
include/exec/cpu-common.h | 83 +++
2 files changed, 83 insertions(+),
Required by cpu_ldub_code() and friends in cputlb.c to access the MO_TE
MemOp in a target-independent way.
Signed-off-by: Anton Johansson
---
include/tcg/tcg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 7743868dc9..4ca626aeae 100644
---
Makes gen_intermediate_code() signature target agnostic so the function
can be called from accel/tcg/translate-all.c without target specifics.
Signed-off-by: Anton Johansson
---
include/exec/translator.h | 2 +-
target/alpha/translate.c | 2 +-
target/arm/tcg/translate.c| 2 +-
cpu-common.h is only needed for vaddr
Signed-off-by: Anton Johansson
---
include/hw/core/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index f25d53ee90..57d100c203 100644
--- a/include/hw/core/cpu.h
+++
TARGET_PAGE_BITS_MIN is now defined as target_page.bits_min when
PAGE_VARY is used, similar to other TARGET_PAGE_* macros. We still pick
whatever minimum the target specifies, however in a heterogeneous
context we would want the maximum of all target_page.bits_min.
This also makes TLB_* macros
Makes *_code() memory access functions target independent.
Signed-off-by: Anton Johansson
---
accel/tcg/cputlb.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index a75a52d141..bfbbfd0fdb 100644
--- a/accel/tcg/cputlb.c
+++
Uses target_has_precise_smc() and target_phys_addr_space_bits() to turn
ifdefs into runtime branches.
Signed-off-by: Anton Johansson
---
accel/tcg/tb-maint.c | 47 +++-
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/accel/tcg/tb-maint.c
This commit squashes header changes that are likely to change during
rebase. Code is moved from common to specific headers, or vice versa
to ensure that no target-specific code is pulled by accel/tcg via
headers.
Signed-off-by: Anton Johansson
---
accel/tcg/tb-hash.h| 4 +-
Allows for future commits to use TargetPageBits to access page bits and
mask, thus making TARGET_PAGE_* independent of softmmu target.
In the future, this will also be important fo allowing heterogeneous CPUs
on the same board.
Signed-off-by: Anton Johansson
---
target/alpha/cpu-param.h |
Makes translate-all.c independent of softmmu target by switching
TARGET_LONG_BITS-> target_long_bits()
TARGET_INSN_START_WORDS -> tcg_ctx->insn_start_words,
target_insn_start_words(),
TCG_GUEST_DEFAULT_MO-> target_default_memory_order()
CPU_TLB_DYN_MAX_BITS depends on TARGET_VIRT_ADDR_SPACE_BITS on 64-bit
hosts, and is not yet target independent.
Signed-off-by: Anton Johansson
---
accel/tcg/cputlb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index
Adds wrapper functions around common target specific macros required by
accel/tcg.
Signed-off-by: Anton Johansson
---
include/hw/core/cpu.h | 9 +++
cpu-target.c | 62 +++
2 files changed, 71 insertions(+)
diff --git a/include/hw/core/cpu.h
Switches computation of offsets into CPUState to use that the offset
between CPUState and CPUArchState is guaranteed to be sizeof(CPUState).
Signed-off-by: Anton Johansson
---
accel/tcg/plugin-gen.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git
Needed to work around circular includes. vaddr is currently defined in
cpu-common.h and needed by hw/core/cpu.h, but cpu-common.h also need
cpu.h to know the size of the CPUState.
[Maybe we can instead move parts of cpu-common.h w. hw/core/cpu.h to
sort out the circular inclusion.]
Updates target/ QEMU_LOG macros to use VADDR_PRIx for printing updated
DisasContextBase fields.
Signed-off-by: Anton Johansson
---
include/exec/translator.h | 6 +++---
target/mips/tcg/translate.h | 3 ++-
target/hexagon/translate.c | 3 ++-
target/m68k/translate.c | 2 +-
Required to compile accel/tcg/translate-all.c once for softmmu targets.
The function gets quite big for some targets so uninlining makes sense.
Signed-off-by: Anton Johansson
---
include/exec/cpu-common.h | 4 +++
target/alpha/cpu.h| 11 ---
target/arm/cpu.h | 3 --
Prepares target for typedef'ing abi_ptr to vaddr. Fixes sign extension
bug that would result from abi_ptr being unsigned in the future.
Necessary to make memory access function signatures target agnostic.
Signed-off-by: Anton Johansson
---
target/tricore/op_helper.c | 8
1 file
[NOTE: We could also use target_long_bits(), which is introduced later]
Signed-off-by: Anton Johansson
---
include/exec/cpu_ldst.h | 31 ---
accel/tcg/cputlb.c | 34 --
2 files changed, 36 insertions(+), 29 deletions(-)
diff
On Mon, 15 Jan 2024 at 04:35, Bin Meng wrote:
>
> The Arm dtb changes caused an address change:
>
> DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x0001)
> {
> [ ... ]
> -Name (MEMA, 0x43C8)
> +Name (MEMA, 0x43D8)
> }
>
> Signed-off-by: Bin Meng
>
> ---
You
On Mon, 15 Jan 2024 at 04:34, Bin Meng wrote:
>
> By default QEMU generates a 1 MiB sized device tree. Let's pack it
> to save some room.
>
> Signed-off-by: Bin Meng
> ---
>
> hw/arm/boot.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/hw/arm/boot.c b/hw/arm/boot.c
>
Am 19.01.2024 um 13:55 hat Peter Maydell geschrieben:
> If you build QEMU with support for the sh4 target only
> (configure --target-list=sh4-softmmu) then 'make check' fails
> in the iotests, because some iotests, including for instance 040,
> try to create a machine with a virtio-scsi device,
Hi Eugenio,
Thanks for your comments. Very helpful. Wentao and I will discuss and get back
to you later.
Also welcome for any comments from other guys.
Best Regards,
Rick Zhong
-邮件原件-
发件人: Eugenio Perez Martin
发送时间: 2024年1月19日 18:26
收件人: Wentao Jia
抄送: qemu-devel@nongnu.org;
So finally tested with this:
-cpu host,hv_relaxed,hv_spinlocks=0x1fff,hv_vapic,hv_time,-vmx
The used hyper-v enhancements are the ones generally recommended for
Windows vms.
Overall it seemed to really work: the performance was like bare metal,
and the BSOD second problem was also gone (for
From: owl
Octeon+
- SAA
- SAAD
Octeon2
- LAI
- LAID
- LAD
- LADD
- LAS
- LASD
- LAC
- LACD
- LAA
- LAAD
- LAW
- LAWD
- LWX
- LHX
- LDX
- LBUX
- LWUX
- LHUX
- LBX
Signed-off-by: owl
---
target/mips/tcg/octeon.decode | 35
target/mips/tcg/octeon_translate.c | 281
When starting ioeventfd it is common practice to set the event notifier
so that the ioeventfd handler is triggered to run immediately. There may
be no requests waiting to be processed, but the idea is that if a
request snuck in then we guarantee that it will be detected.
One scenario where
We no longer rely on setting the AioContext since the block layer
IO_CODE APIs can be called from any thread. Now it's just a hint to help
block jobs and other operations co-locate themselves in a thread with
the guest I/O requests. Keep going if setting the AioContext fails.
Suggested-by: Kevin
The dataplane code used to be significantly different from the
non-dataplane code and therefore had a separate source file.
Over time the difference has gotten smaller because the I/O code paths
were unified. Nowadays the distinction between the VirtIOBlock and
VirtIOBlockDataPlane structs is
On Thu, Dec 21, 2023 at 02:40:19PM +0100, Kevin Wolf wrote:
> Am 20.12.2023 um 14:47 hat Stefan Hajnoczi geschrieben:
> > Add the iothread-vq-mapping parameter to assign virtqueues to IOThreads.
> > Store the vq:AioContext mapping in the new struct
> > VirtIOBlockDataPlane->vq_aio_context[] field
The dataplane code is really about using ioeventfd. It's used both for
IOThreads (what we think of as dataplane) and for the core virtio-pci
code's ioeventfd feature (which is enabled by default and used when no
IOThread has been specified). Rename the code to reflect this.
Signed-off-by: Stefan
virtio_blk_data_plane_create() and virtio_blk_data_plane_destroy() are
actually about s->vq_aio_context[] rather than managing
dataplane-specific state.
As a prerequisite to using s->vq_aio_context[] in all code paths (even
when dataplane is not used), rename these functions to reflect that they
A virtio-blk device with the iothread-vq-mapping parameter has
per-virtqueue AioContexts. It is not thread-safe to process s->rq
requests in the BlockBackend AioContext since that may be different from
the virtqueue's AioContext to which this request belongs. The code
currently races and could
Kevin Wolf identified some issues with the virtio-blk iothread-vq-mapping patch
series that was merged at the end of 2023:
1. s->rq is restarted from one AioContext and races with the other
iothread-vq-mapping AioContexts.
2. Failure to set the AioContext is no longer fatal since the IO_CODE
pet...@redhat.com writes:
> From: Peter Xu
>
> It's always used to compare against another uint64_t. Make it always clear
> that it's never a negative.
>
> Signed-off-by: Peter Xu
Reviewed-by: Fabiano Rosas
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on trace events should be able to opt-in to each trace event and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into trace events. Errors or
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
This series changes some printfs to use the trace event framework.
Additionally, it converts some error/warning reporting fprintfs to
error_report/warn_report.
Differences from v1
:
- addressed Alex's review
Manos Pitsidianakis (5):
hw/arm/z2: convert DPRINTF to trace events and guest
pet...@redhat.com writes:
> From: Peter Xu
>
> When the migration frameworks fetches the exact pending sizes, it means
> this check:
>
> remaining_size < s->threshold_size
>
> Must have been done already, actually at migration_iteration_run():
>
> if (must_precopy <= s->threshold_size) {
>
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on tracepoints should be able to opt-in to each tracepoint and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into tracepoints.
Tracing DPRINTFs to stderr might not be desired. A developer that relies
on trace events should be able to opt-in to each trace event and rely on
QEMU's log redirection, instead of stderr by default.
This commit converts DPRINTFs in this file that are used for tracing
into trace events. DPRINTFs
According to the QEMU Coding Style document:
> Do not use printf(), fprintf() or monitor_printf(). Instead, use
> error_report() or error_vreport() from error-report.h. This ensures the
> error is reported in the right place (current monitor or stderr), and in
> a uniform format.
> Use
pet...@redhat.com writes:
> From: Peter Xu
>
> RAM_SAVE_FLAG_MEM_SIZE contains the total length of ramblock idstr to know
> whether scanning of ramblocks is complete. Drop the trick.
>
> Signed-off-by: Peter Xu
Reviewed-by: Fabiano Rosas
Peter Xu writes:
> On Thu, Jan 18, 2024 at 01:49:51PM -0300, Fabiano Rosas wrote:
>> Until 9.0 is out, we need to keep the aarch64 job disabled because the
>> tests always use the n-1 version of migration-test. That happens to be
>> broken for aarch64 in 8.2. Once 9.0 is out, it will become the
Peter Xu writes:
> Fabiano,
>
> On Thu, Jan 18, 2024 at 01:49:48PM -0300, Fabiano Rosas wrote:
>> Here's the second half of adding a migration compatibility test to CI.
>>
>> We've already added support for running the full set of migration
>> tests with two QEMU binaries since commit
Peter Xu writes:
> On Tue, Jan 16, 2024 at 05:25:03PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Mon, Nov 27, 2023 at 05:26:00PM -0300, Fabiano Rosas wrote:
>> >> Currently multifd does not need to have knowledge of pages on the
>> >> receiving side because all the information
If you build QEMU with support for the sh4 target only
(configure --target-list=sh4-softmmu) then 'make check' fails
in the iotests, because some iotests, including for instance 040,
try to create a machine with a virtio-scsi device, but they don't
do anything to ensure that the machine they
On 1/19/24 08:21, Rob Bradford wrote:
Following the pattern for 'M' and Zmmul check if either the 'A'
extension is enabled or the appropriate split extension for the
instruction.
Signed-off-by: Rob Bradford
---
Reviewed-by: Daniel Henrique Barboza
On 1/12/24 06:43, Ethan Chen wrote:
If a source device is connected to the IOPMP device, its memory
transaction will be checked by the IOPMP rule.
When using RISC-V virt machine option "iopmp=on", the generic PCIe host
bridge connects to IOPMP. The PCI devices on the brigde will connets to
Hi,
I have some code style comments:
On 1/12/24 06:43, Ethan Chen wrote:
Support specification Version 1.0.0-draft4 rapid-k model.
The specification url:
https://github.com/riscv-non-isa/iopmp-spec/blob/main/riscv_iopmp_specification.pdf
The memory transaction from source devices connected to
Manos Pitsidianakis writes:
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on tracepoints should be able to opt-in to each tracepoint and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts DPRINTFs in this file that are used for
Manos Pitsidianakis writes:
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on tracepoints should be able to opt-in to each tracepoint and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts DPRINTFs in this file that are used for
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv1 6/6] intel_iommu: add a framework to check and
>sync host IOMMU cap/ecap
>
>
>
>On 1/18/24 10:30, Duan, Zhenzhong wrote:
>> Hi Eric,
>>
>>> -Original Message-
>>> From: Eric Auger
>>> Subject: Re: [PATCH rfcv1
From: Max Filippov
Don't embed ibreak exception generation into TB and don't invalidate TB
on ibreak address change. Add CPUBreakpoint pointers to xtensa
CPUArchState, use cpu_breakpoint_insert/cpu_breakpoint_remove_by_ref to
manage ibreak breakpoints and provide
From: Gerd Hoffmann
Use the helper functions we have to read/write multi-byte values
in correct byte order.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20240108160900.104835-3-kra...@redhat.com>
Signed-off-by: Philippe
From: Mark Cave-Ayland
The setting of DMA_STAT_DONE at the end of a DMA transfer can be configured to
generate an interrupt, however the Linux driver manually checks for
DMA_STAT_DONE
being set and if it is, considers that a DMA transfer has completed.
If DMA_STAT_DONE is set but the ESP
cpu_class_init() is common, so rename it as cpu_common_class_init()
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel Henrique Barboza
Message-ID: <2024020221.35072-3-phi...@linaro.org>
---
hw/core/cpu-common.c | 4 ++--
1 file changed, 2 insertions(+),
cpu_class_init() is specific to s390x SCLP, so rename
it as sclp_cpu_class_init() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Reviewed-by: Eric Farman
Message-ID: <2024020221.35072-4-phi...@linaro.org>
---
Keep system/watchpoint.c accelerator-agnostic by moving
TCG specific code to accel/tcg/watchpoint.c. Update meson.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <2024062032.43378-1-phi...@linaro.org>
---
accel/tcg/watchpoint.c | 143
From: Bin Meng
Some ELF files really do have segments of zero size, e.g.:
Program Headers:
Type Offset VirtAddr PhysAddr
FileSizMemSiz Flags Align
RISCV_ATTRIBUT 0x25b8 0x
The tcg_cpu_FOO() names are x86 specific, so rename
them as x86_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Michael Tokarev
Message-ID: <2024020221.35072-5-phi...@linaro.org>
---
target/i386/tcg/tcg-cpu.c | 32
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-ID: <20231208113529.74067-6-phi...@linaro.org>
---
accel/tcg/icount-common.c | 4 +++-
stubs/icount.c| 2 +-
util/async.c | 16 +---
3 files changed, 13 insertions(+), 9
Rather than having to lookup for what the 0, 1, 2, ...
icount values are, use a enum definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-ID: <20231208113529.74067-4-phi...@linaro.org>
---
include/sysemu/cpu-timers.h | 20 +---
-cpus-20240119
for you to fetch changes up to 7ec5d7d91215815e885d2b38e62256e8fd8e2bce:
configure: Add linux header compile support for LoongArch (2024-01-19
12:28:59 +0100)
HW core patch queue
. Deprecate unmaintained SH-4
From: Mark Cave-Ayland
Even though the BLAST command isn't fully implemented in QEMU, the
DMA_STAT_BCMBLT
bit should be set after the command has been issued to indicate that the command
has completed.
This fixes an issue with the DC390 DOS driver which issues the BLAST command as
part of its
From: Zhao Liu
The hw/core/cpu.c was split as hw/core/cpu-common.c and
hw/core/cpu-sysemu.c in the commit df4fd7d5c8a3 ("cpu: Split as
cpu-common / cpu-sysemu").
Update the related entry.
Signed-off-by: Zhao Liu
Reviewed-by: Philippe Mathieu-Daudé
Message-ID:
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have icount_configure()
return a boolean indicating whether an error is set or not.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-ID:
From: Mark Cave-Ayland
The am53c974/dc390 PCI interrupt has two separate sources: the first is from the
internal ESP device, and the second is from the PCI DMA transfer logic.
Update the ESP interrupt handler so that it sets DMA_STAT_SCSIINT rather than
driving the PCI IRQ directly, and
101 - 200 of 249 matches
Mail list logo
