Do we still need pre-meson compatibility hacks?

2024-01-24 Thread Paolo Bonzini
Right now configure contains a couple hacks to preserve some of the semantics of the pre-meson build system: 1) emulation of ./configure by creating a build directory and a forwarding GNUmakefile (requested by Kevin) 2) creation of symlinks such as x86_64-softmmu/qemu-system-x86_64 and

[PATCH v2 2/2] smmu: Clear SMMUPciBus pointer cache when system reset

2024-01-24 Thread Zhenzhong Duan
s->smmu_pcibus_by_bus_num is a SMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to smmu_iommu_mr() providing the wrong iommu MR. Suggested-by: Eric

[PATCH v2 0/2] Two minor fixes on virtio-iommu and smmu

2024-01-24 Thread Zhenzhong Duan
Hi, PATCH1 fixes a potential issue with vfio devices when reboot to a different OS which set bus number differently from previous OS. I didn't reproduce the issue in reality, but it's still possible in theory. VTD doesn't have same issue as it use some verify logic to ensure right iommu MR is

[PATCH v2 1/2] virtio_iommu: Clear IOMMUPciBus pointer cache when system reset

2024-01-24 Thread Zhenzhong Duan
s->iommu_pcibus_by_bus_num is a IOMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to endpoint binding to wrong iommu MR in virtio_iommu_get_endpoint(),

[PULL 0/2] loongarch-to-apply queue

2024-01-24 Thread Song Gao
The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa: Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125 for

[PULL 1/2] target/loongarch: Set cpuid CSR register only once with kvm mode

2024-01-24 Thread Song Gao
From: Bibo Mao CSR cpuid register is used for routing irq to different vcpus, its value is kept unchanged since poweron. So it is not necessary to set CSR cpuid register after system resets, and it is only set at vm creation stage. Signed-off-by: Bibo Mao Reviewed-by: Song Gao Message-Id:

[PULL 2/2] target/loongarch/kvm: Enable LSX/LASX extension

2024-01-24 Thread Song Gao
The kernel had already support LSX and LASX [1], but QEMU is disable LSX/LASX for kvm. This patch adds kvm_check_cpucfg2() to check CPUCFG2. [1]: https://lore.kernel.org/all/cabgobfzhrf7e_7jk4uprmsyxty3eiuuywhc35jqncnl9s-z...@mail.gmail.com/ Signed-off-by: Song Gao Reviewed-by: Bibo Mao

[PULL 0/2] loongarch-to-apply queue

2024-01-24 Thread Song Gao
The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa: Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125 for

[PULL 0/2] loongarch-to-apply queue

2024-01-24 Thread Song Gao
The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa: Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +) are available in the Git repository at: https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125 for

[PATCH v3 0/3] Add support for the RAPL MSRs series

2024-01-24 Thread Anthony Harivel
Dear maintainers, First of all, thank you very much for your recent review of my patch [1]. In this version (v3), I have attempted to address the most crucial and challenging aspect highlighted in your last review. I am hopeful that we can now engage in a discussion and address the remaining

[PATCH v3 3/3] Add support for RAPL MSRs in KVM/Qemu

2024-01-24 Thread Anthony Harivel
Starting with the "Sandy Bridge" generation, Intel CPUs provide a RAPL interface (Running Average Power Limit) for advertising the accumulated energy consumption of various power domains (e.g. CPU packages, DRAM, etc.). The consumption is reported via MSRs (model specific registers) like

[PATCH v3 1/3] qio: add support for SO_PEERCRED for socket channel

2024-01-24 Thread Anthony Harivel
The function qio_channel_get_peercred() returns a pointer to the credentials of the peer process connected to this socket. This credentials structure is defined in as follows: struct ucred { pid_t pid;/* Process ID of the sending process */ uid_t uid;/* User ID of the

[PATCH v3 2/3] tools: build qemu-vmsr-helper

2024-01-24 Thread Anthony Harivel
Introduce a privileged helper to access RAPL MSR. The privileged helper tool, qemu-vmsr-helper, is designed to provide virtual machines with the ability to read specific RAPL (Running Average Power Limit) MSRs without requiring CAP_SYS_RAWIO privileges or relying on external, out-of-tree patches.

Re: [PATCH 2/8] ppc/spapr|pnv: Remove SAO from pa-features when running MTTCG

2024-01-24 Thread Nicholas Piggin
On Thu Jan 25, 2024 at 1:11 PM AEST, David Gibson wrote: > On Tue, Jan 23, 2024 at 11:57:56AM +1000, Nicholas Piggin wrote: > > On Fri Jan 19, 2024 at 10:23 AM AEST, David Gibson wrote: > > > On Fri, Jan 19, 2024 at 12:09:36AM +1000, Nicholas Piggin wrote: > > > > SAO is a page table attribute

[PATCH] target/loongarch: Fix qtest test-hmp error when KVM-only build

2024-01-24 Thread Song Gao
The cc->sysemu_ops->get_phys_page_debug() is NULL when KVM-only build. this patch fixes it. Signed-off-by: Song Gao --- target/loongarch/internals.h | 20 ++- target/loongarch/cpu.c| 2 - target/loongarch/cpu_helper.c | 231 ++

Re: How can I know Page Table address on RAM?

2024-01-24 Thread Junho
Hello Nick, It helped a lot. The page table is software loaded on the MMU of the target I'm using. I'll watch for TLBs as recommended. Thank you, Junho 2024년 1월 23일 (화) 오후 4:36, Nicholas Piggin 님이 작성: > On Mon Jan 22, 2024 at 6:54 PM AEST, Thomas Huth wrote: > > On 22/01/2024 05.11, Junho

Re: [PATCH 7/9] target/i386: Extract x86_need_replay_interrupt() from accel/tcg/

2024-01-24 Thread Pavel Dovgalyuk
Reviewed-by: Pavel Dovgalyuk On 24.01.2024 13:16, Philippe Mathieu-Daudé wrote: Move this x86-specific code out of the generic accel/tcg/. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/tcg/helper-tcg.h| 1 + accel/tcg/cpu-exec.c| 9 -

Re: [PATCH 6/9] accel/tcg: Introduce TCGCPUOps::need_replay_interrupt() handler

2024-01-24 Thread Pavel Dovgalyuk
Reviewed-by: Pavel Dovgalyuk On 24.01.2024 13:16, Philippe Mathieu-Daudé wrote: In order to make accel/tcg/ target agnostic, introduce the need_replay_interrupt() handler. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 5 + accel/tcg/cpu-exec.c | 5

RE: [PATCH 3/3] virtio-iommu: Support PCI device aliases

2024-01-24 Thread Duan, Zhenzhong
>-Original Message- >From: Eric Auger >Subject: Re: [PATCH 3/3] virtio-iommu: Support PCI device aliases > >Hi Zhenzhong, > >On 1/22/24 07:40, Zhenzhong Duan wrote: >> Currently virtio-iommu doesn't work well if there are multiple devices >> in same iommu group. In below example config,

[PATCH v3 2/5] hw/arm/aspeed: Set default CPU count using aspeed_soc_num_cpus()

2024-01-24 Thread Philippe Mathieu-Daudé
Since commit b7f1a0cb76 ("arm/aspeed: Compute the number of CPUs from the SoC definition") Aspeed machines use the aspeed_soc_num_cpus() helper to set the number of CPUs. Use it for the ast1030-evb (commit 356b230ed1 "aspeed/soc: Add AST1030 support") and supermicrox11-bmc (commit 40a38df55e

[PATCH v3 5/5] hw/arm/aspeed: Check for CPU types in machine_run_board_init()

2024-01-24 Thread Philippe Mathieu-Daudé
Aspeed SoCs use a single CPU type (set as AspeedSoCClass::cpu_type). Convert it to a NULL-terminated array (of a single non-NULL element). Set MachineClass::valid_cpu_types[] to use the common machine code to provide hints when the requested CPU is invalid (see commit e702cbc19e ("machine:

[PATCH v3 1/5] hw/arm/aspeed: Remove dead code

2024-01-24 Thread Philippe Mathieu-Daudé
Remove copy/paste typo from commit 6c323aba40 ("hw/arm/aspeed: Adding new machine Tiogapass in QEMU"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/aspeed.c | 1 - 1 file changed, 1 deletion(-) diff

[PATCH v3 0/5] hw/arm/aspeed: Check for CPU types in machine_run_board_init()

2024-01-24 Thread Philippe Mathieu-Daudé
Series fully reviewed. Since v2: - Addressed Gavin & Richard review comments. - Collected R-b tags Since v1: - Follow suggestions from Cédric from [*] [*] https://lore.kernel.org/qemu-devel/e13c655b-7904-4e47-a673-4efd13c26...@kaod.org/ Based-on: <20240123222508.13826-1-phi...@linaro.org>

[PATCH v3 3/5] hw/arm/aspeed: Init CPU defaults in a common helper

2024-01-24 Thread Philippe Mathieu-Daudé
Rework aspeed_soc_num_cpus() as a new init_cpus_defaults() helper to reduce code duplication. Reviewed-by: Cédric Le Goater Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed.c | 71 +++--

[PATCH v3 4/5] hw/arm/aspeed: Introduce aspeed_soc_cpu_type() helper

2024-01-24 Thread Philippe Mathieu-Daudé
In order to alter AspeedSoCClass::cpu_type in the next commit, introduce the aspeed_soc_cpu_type() helper to retrieve the per-SoC CPU type from AspeedSoCClass. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan ---

[PATCH v6 4/4] accel/tcg: Move perf and debuginfo support to tcg/

2024-01-24 Thread Philippe Mathieu-Daudé
From: Ilya Leoshkevich tcg/ should not depend on accel/tcg/, but perf and debuginfo support provided by the latter are being used by tcg/tcg.c. Since that's the only user, move both to tcg/. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Ilya

[PATCH v6 3/4] accel/tcg: Remove #ifdef TARGET_I386 from perf.c

2024-01-24 Thread Philippe Mathieu-Daudé
From: Ilya Leoshkevich Preparation for moving perf.c to tcg/. This affects only profiling guest code, which has code in a non-0 based segment, e.g., 16-bit code, which is not particularly important. Suggested-by: Richard Henderson Signed-off-by: Ilya Leoshkevich Reviewed-by: Alex Bennée

[PATCH v6 2/4] tcg: Make tb_cflags() usable from target-agnostic code

2024-01-24 Thread Philippe Mathieu-Daudé
From: Ilya Leoshkevich Currently tb_cflags() is defined in exec-all.h, which is not usable from target-agnostic code. Move it to translation-block.h, which is. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson Message-ID:

[PATCH v6 0/4] accel/tcg: Move perf and debuginfo support to tcg

2024-01-24 Thread Philippe Mathieu-Daudé
Since v5: - Use v4 instead of v3... - Rebased on commit 53e8868d69 ("meson: remove OS definitions from config_targetos") Ilya Leoshkevich (4): accel/tcg: Make use of qemu_target_page_mask() in perf.c tcg: Make tb_cflags() usable from target-agnostic code accel/tcg: Remove #ifdef

[PATCH v6 1/4] accel/tcg: Make use of qemu_target_page_mask() in perf.c

2024-01-24 Thread Philippe Mathieu-Daudé
From: Ilya Leoshkevich Stop using TARGET_PAGE_MASK in order to make perf.c more target-agnostic. Signed-off-by: Ilya Leoshkevich Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20231212003837.64090-2-...@linux.ibm.com> --- accel/tcg/perf.c | 3 ++- 1 file changed,

Re: [PATCH] physmem: replace function name with __func__ in ram_block_discard_range()

2024-01-24 Thread Philippe Mathieu-Daudé
Hi, On 25/1/24 03:33, Xiaoyao Li wrote: Use __func__ to avoid hard-coded function name. Signed-off-by: Xiaoyao Li Reviewed-by: David Hildenbrand --- system/physmem.c | 38 +- 1 file changed, 17 insertions(+), 21 deletions(-) if ((start +

Re: [PATCH v5 4/4] accel/tcg: Move perf and debuginfo support to tcg

2024-01-24 Thread Philippe Mathieu-Daudé
On 25/1/24 04:04, Ilya Leoshkevich wrote: On Thu, 2024-01-25 at 07:11 +1000, Richard Henderson wrote: On 1/24/24 17:56, Philippe Mathieu-Daudé wrote: From: Ilya Leoshkevich tcg/ should not depend on accel/tcg/, but perf and debuginfo support provided by the latter are being used by

Re: [PATCH v2 3/5] hw/arm/aspeed: Init CPU defaults in a common helper

2024-01-24 Thread Philippe Mathieu-Daudé
On 25/1/24 03:26, Gavin Shan wrote: Hi Phil, On 1/24/24 08:48, Philippe Mathieu-Daudé wrote: Rework aspeed_soc_num_cpus() as a new init_cpus_defaults() helper to reduce code duplication. Signed-off-by: Philippe Mathieu-Daudé ---   hw/arm/aspeed.c | 71

Re: [PATCH v2 5/6] hw/arm/vexpress: Check for CPU types in machine_run_board_init()

2024-01-24 Thread Philippe Mathieu-Daudé
On 25/1/24 00:09, Richard Henderson wrote: On 1/24/24 08:25, Philippe Mathieu-Daudé wrote: Restrict MachineClass::valid_cpu_types[] to the single valid CPU types. Signed-off-by: Philippe Mathieu-Daudé ---   hw/arm/vexpress.c | 10 ++   1 file changed, 10 insertions(+) diff --git

Re: [PATCH 0/3] target/riscv/kvm: support 'vlenb' and vregs[]

2024-01-24 Thread Alistair Francis
On Wed, Jan 24, 2024 at 2:18 AM Daniel Henrique Barboza wrote: > > Hi, > > This short series implements both 'vlenb' and 'vregs[]' in the KVM > driver. > > The patches were done a couple of months ago but we were missing some > changes in Linux (support to 'vlenb' in KVM) that got upstreamed >

Re: [PATCH 5/9] accel/tcg: Hoist CPUClass arg to functions with external linkage

2024-01-24 Thread Philippe Mathieu-Daudé
On 24/1/24 23:59, Richard Henderson wrote: On 1/24/24 20:16, Philippe Mathieu-Daudé wrote: Hoist the CPUClass argument from most of these internal helpers:   - check_for_breakpoints_slow   - check_for_breakpoints()   - cpu_tb_exec()   - cpu_exec_enter()   - cpu_exec_exit()   -

[PATCH v4 50/66] i386/tdx: handle TDG.VP.VMCALL

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata Add property "quote-generation-socket" to tdx-guest, which is a property of type SocketAddress to specify Quote Generation Service(QGS). On request of GetQuote, it connects to the QGS socket, read request data from shared guest memory, send the request data to the QGS, and

[PATCH v4 49/66] i386/tdx: handle TDG.VP.VMCALL

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata For SetupEventNotifyInterrupt, record interrupt vector and the apic id of the vcpu that received this TDVMCALL. Later it can inject interrupt with given vector to the specific vcpu that received SetupEventNotifyInterrupt. Signed-off-by: Isaku Yamahata Signed-off-by:

[PATCH v4 47/66] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu

2024-01-24 Thread Xiaoyao Li
TDX vcpu needs to be initialized by SEAMCALL(TDH.VP.INIT) and KVM provides vcpu level IOCTL KVM_TDX_INIT_VCPU for it. KVM_TDX_INIT_VCPU needs the address of the HOB as input. Invoke it for each vcpu after HOB list is created. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann ---

[PATCH v4 32/66] kvm/memory: Introduce the infrastructure to set the default shared/private value

2024-01-24 Thread Xiaoyao Li
Introduce new flag RAM_DEFAULT_PRIVATE for RAMBlock. It's used to indicate the default attribute, private or not. Set the RAM range to private explicitly when it's default private. Originated-from: Isaku Yamahata Signed-off-by: Xiaoyao Li --- accel/kvm/kvm-all.c | 10 ++

[PATCH v4 62/66] i386/tdx: Don't synchronize guest tsc for TDs

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata TSC of TDs is not accessible and KVM doesn't allow access of MSR_IA32_TSC for TDs. To avoid the assert() in kvm_get_tsc, make kvm_synchronize_all_tsc() noop for TDs, Signed-off-by: Isaku Yamahata Reviewed-by: Connor Kuehl Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann

[PATCH v4 34/66] kvm/tdx: Don't complain when converting vMMIO region to shared

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata Because vMMIO region needs to be shared region, guest TD may explicitly convert such region from private to shared. Don't complain such conversion. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- accel/kvm/kvm-all.c | 19 --- 1 file changed,

[PATCH v4 28/66] i386/tdx: Validate TD attributes

2024-01-24 Thread Xiaoyao Li
Validate TD attributes with tdx_caps that fixed-0 bits must be zero and fixed-1 bits must be set. Besides, sanity check the attribute bits that have not been supported by QEMU yet. e.g., debug bit, it will be allowed in the future when debug TD support lands in QEMU. Signed-off-by: Xiaoyao Li

[PATCH v4 35/66] kvm/tdx: Ignore memory conversion to shared of unassigned region

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata TDX requires vMMIO region to be shared. For KVM, MMIO region is the region which kvm memslot isn't assigned to (except in-kernel emulation). qemu has the memory region for vMMIO at each device level. While OVMF issues MapGPA(to-shared) conservatively on 32bit PCI MMIO

[PATCH v4 65/66] i386/tdx: Don't get/put guest state for TDX VMs

2024-01-24 Thread Xiaoyao Li
From: Sean Christopherson Don't get/put state of TDX VMs since accessing/mutating guest state of production TDs is not supported. Note, it will be allowed for a debug TD. Corresponding support will be introduced when debug TD support is implemented in the future. Signed-off-by: Sean

[PATCH v4 45/66] memory: Introduce memory_region_init_ram_guest_memfd()

2024-01-24 Thread Xiaoyao Li
Introduce memory_region_init_ram_guest_memfd() to allocate private guset memfd on the MemoryRegion initialization. It's for the use case of TDVF, which must be private on TDX case. Signed-off-by: Xiaoyao Li --- include/exec/memory.h | 6 ++ system/memory.c | 27

[PATCH v4 55/66] q35: Introduce smm_ranges property for q35-pci-host

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata Add a q35 property to check whether or not SMM ranges, e.g. SMRAM, TSEG, etc... exist for the target platform. TDX doesn't support SMM and doesn't play nice with QEMU modifying related guest memory ranges. Signed-off-by: Isaku Yamahata Co-developed-by: Sean Christopherson

[PATCH v4 10/66] *** HACK *** linux-headers: Update headers to pull in TDX API changes

2024-01-24 Thread Xiaoyao Li
Pull in recent TDX updates, which are not backwards compatible. It's just to make this series runnable. It will be updated by script scripts/update-linux-headers.sh once TDX support is upstreamed in linux kernel Signed-off-by: Xiaoyao Li --- linux-headers/asm-x86/kvm.h | 91

[PATCH v4 33/66] i386/tdx: Make memory type private by default

2024-01-24 Thread Xiaoyao Li
By default (due to the recent UPM change), restricted memory attribute is shared. Convert the memory region from shared to private at the memory slot creation time. add kvm region registering function to check the flag and convert the region, and add memory listener to TDX guest code to set the

[PATCH v4 57/66] i386/tdx: Disable PIC for TDX VMs

2024-01-24 Thread Xiaoyao Li
Legacy PIC (8259) cannot be supported for TDX VMs since TDX module doesn't allow directly interrupt injection. Using posted interrupts for the PIC is not a viable option as the guest BIOS/kernel will not do EOI for PIC IRQs, i.e. will leave the vIRR bit set. Hence disable PIC for TDX VMs and

[PATCH v4 36/66] i386/tdvf: Introduce function to parse TDVF metadata

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata TDX VM needs to boot with its specialized firmware, Trusted Domain Virtual Firmware (TDVF). QEMU needs to parse TDVF and map it in TD guest memory prior to running the TDX VM. A TDVF Metadata in TDVF image describes the structure of firmware. QEMU refers to it to setup

[PATCH v4 15/66] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES

2024-01-24 Thread Xiaoyao Li
KVM provides TDX capabilities via sub command KVM_TDX_CAPABILITIES of IOCTL(KVM_MEMORY_ENCRYPT_OP). Get the capabilities when initializing TDX context. It will be used to validate user's setting later. Since there is no interface reporting how many cpuid configs contains in KVM_TDX_CAPABILITIES,

[PATCH v4 38/66] i386/tdx: Skip BIOS shadowing setup

2024-01-24 Thread Xiaoyao Li
TDX doesn't support map different GPAs to same private memory. Thus, aliasing top 128KB of BIOS as isa-bios is not supported. On the other hand, TDX guest cannot go to real mode, it can work fine without isa-bios. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- Changes in v1: - update

[PATCH v4 56/66] i386/tdx: Disable SMM for TDX VMs

2024-01-24 Thread Xiaoyao Li
TDX doesn't support SMM and VMM cannot emulate SMM for TDX VMs because VMM cannot manipulate TDX VM's memory. Disable SMM for TDX VMs and error out if user requests to enable SMM. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 8 1 file changed, 8

[PATCH v4 29/66] i386/tdx: Support user configurable mrconfigid/mrowner/mrownerconfig

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata Three sha384 hash values, mrconfigid, mrowner and mrownerconfig, of a TD can be provided for TDX attestation. Detailed meaning of them can be found: https://lore.kernel.org/qemu-devel/31d6dbc1-f453-4cef-ab08-4813f4e0f...@intel.com/ Allow user to specify those values via

[PATCH v4 44/66] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata TDVF firmware (CODE and VARS) needs to be added/copied to TD's private memory via KVM_TDX_INIT_MEM_REGION, as well as TD HOB and TEMP memory. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- Changes in v1: - rename variable @metadata

[PATCH v4 66/66] docs: Add TDX documentation

2024-01-24 Thread Xiaoyao Li
Add docs/system/i386/tdx.rst for TDX support, and add tdx in confidential-guest-support.rst Signed-off-by: Xiaoyao Li --- Changes since v1: - Add prerequisite of private gmem; - update example command to launch TD; Changes since RFC v4: - add the restriction that kernel-irqchip must be

[PATCH v4 08/66] kvm: handle KVM_EXIT_MEMORY_FAULT

2024-01-24 Thread Xiaoyao Li
From: Chao Peng When geeting KVM_EXIT_MEMORY_FAULT exit, it indicates userspace needs to do the memory conversion on the RAMBlock to turn the memory into desired attribute, i.e., private/shared. Currently only KVM_MEMORY_EXIT_FLAG_PRIVATE in flags is valid when KVM_EXIT_MEMORY_FAULT happens.

[PATCH v4 06/66] kvm: Introduce support for memory_attributes

2024-01-24 Thread Xiaoyao Li
Introduce the helper functions to set the attributes of a range of memory to private or shared. This is necessary to notify KVM the private/shared attribute of each gpa range. KVM needs the information to decide the GPA needs to be mapped at hva-based shared memory or guest_memfd based private

[PATCH v4 42/66] headers: Add definitions from UEFI spec for volumes, resources, etc...

2024-01-24 Thread Xiaoyao Li
Add UEFI definitions for literals, enums, structs, GUIDs, etc... that will be used by TDX to build the UEFI Hand-Off Block (HOB) that is passed to the Trusted Domain Virtual Firmware (TDVF). All values come from the UEFI specification [1], PI spec [2] and TDVF design guide[3]. [1] UEFI

[PATCH v4 61/66] hw/i386: add option to forcibly report edge trigger in acpi tables

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata When level trigger isn't supported on x86 platform, forcibly report edge trigger in acpi tables. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- hw/i386/acpi-build.c | 99 ---

[PATCH v4 59/66] i386/tdx: LMCE is not supported for TDX

2024-01-24 Thread Xiaoyao Li
LMCE is not supported TDX since KVM doesn't provide emulation for MSR_IA32_FEAT_CTL. Signed-off-by: Xiaoyao Li --- target/i386/kvm/kvm-cpu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 9c791b7b0520..8c618869533c 100644 ---

[PATCH v4 14/66] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context

2024-01-24 Thread Xiaoyao Li
Introduce tdx_kvm_init() and invoke it in kvm_confidential_guest_init() if it's a TDX VM. Set ms->require_guest_memfd to require kvm guest memfd allocation for any memory backend. More TDX specific initialization will be added later. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann ---

[PATCH v4 60/66] hw/i386: add eoi_intercept_unsupported member to X86MachineState

2024-01-24 Thread Xiaoyao Li
Add a new bool member, eoi_intercept_unsupported, to X86MachineState with default value false. Set true for TDX VM. Inability to intercept eoi causes impossibility to emulate level triggered interrupt to be re-injected when level is still kept active. which affects interrupt controller emulation.

[PATCH v4 31/66] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM

2024-01-24 Thread Xiaoyao Li
TDX only supports readonly for shared memory but not for private memory. In the view of QEMU, it has no idea whether a memslot is used as shared memory of private. Thus just mark kvm_readonly_mem_enabled to false to TDX VM for simplicity. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann ---

[PATCH v4 53/66] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility

2024-01-24 Thread Xiaoyao Li
Integrate TDX's TDX_REPORT_FATAL_ERROR into QEMU GuestPanic facility Originated-from: Isaku Yamahata Signed-off-by: Xiaoyao Li --- Changes in v4: - refine the documentation; (Markus) Changes in v3: - Add docmentation of new type and struct; (Daniel) - refine the error message handling;

[PATCH v4 05/66] kvm: Enable KVM_SET_USER_MEMORY_REGION2 for memslot

2024-01-24 Thread Xiaoyao Li
From: Chao Peng Switch to KVM_SET_USER_MEMORY_REGION2 when supported by KVM. With KVM_SET_USER_MEMORY_REGION2, QEMU can set up memory region that backend'ed both by hva-based shared memory and guest memfd based private memory. Signed-off-by: Chao Peng Co-developed-by: Xiaoyao Li

[PATCH v4 39/66] i386/tdx: Don't initialize pc.rom for TDX VMs

2024-01-24 Thread Xiaoyao Li
For TDX, the address below 1MB are entirely general RAM. No need to initialize pc.rom memory region for TDs. Signed-off-by: Xiaoyao Li --- This is more as a workaround of the issue that for q35 machine type, the real memslot update (which requires memslot deletion )for pc.rom happens after

[PATCH v4 64/66] i386/tdx: Skip kvm_put_apicbase() for TDs

2024-01-24 Thread Xiaoyao Li
KVM doesn't allow wirting to MSR_IA32_APICBASE for TDs. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 128cce929ed3..109f778ba14d 100644 ---

[PATCH v4 52/66] i386/tdx: Handle TDG.VP.VMCALL

2024-01-24 Thread Xiaoyao Li
TD guest can use TDG.VP.VMCALL to request termination with error message encoded in GPRs. Parse and print the error message, and terminate the TD guest in the handler. Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 39 +++ target/i386/kvm/tdx.h | 1 +

[PATCH v4 58/66] i386/tdx: Don't allow system reset for TDX VMs

2024-01-24 Thread Xiaoyao Li
TDX CPU state is protected and thus vcpu state cann't be reset by VMM. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/kvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index e36ece874246..0ec0584d22ca

[PATCH v4 63/66] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() for TDs

2024-01-24 Thread Xiaoyao Li
For TDs, only MSR_IA32_UCODE_REV in kvm_init_msrs() can be configured by VMM, while the features enumerated/controlled by other MSRs except MSR_IA32_UCODE_REV in kvm_init_msrs() are not under control of VMM. Only configure MSR_IA32_UCODE_REV for TDs. Signed-off-by: Xiaoyao Li Acked-by: Gerd

[PATCH v4 22/66] i386/kvm: Move architectural CPUID leaf generation to separate helper

2024-01-24 Thread Xiaoyao Li
From: Sean Christopherson Move the architectural (for lack of a better term) CPUID leaf generation to a separate helper so that the generation code can be reused by TDX, which needs to generate a canonical VM-scoped configuration. Signed-off-by: Sean Christopherson Signed-off-by: Xiaoyao Li

[PATCH v4 51/66] i386/tdx: handle TDG.VP.VMCALL hypercall

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata MapGPA is a hypercall to convert GPA from/to private GPA to/from shared GPA. As the conversion function is already implemented as kvm_convert_memory, wire it to TDX hypercall exit. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- accel/kvm/kvm-all.c | 2 +-

[PATCH v4 41/66] i386/tdx: Track RAM entries for TDX VM

2024-01-24 Thread Xiaoyao Li
The RAM of TDX VM can be classified into two types: - TDX_RAM_UNACCEPTED: default type of TDX memory, which needs to be accepted by TDX guest before it can be used and will be all-zeros after being accepted. - TDX_RAM_ADDED: the RAM that is ADD'ed to TD guest before running, and can

[PATCH v4 00/66] QEMU Guest memfd + QEMU TDX support

2024-01-24 Thread Xiaoyao Li
This v4 series still carry both QEMU guest memfd support and QEMU TDX support. Because TDX is going to be the first user of guest memfd in QEMU, put them together can provide us a full picture of how they work. KVM provides guest memfd, which cannot be mapped, read, or written by userspace. It's

[PATCH v4 54/66] pci-host/q35: Move PAM initialization above SMRAM initialization

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata In mch_realize(), process PAM initialization before SMRAM initialization so that later patch can skill all the SMRAM related with a single check. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- hw/pci-host/q35.c | 19 ++- 1 file changed, 10

[PATCH v4 48/66] i386/tdx: Finalize TDX VM

2024-01-24 Thread Xiaoyao Li
Invoke KVM_TDX_FINALIZE_VM to finalize the TD's measurement and make the TD vCPUs runnable once machine initialization is complete. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/i386/kvm/tdx.c

[PATCH v4 37/66] i386/tdx: Parse TDVF metadata for TDX VM

2024-01-24 Thread Xiaoyao Li
TDX cannot support pflash device since it doesn't support read-only memslot and doesn't support emulation. Load TDVF(OVMF) with -bios option for TDs. When boot a TD, besides loading TDVF to the address below 4G, it needs parse TDVF metadata. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann

[PATCH v4 46/66] i386/tdx: register TDVF as private memory

2024-01-24 Thread Xiaoyao Li
From: Chao Peng Allocate private guest memfd memory for BIOS if it's TD VM. Signed-off-by: Chao Peng Co-developed-by: Xiaoyao Li Signed-off-by: Xiaoyao Li --- hw/i386/x86.c | 10 +- target/i386/kvm/tdx.c | 18 ++ target/i386/kvm/tdx.h | 2 ++ 3 files

[PATCH v4 43/66] i386/tdx: Setup the TD HOB list

2024-01-24 Thread Xiaoyao Li
The TD HOB list is used to pass the information from VMM to TDVF. The TD HOB must include PHIT HOB and Resource Descriptor HOB. More details can be found in TDVF specification and PI specification. Build the TD HOB in TDX's machine_init_done callback. Co-developed-by: Isaku Yamahata

[PATCH v4 17/66] i386/tdx: Adjust the supported CPUID based on TDX restrictions

2024-01-24 Thread Xiaoyao Li
According to Chapter "CPUID Virtualization" in TDX module spec, CPUID bits of TD can be classified into 6 types: 1 | As configured | configurable by VMM, independent of native value;

[PATCH v4 27/66] i386/tdx: Wire CPU features up with attributes of TD guest

2024-01-24 Thread Xiaoyao Li
For QEMU VMs, PKS is configured via CPUID_7_0_ECX_PKS and PMU is configured by x86cpu->enable_pmu. Reuse the existing configuration interface for TDX VMs. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- target/i386/kvm/tdx.c | 13 + 1 file changed, 13 insertions(+) diff

[PATCH v4 21/66] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpuid_lookup

2024-01-24 Thread Xiaoyao Li
Some bits in TD attributes have corresponding CPUID feature bits. Reflect the fixed0/1 restriction on TD attributes to their corresponding CPUID bits in tdx_cpuid_lookup[] as well. Signed-off-by: Xiaoyao Li --- Changes in v4: - reverse the meaning of tdx_caps->attr_fixed0, because value 0 of

[PATCH v4 40/66] i386/tdx: Track mem_ptr for each firmware entry of TDVF

2024-01-24 Thread Xiaoyao Li
For each TDVF sections, QEMU needs to copy the content to guest private memory via KVM API (KVM_TDX_INIT_MEM_REGION). Introduce a field @mem_ptr for TdxFirmwareEntry to track the memory pointer of each TDVF sections. So that QEMU can add/copy them to guest private memory later. TDVF sections can

[PATCH v4 26/66] i386/tdx: Make sept_ve_disable set by default

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata For TDX KVM use case, Linux guest is the most major one. It requires sept_ve_disable set. Make it default for the main use case. For other use case, it can be enabled/disabled via qemu command line. Signed-off-by: Isaku Yamahata --- target/i386/kvm/tdx.c | 2 +- 1 file

[PATCH v4 01/66] linux-headers: Update to Linux v6.8-rc1

2024-01-24 Thread Xiaoyao Li
Guest memfd support in QEMU requires corresponding KVM guest memfd APIs, which lands in Linux from v6.8-rc1. Signed-off-by: Xiaoyao Li --- include/standard-headers/drm/drm_fourcc.h | 10 +- include/standard-headers/linux/ethtool.h | 41 +++--

[PATCH v4 25/66] i386/tdx: Add property sept-ve-disable for tdx-guest object

2024-01-24 Thread Xiaoyao Li
Bit 28 of TD attribute, named SEPT_VE_DISABLE. When set to 1, it disables EPT violation conversion to #VE on guest TD access of PENDING pages. Some guest OS (e.g., Linux TD guest) may require this bit as 1. Otherwise refuse to boot. Add sept-ve-disable property for tdx-guest object, for user to

[PATCH v4 30/66] i386/tdx: Implement user specified tsc frequency

2024-01-24 Thread Xiaoyao Li
Reuse "-cpu,tsc-frequency=" to get user wanted tsc frequency and call VM scope VM_SET_TSC_KHZ to set the tsc frequency of TD before KVM_TDX_INIT_VM. Besides, sanity check the tsc frequency to be in the legal range and legal granularity (required by TDX module). Signed-off-by: Xiaoyao Li

[PATCH v4 03/66] HostMem: Add mechanism to opt in kvm guest memfd via MachineState

2024-01-24 Thread Xiaoyao Li
Add a new member "guest_memfd" to memory backends. When it's set to true, it enables RAM_GUEST_MEMFD in ram_flags, thus private kvm guest_memfd will be allocated during RAMBlock allocation. Memory backend's @guest_memfd is wired with @require_guest_memfd field of MachineState. It avoid looking up

[PATCH v4 24/66] i386/tdx: Initialize TDX before creating TD vcpus

2024-01-24 Thread Xiaoyao Li
Invoke KVM_TDX_INIT in kvm_arch_pre_create_vcpu() that KVM_TDX_INIT configures global TD configurations, e.g. the canonical CPUID config, and must be executed prior to creating vCPUs. Use kvm_x86_arch_cpuid() to setup the CPUID settings for TDX VM. Note, this doesn't address the fact that QEMU

[PATCH v4 12/66] target/i386: Implement mc->kvm_type() to get VM type

2024-01-24 Thread Xiaoyao Li
TDX VM requires VM type KVM_X86_TDX_VM to be passed to kvm_ioctl(KVM_CREATE_VM). Hence implement mc->kvm_type() for i386 architecture. If tdx-guest object is specified to confidential-guest-support, like, qemu -machine ...,confidential-guest-support=tdx0 \ -object tdx-guest,id=tdx0,...

Re: [PATCH 3/3] target/riscv/kvm: get/set vector vregs[]

2024-01-24 Thread Alistair Francis
On Wed, Jan 24, 2024 at 2:18 AM Daniel Henrique Barboza wrote: > > vregs[] have variable size that depends on the current vlenb set by the > host, meaning we can't use our regular kvm_riscv_reg_id() to retrieve > it. > > Create a generic kvm_encode_reg_size_id() helper to encode any given > size

[PATCH v4 13/66] target/i386: Introduce kvm_confidential_guest_init()

2024-01-24 Thread Xiaoyao Li
Introduce a separate function kvm_confidential_guest_init(), which dispatches specific confidential guest initialization function by ms->cgs type. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daudé --- target/i386/kvm/kvm.c | 11 ++-

[PATCH v4 07/66] physmem: Introduce ram_block_discard_guest_memfd_range()

2024-01-24 Thread Xiaoyao Li
When memory page is converted from private to shared, the original private memory is back'ed by guest_memfd. Introduce ram_block_discard_guest_memfd_range() for discarding memory in guest_memfd. Originally-from: Isaku Yamahata Codeveloped-by: Xiaoyao Li Signed-off-by: Xiaoyao Li --- Changes in

[PATCH v4 23/66] kvm: Introduce kvm_arch_pre_create_vcpu()

2024-01-24 Thread Xiaoyao Li
Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent work prior to create any vcpu. This is for i386 TDX because it needs call TDX_INIT_VM before creating any vcpu. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann --- Changes in v3: - pass @errp to kvm_arch_pre_create_vcpu(); (Per

[PATCH v4 16/66] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object

2024-01-24 Thread Xiaoyao Li
It will need special handling for TDX VMs all around the QEMU. Introduce is_tdx_vm() helper to query if it's a TDX VM. Cache tdx_guest object thus no need to cast from ms->cgs every time. Signed-off-by: Xiaoyao Li Acked-by: Gerd Hoffmann Reviewed-by: Isaku Yamahata --- changes in v3: -

[PATCH v4 18/66] i386/tdx: Make Intel-PT unsupported for TD guest

2024-01-24 Thread Xiaoyao Li
Due to the fact that Intel-PT virtualization support has been broken in QEMU since Sapphire Rapids generation[1], below warning is triggered when luanching TD guest: warning: host doesn't support requested feature: CPUID.07H:EBX.intel-pt [bit 25] Before Intel-pt is fixed in QEMU, just make

[PATCH v4 02/66] RAMBlock: Add support of KVM private guest memfd

2024-01-24 Thread Xiaoyao Li
Add KVM guest_memfd support to RAMBlock so both normal hva based memory and kvm guest memfd based private memory can be associated in one RAMBlock. Introduce new flag RAM_GUEST_MEMFD. When it's set, it calls KVM ioctl to create private guest_memfd during RAMBlock setup. Allocating a new

[PATCH v4 09/66] trace/kvm: Add trace for page convertion between shared and private

2024-01-24 Thread Xiaoyao Li
From: Isaku Yamahata Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- accel/kvm/kvm-all.c| 2 ++ accel/kvm/trace-events | 1 + 2 files changed, 3 insertions(+) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 2421b8a5b314..def2b46b9de2 100644 ---

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