Re: [PATCH] Fix typo in comment (uin32_t -> uint32_t)

On Fri, Mar 01, 2024 at 06:55:35PM +, Frediano Ziglio wrote: > Date: Fri, 1 Mar 2024 18:55:35 + > From: Frediano Ziglio > Subject: [PATCH] Fix typo in comment (uin32_t -> uint32_t) > > Signed-off-by: Frediano Ziglio > --- > hw/vfio/pci.h | 2 +- > 1 file changed, 1 insertion(+), 1

Re: [PULL 26/29] contrib/plugins: extend execlog to track register changes

On Fri, Mar 01, 2024 at 04:30:51PM +, Alex Bennée wrote: > Date: Fri, 01 Mar 2024 16:30:51 + > From: Alex Bennée > Subject: Re: [PULL 26/29] contrib/plugins: extend execlog to track register > changes > > Zhao Liu writes: > > > On Fri, Mar 01, 2024 at 10:22:08AM +, Alex Bennée

[PATCH 40/41] target/sparc: Implement monitor asis

Ignore the "monitor" portion and treat them the same as their base asis. Signed-off-by: Richard Henderson --- target/sparc/asi.h | 4 target/sparc/ldst_helper.c | 4 target/sparc/translate.c | 8 3 files changed, 16 insertions(+) diff --git a/target/sparc/asi.h

[PATCH 41/41] target/sparc: Enable VIS4 feature bit

Signed-off-by: Richard Henderson --- target/sparc/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 18dfd90845..1ffac3dd8a 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -554,6 +554,7 @@ static const char * const

[PATCH 38/41] target/sparc: Implement SUBXC, SUBXCcc

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 14 ++ target/sparc/insns.decode | 2 ++ 2 files changed, 16 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 8eda190233..4775e39240 100644 --- a/target/sparc/translate.c +++

[PATCH 35/41] target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 11 +++ target/sparc/insns.decode | 9 + 2 files changed, 20 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 8e67d9023d..cb5d8c27ae 100644 --- a/target/sparc/translate.c +++

[PATCH 31/41] target/sparc: Enable VIS3 feature bit

Signed-off-by: Richard Henderson --- linux-user/elfload.c | 1 + target/sparc/cpu.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 5ebf2bf789..89ce0f3167 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -998,6 +998,7 @@

[PATCH 32/41] target/sparc: Implement IMA extension

Signed-off-by: Richard Henderson --- linux-user/elfload.c | 1 + target/sparc/cpu.c | 3 +++ target/sparc/translate.c | 24 target/sparc/cpu-feature.h.inc | 1 + target/sparc/insns.decode | 3 +++ 5 files changed, 32 insertions(+)

[PATCH 11/41] target/sparc: Use gvec for VIS1 parallel add/sub

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 981d9d9101..ee3da73551 100644 --- a/target/sparc/translate.c +++

[PATCH 29/41] target/sparc: Implement UMULXHI

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 8 target/sparc/insns.decode | 1 + 2 files changed, 9 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 8241676174..2d697d2020 100644 --- a/target/sparc/translate.c +++

[PATCH 24/41] target/sparc: Implement FSLL, FSRL, FSRA, FSLAS

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 ++ target/sparc/translate.c | 11 +++ target/sparc/vis_helper.c | 36 target/sparc/insns.decode | 9 + 4 files changed, 58 insertions(+) diff --git a/target/sparc/helper.h

[PATCH 23/41] target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 4 target/sparc/translate.c | 9 + target/sparc/vis_helper.c | 40 +++ target/sparc/insns.decode | 5 + 4 files changed, 58 insertions(+) diff --git a/target/sparc/helper.h

[PATCH 03/41] target/sparc: Fix FMUL8x16

This instruction has f32 as source1, which alters the decoding of the register number, which means we've been passing the wrong data for odd register numbers. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 +- target/sparc/translate.c | 21 -

[PATCH 37/41] target/sparc: Implement FPMIN, FPMAX

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 14 ++ target/sparc/insns.decode | 14 ++ 2 files changed, 28 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 5f1982cecc..8eda190233 100644 ---

[PATCH 12/41] target/sparc: Implement FMAf extension

Rearrange PDIST so that do_ is general purpose and may be re-used for FMADDd etc. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 + linux-user/elfload.c | 1 + target/sparc/cpu.c | 3 ++ target/sparc/fop_helper.c | 16 +++

[PATCH 10/41] target/sparc: Remove cpu_fpr[]

Use explicit loads and stores to env instead. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 158 +-- 1 file changed, 84 insertions(+), 74 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index

[PATCH 26/41] target/sparc: Implement LZCNT

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 18 ++ target/sparc/insns.decode | 1 + 2 files changed, 19 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index c26fd04598..761ae204b9 100644 --- a/target/sparc/translate.c +++

[PATCH 27/41] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 36 target/sparc/insns.decode | 6 ++ 2 files changed, 42 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 761ae204b9..70d87a68cc 100644 ---

[PATCH 34/41] target/sparc: Implement FALIGNDATAi

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 33 ++--- target/sparc/insns.decode | 1 + 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 77b53cbf3b..8e67d9023d 100644 ---

[PATCH 15/41] target/sparc: Implement CMASK instructions

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 3 +++ target/sparc/translate.c | 13 + target/sparc/vis_helper.c | 38 ++ target/sparc/insns.decode | 4 4 files changed, 58 insertions(+) diff --git a/target/sparc/helper.h

[PATCH 39/41] target/sparc: Implement MWAIT

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 11 +++ target/sparc/insns.decode | 1 + 2 files changed, 12 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 4775e39240..5694420a93 100644 --- a/target/sparc/translate.c +++

[PATCH 22/41] target/sparc: Implement FPADDS, FPSUBS

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 82 +++ target/sparc/insns.decode | 9 + 2 files changed, 91 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 9af30d8fa7..0dc02a3d6e 100644 ---

[PATCH 01/41] linux-user/sparc: Add more hwcap bits for sparc64

Supply HWCAP_SPARC_V8PLUS, HWCAP_SPARC_MUL32, HWCAP_SPARC_DIV32, HWCAP_SPARC_POPC, HWCAP_SPARC_FSMULD, HWCAP_SPARC_VIS, HWCAP_SPARC_VIS2. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 48 +++- 1 file changed, 34 insertions(+), 14

[PATCH 20/41] target/sparc: Implement FMEAN16

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 1 + target/sparc/translate.c | 30 ++ target/sparc/vis_helper.c | 21 + target/sparc/insns.decode | 1 + 4 files changed, 53 insertions(+) diff --git a/target/sparc/helper.h

[PATCH 21/41] target/sparc: Implement FPADD64 FPSUB64

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 3 +++ target/sparc/insns.decode | 2 ++ 2 files changed, 5 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 4876d46ebb..9af30d8fa7 100644 --- a/target/sparc/translate.c +++

[PATCH 04/41] target/sparc: Fix FMUL8x16A{U,L}

These instructions have f32 inputs, which changes the decode of the register numbers. While we're fixing things, use a common helper for both insns, extracting the 16-bit scalar in tcg beforehand. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 3 +-- target/sparc/translate.c

[PATCH 02/41] target/sparc: Fix FEXPAND

This is a 2-operand instruction, not 3-operand. Worse, we took the source from the wrong operand. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 +- target/sparc/translate.c | 20 +++- target/sparc/vis_helper.c | 6 +++--- target/sparc/insns.decode | 2 +-

[PATCH 00/41] target/sparc: Implement VIS4

I whipped this up over the Christmas break, but I'm just now getting around to posting. I have not attempted to model the newer cpus that have these features, but it is possible to enable the features manually via -cpu properties. Possibly the first 6 or 7 patches should be taken sooner than

[PATCH 09/41] target/sparc: Remove gen_dest_fpr_D

Replace with tcg_temp_new_i64. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 27 +++ 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 97a5c636d2..ddceb25b08 100644 ---

[PATCH 06/41] target/sparc: Fix FPMERGE

This instruction has f32 inputs, which changes the decode of the register numbers. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 +- target/sparc/translate.c | 2 +- target/sparc/vis_helper.c | 27 ++- 3 files changed, 16 insertions(+), 15

[PATCH 07/41] target/sparc: Split out do_ms16b

The unit operation for fmul8x16 and friends is described in the manual as "MS16b". Split that out for clarity. Improve rounding with an unconditional addition of 0.5 as a fixed-point integer. Signed-off-by: Richard Henderson --- target/sparc/vis_helper.c | 76

[PATCH 08/41] target/sparc: Perform DFPREG/QFPREG in decodetree

Form the proper register decoding from the start. Because we're removing the translation from the inner-most gen_load_fpr_* and gen_store_fpr_* routines, this must be done for all insns at once. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 18 ++--

[PATCH 19/41] target/sparc: Implement FLCMP

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 ++ target/sparc/fop_helper.c | 46 +++ target/sparc/translate.c | 34 + target/sparc/insns.decode | 4 4 files changed, 86 insertions(+) diff --git

[PATCH 30/41] target/sparc: Implement XMULX

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 ++ target/sparc/translate.c | 4 target/sparc/vis_helper.c | 11 +++ target/sparc/insns.decode | 2 ++ 4 files changed, 19 insertions(+) diff --git a/target/sparc/helper.h b/target/sparc/helper.h index

[PATCH 28/41] target/sparc: Implement PDISTN

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 11 +++ target/sparc/insns.decode | 1 + 2 files changed, 12 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 70d87a68cc..8241676174 100644 --- a/target/sparc/translate.c +++

[PATCH 25/41] target/sparc: Implement LDXEFSR

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 1 + target/sparc/fop_helper.c | 6 ++ target/sparc/translate.c | 11 +-- target/sparc/insns.decode | 1 + 4 files changed, 17 insertions(+), 2 deletions(-) diff --git a/target/sparc/helper.h

[PATCH 17/41] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 70 +++ target/sparc/insns.decode | 8 + 2 files changed, 78 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index d6adbf9236..877847b884 100644 ---

[PATCH 05/41] target/sparc: Fix FMULD8*X16

Not only do these instructions have f32 inputs, they also do not perform rounding. Since these are relatively simple, implement them properly inline. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 2 -- target/sparc/translate.c | 48 +++

[PATCH 36/41] target/sparc: Implement VIS4 comparisons

VIS4 completes the set, adding missing signed 8-bit ops and missing unsigned 16 and 32-bit ops. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 12 +-- target/sparc/translate.c | 12 +++ target/sparc/vis_helper.c | 170 +-

[PATCH 16/41] target/sparc: Implement FCHKSM16

Signed-off-by: Richard Henderson --- target/sparc/helper.h | 1 + target/sparc/translate.c | 32 target/sparc/vis_helper.c | 23 +++ target/sparc/insns.decode | 1 + 4 files changed, 57 insertions(+) diff --git a/target/sparc/helper.h

[PATCH 33/41] target/sparc: Add feature bit for VIS4

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 2 ++ target/sparc/cpu-feature.h.inc | 1 + 2 files changed, 3 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 56ee3927af..77b53cbf3b 100644 --- a/target/sparc/translate.c +++

[PATCH 18/41] target/sparc: Implement FNMUL

Unlike FNADD, we cannot (ab)use muladd for this operation because -0.0 * +0.0 == -0.0 -0.0 + +0.0 == +0.0 the addition step will lose the -0.0 product result before negation. Signed-off-by: Richard Henderson --- target/sparc/helper.h | 3 +++ target/sparc/fop_helper.c | 36

[PATCH 13/41] target/sparc: Add feature bits for VIS 3

The manual separates VIS 3 and VIS 3B, even though they are both present in all extant cpus. For clarity, let the translator match the manual but otherwise leave them on the same feature bit. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 4

[PATCH 14/41] target/sparc: Implement ADDXC, ADDXCcc

Signed-off-by: Richard Henderson --- target/sparc/translate.c | 14 ++ target/sparc/insns.decode | 3 +++ 2 files changed, 17 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 0ebb9c3aa9..0b6d92d0a8 100644 --- a/target/sparc/translate.c +++

[PATCH 46/60] *-user: Deprecate and disable -p pagesize

This option controls the host page size. From the mis-usage in our own testsuite, this is easily confused with guest page size. The only thing that occurs when changing the host page size is that stuff breaks, because one cannot actually change the host page size. Therefore reject all but the

Re: [PATCH] hw/misc: zynq_slcr: set SLC_RST bit in REBOOT_STATUS register

On Fri, Mar 1, 2024 at 10:40 AM Peter Maydell wrote: > On Wed, 28 Feb 2024 at 01:40, Gregory Anders wrote: > > > > When the CPU is reset using PSS_RST_CTRL in the SLCR, bit 19 in > > REBOOT_STATUS should be set. > > > Refer to page 1602 of the Xilinx Zynq 7000 Technical Reference Manual. > > >

[PATCH 2/3] linux-user: Implement PR_{GET,SET}_SPECULATION_CTRL

Both of these only pass and return integral values. Signed-off-by: Richard Henderson --- linux-user/syscall.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 263b651cc5..efa200878f 100644 --- a/linux-user/syscall.c +++

[PATCH 43/60] linux-user: Split out mmap_h_gt_g

Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-24-richard.hender...@linaro.org> --- linux-user/mmap.c | 288 ++ 1 file changed, 139 insertions(+), 149 deletions(-) diff --git

[PATCH 56/60] linux-user/x86_64: Handle the vsyscall page in open_self_maps_{2, 4}

This is the only case in which we expect to have no host memory backing for a guest memory page, because in general linux user processes cannot map any pages in the top half of the 64-bit address space. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2170 Reviewed-by: Philippe

[PATCH 58/60] linux-user: Add strace for shmat

Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/strace.c| 24 linux-user/strace.list | 2 +- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/linux-user/strace.c b/linux-user/strace.c index cf26e55264..8d13e55a5b

[PATCH 49/60] linux-user: Allow TARGET_PAGE_BITS_VARY

If set, match the host and guest page sizes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Acked-by: Helge Deller Message-Id: <20240102015808.132373-30-richard.hender...@linaro.org> --- linux-user/main.c | 16 +--- 1 file changed, 13 insertions(+), 3

[PATCH 44/60] tests/tcg: Remove run-test-mmap-*

These tests are confused, because -p does not change the guest page size, but the host page size. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-25-richard.hender...@linaro.org> ---

Re: [PULL v2 1/1] loongarch: Change the UEFI loading mode to loongarch

Hi Philippe: On 29/2/24 12:38, Song Gao wrote: From: Xianglai Li The UEFI loading mode in loongarch is very different from that in other architectures:loongarch's UEFI code is in rom, while other architectures' UEFI code is in flash. loongarch UEFI can be loaded as follows: -machine

[PATCH 0/3] linux-user: Implement some prctls

Once upon a time I marked these TODO, which apparently meant that I inherited them. :-) r~ Richard Henderson (3): linux-user: Implement PR_{GET,SET}_CHILD_SUBREAPER linux-user: Implement PR_{GET,SET}_SPECULATION_CTRL linux-user: Implement PR_GET_TID_ADDRESS linux-user/syscall.c | 22

[PATCH 1/3] linux-user: Implement PR_{GET,SET}_CHILD_SUBREAPER

The "set" prctl passes through integral values. The "get" prctl returns the value into a pointer. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1929 Signed-off-by: Richard Henderson --- linux-user/syscall.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git

Re: [PATCH] linux-user: Add FIFREEZE and FITHAW ioctls

On 2/20/24 00:57, Michael Vogt wrote: Add missing FIFREEZE and FITHAW ioctls. Signed-off-by: Michael Vogt --- linux-user/ioctls.h | 6 ++ linux-user/syscall_defs.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index

[PATCH 3/3] linux-user: Implement PR_GET_TID_ADDRESS

Signed-off-by: Richard Henderson --- linux-user/syscall.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index efa200878f..a50a18b008 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -6468,8 +6468,10 @@ static

[PATCH 52/60] target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only

Since ppc binaries are generally built for multiple page sizes, it is trivial to allow the page size to vary. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PULL 00/60] linux-user and tcg patch queue

at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240301 for you to fetch changes up to 04dadd22aed00e5a2955ab078d7edd676812cf41: tests/tcg: Check that shmat() does not break /proc/self/maps (2024-03-01 08:09:55 -1000) linux

[PATCH 54/60] linux-user: Remove pgb_dynamic alignment assertion

The assertion was never correct, because the alignment is a composite of the image alignment and SHMLBA. Even if the image alignment didn't match the image address, an assertion would not be correct -- more appropriate would be an error message about an ill formed image. But the image cannot be

[PATCH 50/60] target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only

Since aarch64 binaries are generally built for multiple page sizes, it is trivial to allow the page size to vary. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-31-richard.hender...@linaro.org> ---

[PATCH 51/60] linux-user: Bound mmap_min_addr by host page size

Bizzarely, it is possible to set /proc/sys/vm/mmap_min_addr to a value below the host page size. Fix that. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PATCH 53/60] target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only

Since alpha binaries are generally built for multiple page sizes, it is trivial to allow the page size to vary. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PATCH 18/60] accel/tcg: Remove qemu_host_page_size from page_protect/page_unprotect

Use qemu_real_host_page_size instead. Except for the final mprotect within page_protect, we already handled host < target page size. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PATCH 55/60] tcg/optimize: fix uninitialized variable

From: Paolo Bonzini The variables uext_opc and sext_opc are used without initialization if TCG_TARGET_extract_i{32,64}_valid returns false. The result, depending on the compiler, might be the generation of extract and sextract opcodes with invalid offset and count, or just random data in the

[PATCH 57/60] linux-user/loongarch64: Remove TARGET_FORCE_SHMLBA

The kernel abi was changed with commit d23b77953f5a4fbf94c05157b186aac2a247ae32 Author: Huacai Chen Date: Wed Jan 17 12:43:08 2024 +0800 LoongArch: Change SHMLBA from SZ_64K to PAGE_SIZE during the v6.8 cycle. Reviewed-by: Song Gao Signed-off-by: Richard Henderson ---

[PATCH 47/60] cpu: Remove page_size_init

Move qemu_host_page_{size,mask} and HOST_PAGE_ALIGN into bsd-user. It should be removed from bsd-user as well, but defer that cleanup. Reviewed-by: Warner Losh Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Tested-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PATCH 31/60] softmmu/physmem: Remove qemu_host_page_size

Use qemu_real_host_page_size() instead. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-14-richard.hender...@linaro.org> --- system/physmem.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 10/60] linux-user/elfload: Write corefile elf header in one block

Fixes a bug in which write_note() wrote namesz_rounded and datasz_rounded bytes, even though name and data pointers contain only the unrounded number of bytes. Instead of many small writes, allocate a block to contain all of the elf headers and all of the notes. Copy the data into the block

[PATCH 36/60] linux-user: Fix sub-host-page mmap

We cannot skip over the_end1 to the_end, because we fail to record the validity of the guest page with the interval tree. Remove "the_end" and rename "the_end1" to "the_end". Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller

[PATCH 37/60] linux-user: Split out mmap_end

Use a subroutine instead of a goto within target_mmap__locked. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-20-richard.hender...@linaro.org> --- linux-user/mmap.c | 71

[PATCH 40/60] linux-user: Use do_munmap for target_mmap failure

For the cases for which the host mmap succeeds, but does not yield the desired address, use do_munmap to restore the reserved_va memory reservation. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/mmap.c | 6 +++--- 1 file changed, 3 insertions(+), 3

[PATCH 34/60] linux-user: Split out target_mmap__locked

All "goto fail" may be transformed to "return -1". Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-17-richard.hender...@linaro.org> ---

[PATCH 48/60] accel/tcg: Disconnect TargetPageDataNode from page size

Dynamically size the node for the runtime target page size. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-29-richard.hender...@linaro.org> --- accel/tcg/user-exec.c | 13

[PATCH 41/60] linux-user: Split out mmap_h_eq_g

Move the MAX_FIXED_NOREPLACE check for reserved_va earlier. Move the computation of host_prot earlier. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-22-richard.hender...@linaro.org> --- linux-user/mmap.c | 68

[PATCH 45/60] tests/tcg: Extend file in linux-madvise.c

When guest page size > host page size, this test can fail due to the SIGBUS protection hack. Avoid this by making sure that the file size is at least one guest page. Visible with alpha guest on x86_64 host. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Reviewed-by: Ilya

[PATCH 59/60] linux-user: Rewrite target_shmat

Handle combined host and guest alignment requirements. Handle host and guest page size differences. Handle SHM_EXEC. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/115 Tested-by: Richard Purdie Signed-off-by: Richard Henderson --- linux-user/mmap.c | 172

[PATCH 08/60] linux-user/elfload: Lock cpu list and mmap during elf_core_dump

Do not allow changes to the set of cpus and memory regions while we are dumping core. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/elfload.c | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/linux-user/elfload.c

[PATCH 21/60] linux-user: Remove qemu_host_page_size from create_elf_tables

AT_PAGESZ is supposed to advertise the guest page size. The random adjustment made here using qemu_host_page_size does not match anything else within linux-user. The idea here is good, but should be done more systemically via adjustment to TARGET_PAGE_SIZE. Signed-off-by: Richard Henderson

[PATCH 30/60] hw/tpm: Remove HOST_PAGE_ALIGN from tpm_ppi_init

This removes a hidden use of qemu_host_page_size, hoisting two uses of qemu_real_host_page_size to a local variable. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller --- hw/tpm/tpm_ppi.c | 6 -- 1 file changed, 4

[PATCH 13/60] linux-user/elfload: Rely on walk_memory_regions for vmas

Rather than creating new data structures for vma, rely on the IntervalTree used by walk_memory_regions. Use PAGE_* constants, per the page table api, rather than PROT_* constants, per the mmap api. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 213

[PATCH 20/60] linux-user: Remove qemu_host_page_{size, mask} in probe_guest_base

The host SHMLBA is by definition a multiple of the host page size. Thus the remaining component of qemu_host_page_size is the target page size. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id:

[PATCH 28/60] linux-user: Remove HOST_PAGE_ALIGN from mmap.c

This removes a hidden use of qemu_host_page_size, using instead the existing host_page_size local within each function. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PATCH 38/60] linux-user: Do early mmap placement only for reserved_va

For reserved_va, place all non-fixed maps then proceed as for MAP_FIXED. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-21-richard.hender...@linaro.org> --- linux-user/mmap.c | 12

[PATCH 22/60] linux-user/hppa: Simplify init_guest_commpage

If reserved_va, then we have already reserved the entire guest virtual address space; no need to remap page. If !reserved_va, then use MAP_FIXED_NOREPLACE. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id:

[PATCH 23/60] linux-user/nios2: Remove qemu_host_page_size from init_guest_commpage

Use qemu_real_host_page_size. If !reserved_va, use MAP_FIXED_NOREPLACE. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-7-richard.hender...@linaro.org> --- linux-user/elfload.c | 14 +- 1 file changed, 9

[PATCH 06/60] linux-user/elfload: Open core file after vma_init

Swap the ordering of vma_init and open. This will be necessary for further changes, and adjusts the error cleanup path. Narrow the scope of corefile, as the variable can be freed immediately after use in open(). Signed-off-by: Richard Henderson --- linux-user/elfload.c | 16 +---

[PATCH 26/60] linux-user: Remove qemu_host_page_{size, mask} from mmap.c

Use qemu_real_host_page_size instead. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-9-richard.hender...@linaro.org> --- linux-user/mmap.c | 66

[PATCH 42/60] linux-user: Split out mmap_h_lt_g

Work much harder to get alignment and mapping beyond the end of the file correct. Both of which are excercised by our test-mmap for alpha (8k pages) on any 4k page host. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id:

[PATCH 32/60] softmmu/physmem: Remove HOST_PAGE_ALIGN

Align allocation sizes to the maximum of host and target page sizes. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-15-richard.hender...@linaro.org> --- system/physmem.c | 15

[PATCH 04/60] linux-user/elfload: Stack allocate struct mm_struct

Ignoring the fact that g_malloc cannot fail, the structure is quite small and might as well be allocated locally. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 28 +--- 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/linux-user/elfload.c

[PATCH 60/60] tests/tcg: Check that shmat() does not break /proc/self/maps

From: Ilya Leoshkevich Add a regression test for a recently fixed issue, where shmat() desynced the guest and the host view of the address space and caused open("/proc/self/maps") to SEGV. Signed-off-by: Ilya Leoshkevich Message-Id: Signed-off-by: Richard Henderson ---

[PATCH 33/60] linux-user: Remove qemu_host_page_size from main

Use qemu_real_host_page_size() instead. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Acked-by: Helge Deller Message-Id: <20240102015808.132373-16-richard.hender...@linaro.org> --- linux-user/main.c | 10 ++ 1 file changed, 6

[PATCH 11/60] linux-user/elfload: Write process memory to core file in larger chunks

We do not need to copy pages from guest memory before writing them out. Because vmas are contiguous in host memory, we can write them in one go. Signed-off-by: Richard Henderson --- linux-user/elfload.c | 27 --- 1 file changed, 4 insertions(+), 23 deletions(-) diff

[PATCH 00/60] linux-user and tcg patch queue

The following changes since commit c0c6a0e3528b88aaad0b9d333e295707a195587b: Merge tag 'migration-next-pull-request' of https://gitlab.com/peterx/qemu into staging (2024-02-28 17:27:10 +) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20240301

[PATCH 24/60] linux-user/arm: Remove qemu_host_page_size from init_guest_commpage

Use qemu_real_host_page_size. If the commpage is not within reserved_va, use MAP_FIXED_NOREPLACE. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-8-richard.hender...@linaro.org> --- linux-user/elfload.c | 13

[PATCH 19/60] linux-user: Adjust SVr4 NULL page mapping

Use TARGET_PAGE_SIZE and MAP_FIXED_NOREPLACE. We really should be attending to this earlier during probe_guest_base, as well as better detection and emulation of various Linux personalities. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Reviewed-by: Pierrick Bouvier Acked-by:

[PATCH 02/60] linux-user/elfload: Merge init_note_info and fill_note_info

Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/elfload.c | 15 +++ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/linux-user/elfload.c b/linux-user/elfload.c index fb47fe39c9..7b3a2c20f2 100644 --- a/linux-user/elfload.c +++

[PATCH 17/60] tcg: Avoid double lock if page tables happen to be in mmio memory.

From: Jonathan Cameron On i386, after fixing the page walking code to work with pages in MMIO memory (specifically CXL emulated interleaved memory), a crash was seen in an interrupt handling path. Useful part of backtrace 7 0x55ab1929 in bql_lock_impl (file=0x56049122

[PATCH 29/60] migration: Remove qemu_host_page_size

Replace with the maximum of the real host page size and the target page size. This is an exact replacement. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-12-richard.hender...@linaro.org>

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