QEMUs at the same
time. QEMUs communicates to each other by using a underlying thin layer
provided by COREMU. I think this approach is much clean than trying to
parallelize QEMU itself.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica
As phys_ram_size had been removed since QEMU 0.12. Remove the useless
comment.
Signed-off-by: Chen Wen-Ren che...@iis.sinica.edu.tw
---
exec.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/exec.c b/exec.c
index d0cbf15..fb21e76 100644
--- a/exec.c
+++ b/exec.c
@@
on the
Intel or AMD x86 chip and kernel enter/exit on 2.6.x linux. Any paper or
presentation on it would be great.
Try KVM mailing list instead?
http://www.linux-kvm.org/page/Lists,_IRC
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia
the spam.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
.
You want to use QEMU to emulate guest ISA different from the host?
If the ISA of guest and host is the same, then KVM is enough, I think.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
guest isa is different from host isa in this case.
Xin
On Fri, Oct 7, 2011 at 12:33 PM, 陳韋任 che...@iis.sinica.edu.tw wrote:
I am wondering that whether there are any attempts (product-oriented or
research-based ) to push QEMU into the Linux kernel to speed up emulation
^^
Is it right?
Should be http://lists.nongnu.org/mailman/listinfo/qemu-discuss
, I think. :-)
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Hi, Ottavio
Would you like to put http://tech.groups.yahoo.com/group/qemu-users/
on http://wiki.qemu.org/MailingLists ?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
. Maybe it's
also not needed anymore since I/O thread was enabled.
- gdb_do_syscall: Don't know when it get called.
- vm_stop - cpu_stop_current: Don't know when it get called.
grep -r is your friend.
I'll dig into it. Thanks. :)
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer
glad that my -save-temps suggestion helps other ;)
Indeed. Thanks again, Mulyadi.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
is,
tb_find_slow - get_page_addr_code - ldub_code - __ldb_cmmu
I can only guest the b in __ldb_cmmu means load byte, but I can't
figure out what's the difference between _cmmu and _mmu. Could you
give me some hint? Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute
needs __{ld,st}* helpers for qemu_{ld,st}* TLB miss case, these
are generated by softmmu_template.h. I'll soon apply a patch which
adds comments to the files.
Thanks. I am very appreciate it. :-)
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science
between _cmmu and _mmu. Could you
give me some hint? Thanks!
_cmmu is used to access code, _mmu is for data.
I see. Thanks, and I find building QEMU with --extra-cflags=-save-temps
is really help. Those *.i files make things much clear.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab
) TARGET_PAGE_MASK)) {
I guess this is because it'll be too complicated to track all links
jump to this (guest) page. A guest page might contains hundreds of TBs.
If the guest page is gone, then it's not a easy thing to do unlinking.
Does this make sense?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems
Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
execute tb2, it might have wrong memory access through
the mapping of guest page. Am I right?
If we execute tb2, it's not what guest would expect us to do at least.
At least it should trigger a (guest) page fault.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute
such constraint, I have to run something
big to make QEMU crash?
Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
., C code). I
am wondering when/where the tlb_fill is called from generated code (code
cache) or from helper.c.
Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
-error_code);
}
Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
idea.
HTH.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
I am new to QEMU. I saw most devices in QEMU has a timer associated with it.
^^
For example?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan
In rtl8139.c There is a
/* PCI interrupt timer */
QEMUTimer *timer;
QEMUTimer is a virtual timer (might use various virtual clocks) used by
hw or something else. In thise case, when the timer is time out, rtl8139
will generate a interrupt.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任
you please explain
what inline caching is?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
)
and tb2 (struct TranslationBlock) to reflect the fact that tb1 (in the
code cache) is linked to tb2 (in the code cache). jmp_next and jmp_first
are fields of struct TranslationBlock, we use them when we need to
unchian TBs (in the code cache).
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems
As phys_ram_size had been removed since QEMU 0.12. Remove the useless
comment.
Signed-off-by: Chen Wen-Ren che...@iis.sinica.edu.tw
---
exec.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/exec.c b/exec.c
index c1e045d..9192579 100644
--- a/exec.c
+++ b/exec.c
@@
table */
env-tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
Otherwise, it goes to lable not_found:
not_found:
/* if no translated code available, then translate it now */
tb = tb_gen_code(env, pc, cs_base, flags, 0);
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab
wrong.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
that while QEMU generate host binary from TCG IR, it will
leave some space for further block chaining to do the patch.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
to those TBs
next to this one.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
be tb2, and tb2-jmp_first should be tb1. So the comment
list of TBs jumping to this one looks weird to me.
Do I misunderstand how the block chaining is done?
Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel
ops translation.
If your PTX means CUDA PTX, I think QEMU doesn't support such target
currently.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
I can't understand CPUState's iotlb field , Why we need iotlb ?
I guess he want to know why there are tlb and iotlb in the CPUState,
not just one.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788
overview on how QEMU manages
the guest machine's memory, I'll be very appreciate that. Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
-kouwe.pdf
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
likely
broken, for instance.) If you look in MAINTAINERS you'll see
Just to be curious. *If* QEMU support multithreaded user
program, would the different memory (coherence/consistency)
model between guest and host architecture become a problem?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer
someone kindly explain why there are constraints on block
linking? Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
is that it mostly works but if you
You mean some QEMU data structures need to be thread-local or lock
protected in order to emulate guest multi-threaded program correctly?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel
!
Regards,
chenwj
[1] http://patchwork.ozlabs.org/patch/31746/
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
}
-
Have I already considered all kind of situations? Or something else
I need to do to make IBTC work in system mode?
Thanks!
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Hi, Blue
Since my machine is UltraSparc T2, I should configure QEMU with
--sparc_cpu=v9, right? But it gave me the error below,
ERROR: gcc either does not exist or does not work
Maybe I should pass some flag to QEMU or update my gcc?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Parallel
op definition for qemu_ld64
Missing op definition for qemu_st64
/tmp/chenwj/qemu-0.14.0/tcg/tcg.c:1116: tcg fatal error
Aborted
--
Is it possible to fix it? If so, how?
Any sugguestions appreciated.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任
Hi, Roy
Seems to be related:
http://www.mail-archive.com/qemu-devel@nongnu.org/msg55914.html
Thanks for the info. I wonder if it is possible to cross compile qemu for
ppc (host) on a x86 machine.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Parallel Processing Lab, Institute of Information
Hi, Roy
What I did is apply the patch (see attachment) which comment out an
assertion in tcg/tcg.c first. Then configure qemu with --enable-debug
option. I don't know if it is safe to remove the assertion though, but
it works for small program.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Parallel
Forgot to add the attachment, sorry. :)
--
Wei-Ren Chen (陳韋任)
Parallel Processing Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
--- qemu-0.13.0/tcg/tcg.c.orig 2010-10-16 04:56:09.0 +0800
+++ qemu-0.13.0/tcg/tcg.c 2011-02-24 09:46
appreciated.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Parallel Processing Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
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