Re: [PATCH] STM32F100: support different density lines

On 6/20/23 00:18, Lucas Villa Real wrote: This patch adds support for the emulation of different density lines (low, medium, and high). A new class property stm32f100-soc.density= has been introduced to allow users to state the desired configuration. That property is recognized by a new machine,

Re: [PATCH] stm32vldiscovery: allow overriding of RAM size

On 4/3/23 16:48, Lucas C. Villa Real wrote: On Mon, Apr 3, 2023 at 10:54 AM Peter Maydell > wrote: On Mon, 3 Apr 2023 at 13:51, Lucas Villa Real mailto:luca...@gmail.com>> wrote: > > stm32vldiscovery comes with 8KB of SRAM, which may be too low

Re: [PATCH v1 2/2] plugins: extend execlog to filter matches

-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [RFC PATCH 0/1] QEMU TCG plugin interface extensions

On 8/21/21 11:45 AM, Florian Hauschild wrote: Hi all, I extended the plugin interface with additional functionalities. I wrote the extensions for fault injection/exploration reasearch using QEMU. The additional functionalities for a plugin are: * Read and write guest memory * Read and

Re: [PATCH for-6.2 19/25] hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property

On 8/14/21 12:11 PM, Peter Maydell wrote: On Sat, 14 Aug 2021 at 10:20, Alexandre IOOSS wrote: On 8/12/21 11:33 AM, Peter Maydell wrote: Instead of passing the MSF2 SoC an integer property specifying the CPU clock rate, pass it a Clock instead. This lets us wire that clock up

Re: [PATCH for-6.2 22/25] hw/arm/stellaris: Fix code style issues in GPTM code

On 8/12/21 11:33 AM, Peter Maydell wrote: Fix the code style issues in the Stellaris general purpose timer module code, so that when we move it to a different file in a following patch checkpatch doesn't complain. Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss Thanks

Re: [PATCH for-6.2 19/25] hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property

k_set_hz(m3clk, 142 * 100); Maybe something could be added in the commit message to say that M3_CLK is changed from 100MHz to 142MHz. I do not know the SmartFusion2 but the clocking guide seems to agree with 142MHz: https://www.microsemi.com/document-portal/doc_download/132012-ug0449-smartfusion2-and-igloo2-clocking-resources-user-guide +qdev_connect_clock_in(dev, "m3clk", m3clk); qdev_prop_set_uint32(dev, "apb0div", 2); qdev_prop_set_uint32(dev, "apb1div", 2); Reviewed-by: Alexandre Iooss Thanks, -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 18/25] hw/arm/msf2_soc: Don't allocate separate MemoryRegions

Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 17/25] hw/arm/stellaris: Wire sysclk up to armv7m

On 8/12/21 11:33 AM, Peter Maydell wrote: Connect the sysclk to the armv7m object. This board's SoC does not connect up the systick reference clock, so we don't need to connect a refclk. Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature

Re: [PATCH for-6.2 16/25] hw/arm/stellaris: split stellaris_sys_init()

the create/configure/realize parts before we create the armv7m object and the mmio/irq connection parts afterwards. Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 15/25] hw/arm/nrf51: Wire up sysclk

that this is why we aren't wiring up a refclk (no need for one). Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 13/25] hw/arm/stm32f405: Wire up sysclk and refclk

oard where the systick reference clock was running at 1MHz rather than 21MHz. Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 12/25] hw/arm/stm32f205: Wire up sysclk and refclk

oard where the systick reference clock was running at 1MHz rather than 15MHz. Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 11/25] hw/arm/stm32f100: Wire up sysclk and refclk

oard where the systick reference clock was running at 1MHz rather than 3MHz. Signed-off-by: Peter Maydell Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 14/25] hw/arm/stm32vldiscovery: Delete trailing blank line

..9b79004703b 100644 --- a/hw/arm/stm32vldiscovery.c +++ b/hw/arm/stm32vldiscovery.c @@ -65,4 +65,3 @@ static void stm32vldiscovery_machine_init(MachineClass *mc) } DEFINE_MACHINE("stm32vldiscovery", stm32vldiscovery_machine_init) - Reviewed-by: Alexandre Iooss Thanks, --

Re: [PATCH for-6.2 10/25] hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize

memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram); +memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, >sram); armv7m = DEVICE(>armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 96); Reviewed-by: Alexandre Iooss Thanks, -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 09/25] clock: Provide builtin multiplier/divider

+clk->multiplier = 1; +clk->divider = 1; + QLIST_INIT(>children); } Reviewed-by: Alexandre Iooss Thanks, -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 03/25] arm: Move system PPB container handling to armv7m

"nvic_sysregs_ns", 0x1000); - memory_region_add_subregion(>container, 0x2e000, >sysreg_ns_mem); -} - -sysbus_init_mmio(SYS_BUS_DEVICE(dev), >container); +sysbus_init_mmio(SYS_BUS_DEVICE(dev), >sysregmem); } static void armv7m_nvic_instance_init(Object *obj) My review is week because I am new to this codebase. Reviewed-by: Alexandre Iooss Thanks, -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH for-6.2 01/25] arm: Move M-profile RAS register block into its own device

CONFIG_ARM11SCU', if_true: files('arm11scu.c')) +softmmu_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_ras.c')) + # Mac devices softmmu_ss.add(when: 'CONFIG_MOS6522', if_true: files('mos6522.c')) Looks good to me! My review is weak because I am still new to QEMU codebase. Reviewed-by: Alexandre Iooss -- Alexandre OpenPGP_signature Description: OpenPGP digital signature

Re: [PATCH] docs/devel: fix missing antislash

On 8/9/21 8:14 PM, Eduardo Habkost wrote: On Mon, Aug 09, 2021 at 07:31:41PM +0200, Alexandre Iooss wrote: Signed-off-by: Alexandre Iooss --- docs/devel/qom.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/devel/qom.rst b/docs/devel/qom.rst index e5fe3597cd

[PATCH] docs/devel: fix missing antislash

Signed-off-by: Alexandre Iooss --- docs/devel/qom.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/devel/qom.rst b/docs/devel/qom.rst index e5fe3597cd..b9568c0fb8 100644 --- a/docs/devel/qom.rst +++ b/docs/devel/qom.rst @@ -309,7 +309,7 @@ This is equivalent

[PATCH v3 0/2] execlog TCG plugin to log instructions

t. Changes since v1: - The output is now easier to parse. - Use QEMU logging API rather than FILE* to write output. - Don't reject memory information in user mode. - Merge memory information with instruction execution. Now one line means one instruction. - Add documentation. Alexandre Iooss (2

[PATCH v3 1/2] contrib/plugins: add execlog to log instruction execution and memory access

Log instruction execution and memory access to a file. This plugin can be used for reverse engineering or for side-channel analysis using QEMU. Signed-off-by: Alexandre Iooss Reviewed-by: Alex Bennée --- MAINTAINERS | 1 + contrib/plugins/Makefile | 1 + contrib/plugins

[PATCH v3 2/2] docs/devel: tcg-plugins: add execlog plugin description

This adds description of the execlog TCG plugin with an example. Signed-off-by: Alexandre Iooss --- docs/devel/tcg-plugins.rst | 24 1 file changed, 24 insertions(+) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index 18c6581d85..c1e589693c

Re: [PATCH v2 0/2] execlog TCG plugin to log instructions

On 7/1/21 8:49 PM, Alex Bennée wrote: Alexandre Iooss writes: execlog is a plugin that logs executed instructions with some useful metadata including memory access. The output of the plugin is designed to be usable with other tools. For example it could be used with a side-channel leakage

Re: [PATCH v2 2/2] docs/devel: tvg-plugins: add execlog plugin description

On 6/22/21 12:37 PM, Alex Bennée wrote: Alexandre IOOSS writes: [[PGP Signed Part:Undecided]] On 6/22/21 10:48 AM, Alex Bennée wrote: Alexandre Iooss writes: [...] + +The execlog tool traces executed instructions with memory access. It can be used +for debugging and security analysis

Re: [PATCH v2 2/2] docs/devel: tvg-plugins: add execlog plugin description

On 6/22/21 10:48 AM, Alex Bennée wrote: Alexandre Iooss writes: [...] + +The execlog tool traces executed instructions with memory access. It can be used +for debugging and security analysis purposes. We should probably mention that this will generate a lot of output. Running the admittedly

Re: [PATCH v2 1/2] contrib/plugins: add execlog to log instruction execution and memory access

On 6/22/21 10:37 AM, Alex Bennée wrote: We only allocate last_exec for system.max_vcpus here. You need to check the system_emulation bool before using that information and error out if it's not system emulation. My bad, I did not test user mode emulation after converting last_exec to an

[PATCH v2] docs/system: arm: Add nRF boards description

This adds the target guide for BBC Micro:bit. Information is taken from https://wiki.qemu.org/Features/MicroBit and from hw/arm/nrf51_soc.c. Signed-off-by: Alexandre Iooss Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS| 1 + docs/system/arm/nrf.rst| 51

Re: [PATCH] docs/system: arm: Add nRF boards description

On 6/19/21 12:27 PM, Philippe Mathieu-Daudé wrote: +Julia / Su / Steffen On 6/19/21 11:57 AM, Alexandre Iooss wrote: This adds the target guide for BBC Micro:bit. Information is taken from https://wiki.qemu.org/Features/MicroBit and from hw/arm/nrf51_soc.c. Great idea :) Signed-off

[PATCH] docs/system: arm: Add nRF boards description

This adds the target guide for BBC Micro:bit. Information is taken from https://wiki.qemu.org/Features/MicroBit and from hw/arm/nrf51_soc.c. Signed-off-by: Alexandre Iooss --- MAINTAINERS| 1 + docs/system/arm/nrf.rst| 49 ++ docs/system

Re: [PATCH v2 0/2] execlog TCG plugin to log instructions

Supersedes: <20210614090116.816833-1-erdn...@crans.org> On 6/18/21 11:10 AM, Alexandre Iooss wrote: execlog is a plugin that logs executed instructions with some useful metadata including memory access. The output of the plugin is designed to be usable with other tools. For example it

[PATCH v2 1/2] contrib/plugins: add execlog to log instruction execution and memory access

Log instruction execution and memory access to a file. This plugin can be used for reverse engineering or for side-channel analysis using QEMU. Signed-off-by: Alexandre Iooss --- MAINTAINERS | 1 + contrib/plugins/Makefile | 1 + contrib/plugins/execlog.c | 123

[PATCH v2 2/2] docs/devel: tvg-plugins: add execlog plugin description

This adds description of the execlog TCG plugin with an example. Signed-off-by: Alexandre Iooss --- docs/devel/tcg-plugins.rst | 22 ++ 1 file changed, 22 insertions(+) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index 18c6581d85..02818a3327 100644

[PATCH v2 0/2] execlog TCG plugin to log instructions

. Changes since v1: - The output is now easier to parse. - Use QEMU logging API rather than FILE* to write output. - Don't reject memory information in user mode. - Merge memory information with instruction execution. Now one line means one instruction. - Add documentation. Alexandre Iooss

[PATCH v3 0/4] STM32VLDISCOVERY Machine Model

-M3 name Alexandre Iooss (4): stm32f100: Add the stm32f100 SoC stm32vldiscovery: Add the STM32VLDISCOVERY Machine docs/system: arm: Add stm32 boards description tests/boot-serial-test: Add STM32VLDISCOVERY board testcase MAINTAINERS | 13 ++ default-configs

[PATCH v3 3/4] docs/system: arm: Add stm32 boards description

This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY. Signed-off-by: Alexandre Iooss --- MAINTAINERS| 1 + docs/system/arm/stm32.rst | 66 ++ docs/system/target-arm.rst | 1 + 3 files changed, 68 insertions

[PATCH v3 1/4] stm32f100: Add the stm32f100 SoC

This SoC is similar to stm32f205 SoC. This will be used by the STM32VLDISCOVERY to create a machine. Signed-off-by: Alexandre Iooss --- MAINTAINERS| 6 ++ hw/arm/Kconfig | 6 ++ hw/arm/meson.build | 1 + hw/arm/stm32f100_soc.c | 182

[PATCH v3 4/4] tests/boot-serial-test: Add STM32VLDISCOVERY board testcase

New mini-kernel test for STM32VLDISCOVERY USART1. Signed-off-by: Alexandre Iooss --- tests/qtest/boot-serial-test.c | 37 ++ 1 file changed, 37 insertions(+) diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c index d40adddafa

[PATCH v3 2/4] stm32vldiscovery: Add the STM32VLDISCOVERY Machine

This is a Cortex-M3 based machine. Information can be found at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Signed-off-by: Alexandre Iooss --- MAINTAINERS | 6 +++ default-configs/devices/arm-softmmu.mak | 1 + hw/arm/Kconfig

Re: [PATCH] contrib/plugins: add execlog to log instruction execution and memory access

On 6/15/21 6:47 PM, Alexandre IOOSS wrote: On 6/15/21 10:22 AM, Alex Bennée wrote: Mahmoud Mandour writes: On 14/06/2021 11:01, Alexandre Iooss wrote: +} + +/** + * Log instruction execution + */ +static void vcpu_insn_exec(unsigned int cpu_index, void *udata) +{ +    char *insn_disas

Re: [PATCH] contrib/plugins: add execlog to log instruction execution and memory access

On 6/15/21 10:22 AM, Alex Bennée wrote: Mahmoud Mandour writes: On 14/06/2021 11:01, Alexandre Iooss wrote: Log instruction execution and memory access to a file. This plugin can be used for reverse engineering or for side-channel analysis using QEMU. Signed-off-by: Alexandre Iooss

[PATCH v2 2/3] stm32vldiscovery: Add the STM32VLDISCOVERY Machine

This is a Cortex-M3 based machine. Information can be found at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Signed-off-by: Alexandre Iooss --- MAINTAINERS | 6 +++ default-configs/devices/arm-softmmu.mak | 1 + hw/arm/Kconfig

[PATCH v2 1/3] stm32f100: Add the stm32f100 SoC

This SoC is similar to stm32f205 SoC. This will be used by the STM32VLDISCOVERY to create a machine. Signed-off-by: Alexandre Iooss --- MAINTAINERS| 6 ++ hw/arm/Kconfig | 6 ++ hw/arm/meson.build | 1 + hw/arm/stm32f100_soc.c | 182

[PATCH v2 3/3] docs/system: arm: Add stm32 boards description

This adds the target guide for Netduino 2, Netduino Plus 2 and STM32VLDISCOVERY. Signed-off-by: Alexandre Iooss --- MAINTAINERS| 1 + docs/system/arm/stm32.rst | 66 ++ docs/system/target-arm.rst | 1 + 3 files changed, 68 insertions

[PATCH v2 0/3] STM32VLDISCOVERY Machine Model

This patch series adds the STM32VLDISCOVERY Machine to QEMU Information on the board is available at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Alexandre Iooss (3): stm32f100: Add the stm32f100 SoC stm32vldiscovery: Add the STM32VLDISCOVERY Machine docs/system: arm: Add

Re: [PATCH 1/2] stm32f100: Add the stm32f100 SoC

On 6/15/21 10:04 AM, Alistair Francis wrote: On Tue, Jun 15, 2021 at 5:50 PM Alexandre IOOSS wrote: On 6/15/21 9:41 AM, Alistair Francis wrote: Aren't you missing some timers, like timer[5] 0x4000_0C00? Alistair I double-checked using the reference manual and the datasheet

Re: [PATCH 1/2] stm32f100: Add the stm32f100 SoC

On 6/14/21 6:04 PM, Peter Maydell wrote: Is this definitely right? The STM32F00 datasheet I found thinks it only has 61 external interrupts. Yes you are right, I don't really known what I have done here. I will fix this in next patchset version. To double-check, it is described page 131 of

Re: [PATCH 1/2] stm32f100: Add the stm32f100 SoC

On 6/15/21 9:41 AM, Alistair Francis wrote: Aren't you missing some timers, like timer[5] 0x4000_0C00? Alistair I double-checked using the reference manual and the datasheet and there is not timer[5]: - page 36 of

Re: [PATCH 2/2] stm32vldiscovery: Add the STM32VLDISCOVERY Machine

On 6/14/21 5:52 PM, Peter Maydell wrote: On Tue, 8 Jun 2021 at 17:10, Alexandre Iooss wrote: This is a Cortex-M3 based machine. Information can be found at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Signed-off-by: Alexandre Iooss The commit message says this is Cortex

[PATCH] contrib/plugins: add execlog to log instruction execution and memory access

Log instruction execution and memory access to a file. This plugin can be used for reverse engineering or for side-channel analysis using QEMU. Signed-off-by: Alexandre Iooss --- MAINTAINERS | 1 + contrib/plugins/Makefile | 1 + contrib/plugins/execlog.c | 112

[PATCH 0/2] STM32VLDISCOVERY Machine Model

This patch series adds the STM32VLDISCOVERY Machine to QEMU Information on the board is available at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Alexandre Iooss (2): stm32f100: Add the stm32f100 SoC stm32vldiscovery: Add the STM32VLDISCOVERY Machine MAINTAINERS

[PATCH 1/2] stm32f100: Add the stm32f100 SoC

This SoC is similar to stm32f205 SoC. This will be used by the STM32VLDISCOVERY to create a machine. Signed-off-by: Alexandre Iooss --- MAINTAINERS| 6 ++ hw/arm/Kconfig | 6 ++ hw/arm/meson.build | 1 + hw/arm/stm32f100_soc.c | 182

[PATCH 2/2] stm32vldiscovery: Add the STM32VLDISCOVERY Machine

This is a Cortex-M3 based machine. Information can be found at: https://www.st.com/en/evaluation-tools/stm32vldiscovery.html Signed-off-by: Alexandre Iooss --- MAINTAINERS | 6 +++ default-configs/devices/arm-softmmu.mak | 1 + hw/arm/Kconfig