[PATCH v3 3/5] hw/char/stm32l4x5_usart: Add options for serial parameters setting

Add a function to change the settings of the serial connection. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Reviewed-by: Peter Maydell --- hw/char/stm32l4x5_usart.c | 98 +++ hw/char/trace-events | 1 + 2 files changed, 99 insertions

[PATCH v3 4/5] hw/arm: Add the USART to the stm32l4x5 SoC

Add the USART to the SoC and connect it to the other implemented devices. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Reviewed-by: Peter Maydell --- docs/system/arm/b-l475e-iot01a.rst | 2 +- hw/arm/Kconfig | 1 + hw/arm/stm32l4x5_soc.c | 82

[PATCH v3 5/5] tests/qtest: Add tests for the STM32L4x5 USART

Test: - read/write from/to the usart registers - send/receive a character/string over the serial port Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build| 4 +- tests/qtest/stm32l4x5_usart-test.c | 325 + 2 files changed

[PATCH v3 1/5] hw/char: Implement STM32L4x5 USART skeleton

Add the basic infrastructure (register read/write, type...) to implement the STM32L4x5 USART. Also create different types for the USART, UART and LPUART of the STM32L4x5 to deduplicate code and enable the implementation of different behaviors depending on the type. Signed-off-by: Arnaud Minier

[PATCH v3 2/5] hw/char/stm32l4x5_usart: Enable serial read and write

Implement the ability to read and write characters to the usart using the serial port. The character transmission is based on the cmsdk-apb-uart implementation. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Reviewed-by: Peter Maydell --- hw/char/stm32l4x5_usart.c | 140

[PATCH v3 0/5] hw/char: Implement the STM32L4x5 USART, UART and LPUART

formatting - Declare variables at the start of code blocks in the SoC - Use %u instead of %x in an error log - Add ".abstract = true" to the base usart class - Change tests to use meson harness timeout - Drop merged RCC commit Arnaud Minier (5): hw/char: Implement STM32L4x5 USART skeleton

[PATCH v2 6/6] tests/qtest: Add tests for the STM32L4x5 USART

Test: - read/write from/to the usart registers - send/receive a character/string over the serial port Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build| 3 +- tests/qtest/stm32l4x5_usart-test.c | 326 + 2 files changed

[PATCH v2 4/6] hw/char/stm32l4x5_usart: Add options for serial parameters setting

Add a function to change the settings of the serial connection. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 98 +++ hw/char/trace-events | 1 + 2 files changed, 99 insertions(+) diff --git a/hw/char

[PATCH v2 5/6] hw/arm: Add the USART to the stm32l4x5 SoC

Add the USART to the SoC and connect it to the other implemented devices. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- docs/system/arm/b-l475e-iot01a.rst | 2 +- hw/arm/Kconfig | 1 + hw/arm/stm32l4x5_soc.c | 82

[PATCH v2 3/6] hw/char/stm32l4x5_usart: Enable serial read and write

Implement the ability to read and write characters to the usart using the serial port. The character transmission is based on the cmsdk-apb-uart implementation. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 139

[PATCH v2 1/6] hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock

er changes. The usart tests will ensure that this behavior will not regress. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index bc2d63528b..

[PATCH v2 2/6] hw/char: Implement STM32L4x5 USART skeleton

Add the basic infrastructure (register read/write, type...) to implement the STM32L4x5 USART. Also create different types for the USART, UART and LPUART of the STM32L4x5 to deduplicate code and enable the implementation of different behaviors depending on the type. Signed-off-by: Arnaud Minier

[PATCH v2 0/6] hw/char: Implement the STM32L4x5 USART, UART and LPUART

checking the interrupt number in the tests - Correct usage of g_autofree in the SoC Arnaud Minier (6): hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock hw/char: Implement STM32L4x5 USART skeleton hw/char/stm32l4x5_usart: Enable serial read and write hw/char/stm32l4x5_usart: Add

[PATCH 7/7] tests/qtest: Add tests for the STM32L4x5 USART

-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build| 3 +- tests/qtest/stm32l4x5_usart-test.c | 399 + 2 files changed, 401 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/stm32l4x5_usart-test.c diff --git a/tests/qtest

[PATCH 6/7] hw/arm: Add the USART to the stm32l4x5 SoC

Add the USART to the SoC and connect it to the other implemented devices. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- docs/system/arm/b-l475e-iot01a.rst | 2 +- hw/arm/Kconfig | 1 + hw/arm/stm32l4x5_soc.c | 88

[PATCH 4/7] hw/char/stm32l4x5_usart: Enable serial read and write

Implement the ability to read and write characters to the usart using the serial port. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 105 +- hw/char/trace-events | 1 + 2 files changed, 105 insertions(+), 1

[PATCH 3/7] hw/char/stm32l4x5_usart: Add USART, UART, LPUART types

Create different types for the USART, UART and LPUART of the STM32L4x5 to deduplicate code and enable the implementation of different behaviors depending on the type. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 113

[PATCH 5/7] hw/char/stm32l4x5_usart: Add options for serial parameters setting

Add a function to change the settings of the serial connection. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 97 +++ 1 file changed, 97 insertions(+) diff --git a/hw/char/stm32l4x5_usart.c b/hw/char

[PATCH 1/7] hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock

er changes. The usart tests will ensure that this behavior will not regress. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index bc2d63528b..

[PATCH 2/7] hw/char: Implement STM32L4x5 USART skeleton

Add the basic infrastructure (register read/write, type...) to implement the STM32L4x5 USART. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- MAINTAINERS | 1 + hw/char/Kconfig | 3 + hw/char/meson.build | 1 + hw/char

[PATCH 0/7] hw/char: Implement the STM32L4x5 USART, UART and LPUART

to communicate with the program currently running. Arnaud Minier (7): hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock hw/char: Implement STM32L4x5 USART skeleton hw/char/stm32l4x5_usart: Add USART, UART, LPUART types hw/char/stm32l4x5_usart: Enable serial read and write hw/char

[PATCH v6 7/8] hw/arm/stm32l4x5_soc.c: Use the RCC Sysclk

Now that we can generate reliable clock frequencies from the RCC, remove the hacky definition of the sysclk in the b_l475e_iot01a initialisation code and use the correct RCC clock. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis Reviewed-by: Peter Maydell

[PATCH v6 8/8] tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC

Tests: - the ability to change the sysclk of the device - the ability to enable/disable/configure the PLLs - if the clock multiplexers work - the register flags and the generation of irqs Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Thomas Huth --- tests/qtest/meson.build

[PATCH v6 6/8] hw/misc/stm32l4x5_rcc: Add write protections to CR register

Add write protections for the fields in the CR register. PLL configuration write protections (among others) have not been handled yet. This is planned in a future patch set. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 164

[PATCH v6 4/8] hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers

for every object. (Reset handling based on hw/misc/zynq_sclr.c) Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 145 - include/hw/misc/stm32l4x5_rcc_internals.h | 705 ++ 2 files changed, 833 insertions(+), 17 deletions

[PATCH v6 5/8] hw/misc/stm32l4x5_rcc: Handle Register Updates

or bypassing mecanisms). Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 524 +++- 1 file changed, 512 insertions(+), 12 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index 5b59ddec2d

[PATCH v6 3/8] hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object

This object represents the PLLs and their channels. The PLLs allow for a more fine-grained control of the clocks frequency. The migration handling is based on hw/misc/zynq_sclr.c. Three phase reset will be handled in a later commit. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol

[PATCH v6 2/8] hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object

. Three phase reset will be handled in a later commit. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis --- hw/misc/stm32l4x5_rcc.c | 160 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h

[PATCH v6 0/8] Add device STM32L4x5 RCC

ve waiting functions in tests - Added access sizes for the RCC - Use clock_update() instead of clock_update_hz() where appropriate Arnaud Minier (8): hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object hw/misc/stm32l4x5_rcc: Add a

[PATCH v6 1/8] hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton

Add the necessary files to add a simple RCC implementation with just reads from and writes to registers. Also instantiate the RCC in the STM32L4x5_SoC. It is needed for accurate emulation of all the SoC clocks and timers. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked

Re: [PATCH v5 6/8] Add write protections to CR register

Thank you for the review and for the tips ! It really helps. I will address the problems you have highlighted and will send a new version later this week. Arnaud - Original Message - > From: "Peter Maydell" > To: "Arnaud Minier" > Cc: "qemu-devel&quo

Re: [PATCH v5 2/8] Add an internal clock multiplexer object

- Original Message - > From: "Peter Maydell" > To: "Arnaud Minier" > Cc: "qemu-devel" , "Thomas Huth" , > "Laurent Vivier" , "Inès > Varhol" , "Samuel Tardieu" > , "qemu-arm" > , &quo

Re: [PATCH v5 1/8] Implement STM32L4x5_RCC skeleton

Thanks Peter for the review, - Original Message - > From: "Peter Maydell" > To: "Arnaud Minier" > Cc: "qemu-devel" , "Thomas Huth" , "Laurent Vivier" , "Inès > Varhol" , "Samuel Tardieu" , "qe

[PATCH v5 8/8] Add tests for the STM32L4x5_RCC

Tests: - the ability to change the sysclk of the device - the ability to enable/disable/configure the PLLs - if the clock multiplexers work - the register flags and the generation of irqs Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Thomas Huth --- tests/qtest/meson.build

[PATCH v5 7/8] STM32L4x5: Use the RCC Sysclk

Now that we can generate reliable clock frequencies from the RCC, remove the hacky definition of the sysclk in the b_l475e_iot01a initialisation code and use the correct RCC clock. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis --- hw/arm/b-l475e-iot01a.c

[PATCH v5 6/8] Add write protections to CR register

Add write protections for the fields in the CR register. PLL configuration write protections (among others) have not been handled yet. This is planned in a future patch set. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 164

[PATCH v5 5/8] RCC: Handle Register Updates

or bypassing mecanisms). Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 536 +++- 1 file changed, 524 insertions(+), 12 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index 4ffb8a209a

[PATCH v5 4/8] Add initialization information for PLLs and clock multiplexers

Instanciate the whole clock tree and using the Clock multiplexers and the PLLs defined in the previous commits. This allows to statically define the clock tree and easily follow the clock signal from one end to another. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc

[PATCH v5 3/8] Add an internal PLL Clock object

This object represents the PLLs and their channels. The PLLs allow for a more fine-grained control of the clocks frequency. Wasn't sure about how to handle the reset and the migration so used the same appproach as the BCM2835 CPRMAN. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol

[PATCH v5 2/8] Add an internal clock multiplexer object

and the migration so used the same appproach as the BCM2835 CPRMAN. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis --- hw/misc/stm32l4x5_rcc.c | 158 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h

[PATCH v5 1/8] Implement STM32L4x5_RCC skeleton

Add the necessary files to add a simple RCC implementation with just reads from and writes to registers. Also instanciate the RCC in the STM32L4x5_SoC. It is needed for accurate emulation of all the SoC clocks and timers. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked

[PATCH v5 0/8] Add device STM32L4x5 RCC

for the multiplexers and the PLLs Changes from v4 to v5: - Abort when trying to set an out-of-bound pll vco multiplier Arnaud Minier (8): Implement STM32L4x5_RCC skeleton Add an internal clock multiplexer object Add an internal PLL Clock object Add initialization information for PLLs and clock

Re: [PATCH v4 3/8] Add an internal PLL Clock object

Hello Alistair, Yes, I think we should bail out if pll_set_vco_multiplier receives an invalid value to respect the hardware defined bounds. I actually intended to add a return there but I missed it. It will be added in the next version. Thanks, Arnaud Minier - Mail original - De

[PATCH v4 3/8] Add an internal PLL Clock object

This object represents the PLLs and their channels. The PLLs allow for a more fine-grained control of the clocks frequency. Wasn't sure about how to handle the reset and the migration so used the same appproach as the BCM2835 CPRMAN. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol

[PATCH v4 1/8] Implement STM32L4x5_RCC skeleton

Add the necessary files to add a simple RCC implementation with just reads from and writes to registers. Also instanciate the RCC in the STM32L4x5_SoC. It is needed for accurate emulation of all the SoC clocks and timers. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- MAINTAINERS

[PATCH v4 5/8] RCC: Handle Register Updates

or bypassing mecanisms). Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 536 +++- 1 file changed, 524 insertions(+), 12 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index aed61dd793

[PATCH v4 2/8] Add an internal clock multiplexer object

and the migration so used the same appproach as the BCM2835 CPRMAN. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis --- hw/misc/stm32l4x5_rcc.c | 158 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h

[PATCH v4 7/8] STM32L4x5: Use the RCC Sysclk

Now that we can generate reliable clock frequencies from the RCC, remove the hacky definition of the sysclk in the b_l475e_iot01a initialisation code and use the correct RCC clock. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/arm/b-l475e-iot01a.c| 10 +- hw

[PATCH v4 0/8] Add device STM32L4x5 RCC

for the multiplexers and the PLLs Arnaud Minier (8): Implement STM32L4x5_RCC skeleton Add an internal clock multiplexer object Add an internal PLL Clock object Add initialization information for PLLs and clock multiplexers RCC: Handle Register Updates Add write protections to CR register

[PATCH v4 4/8] Add initialization information for PLLs and clock multiplexers

Instanciate the whole clock tree and using the Clock multiplexers and the PLLs defined in the previous commits. This allows to statically define the clock tree and easily follow the clock signal from one end to another. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc

[PATCH v4 8/8] Add tests for the STM32L4x5_RCC

Tests: - the ability to change the sysclk of the device - the ability to enable/disable/configure the PLLs - if the clock multiplexers work - the register flags and the generation of irqs Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3

[PATCH v4 6/8] Add write protections to CR register

Add write protections for the fields in the CR register. PLL configuration write protections (among others) have not been handled yet. This is planned in a future patch set. Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 164

[PATCH v3 8/8] Add tests for the STM32L4x5_RCC

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3 +- tests/qtest/stm32l4x5_rcc-test.c | 207 +++ 2 files changed, 209 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/stm32l4x5_rcc-test.c diff --git a/tests

[PATCH v3] Add tests for the STM32L4x5_RCC

Tests: - the ability to change the sysclk of the device - the ability to enable/disable/configure the PLLs - if the clock multiplexers work - the register flags and the generation of irqs Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3

[PATCH v3 7/8] STM32L4x5: Use the RCC Sysclk

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/arm/b-l475e-iot01a.c| 10 +- hw/arm/stm32l4x5_soc.c | 33 - include/hw/arm/stm32l4x5_soc.h | 3 --- 3 files changed, 5 insertions(+), 41 deletions(-) diff --git a/hw/arm/b

[PATCH v3 6/8] Add write protections to CR register

--- hw/misc/stm32l4x5_rcc.c | 164 1 file changed, 114 insertions(+), 50 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index 1f55662bbd..325b179d10 100644 --- a/hw/misc/stm32l4x5_rcc.c +++ b/hw/misc/stm32l4x5_rcc.c @@ -329,9

[PATCH v3 7/8] STM32L4x5: Use the RCC Sysclk

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/arm/b-l475e-iot01a.c| 10 +- hw/arm/stm32l4x5_soc.c | 33 - include/hw/arm/stm32l4x5_soc.h | 3 --- 3 files changed, 5 insertions(+), 41 deletions(-) diff --git a/hw/arm/b

[PATCH v3 8/8] Add tests for the STM32L4x5_RCC

Tests: - the ability to change the sysclk of the device - the ability to enable/disable/configure the PLLs - if the clock multiplexers work - the register flags and the generation of irqs Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3

[PATCH v3 5/8] RCC: Handle Register Updates

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 508 +++- 1 file changed, 496 insertions(+), 12 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index c2df70ab37..1f55662bbd 100644 --- a/hw

[PATCH v3 2/8] Add an internal clock multiplexer object

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Acked-by: Alistair Francis --- hw/misc/stm32l4x5_rcc.c | 154 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h | 119 + include/hw/misc

[PATCH v3 3/8] Add an internal PLL Clock object

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 171 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h | 40 + include/hw/misc/stm32l4x5_rcc_internals.h | 22 +++ 4

[PATCH v3 4/8] Add initialization information for PLLs and clock multiplexers

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 69 ++- include/hw/misc/stm32l4x5_rcc_internals.h | 707 ++ 2 files changed, 774 insertions(+), 2 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc

[PATCH v3 0/8] Add device STM32L4x5 RCC

in the tests - Added a real value for ICSR register - Replaced some TODOs with correct error handling - Added a commit that implements correct write protections for the CR register Arnaud Minier (8): Implement STM32L4x5_RCC skeleton Add an internal clock multiplexer object Add an internal PLL

[PATCH v3 1/8] Implement STM32L4x5_RCC skeleton

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- MAINTAINERS | 5 +- docs/system/arm/b-l475e-iot01a.rst| 2 +- hw/arm/Kconfig| 1 + hw/arm/stm32l4x5_soc.c| 12 +- hw/misc/Kconfig

[PATCH v2 7/7] Add tests for the STM32L4x5_RCC

to enable and disable the PLLs - if the clock multiplexers work - the register flags and the generation of irqs Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3 +- tests/qtest/stm32l4x5_rcc-test.c | 210 +++ 2 files

[PATCH v2 7/7] Add tests for the STM32L4x5_RCC

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3 +- tests/qtest/stm32l4x5_rcc-test.c | 210 +++ 2 files changed, 212 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/stm32l4x5_rcc-test.c diff --git

[PATCH v2 4/7] Add initialization information for PLLs and clock multiplexers

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 69 ++- include/hw/misc/stm32l4x5_rcc_internals.h | 707 ++ 2 files changed, 774 insertions(+), 2 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc

[PATCH v2 1/7] Implement STM32L4x5_RCC skeleton

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- MAINTAINERS | 5 +- docs/system/arm/b-l475e-iot01a.rst| 2 +- hw/arm/Kconfig| 1 + hw/arm/stm32l4x5_soc.c| 12 +- hw/misc/Kconfig

[PATCH v2 6/7] STM32L4x5: Use the RCC Sysclk

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/arm/b-l475e-iot01a.c| 10 +- hw/arm/stm32l4x5_soc.c | 33 - include/hw/arm/stm32l4x5_soc.h | 3 --- 3 files changed, 5 insertions(+), 41 deletions(-) diff --git a/hw/arm/b

[PATCH v2 2/7] Add an internal clock multiplexer object

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 154 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h | 119 + include/hw/misc/stm32l4x5_rcc_internals.h

[PATCH v2 5/7] RCC: Handle Register Updates

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 507 +++- 1 file changed, 495 insertions(+), 12 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index 33c2a1915f..66e3ad6b98 100644 --- a/hw

[PATCH v2 0/7] Add device STM32L4x5 RCC

-on: 20240109194438.70934-1-ines.var...@telecom-paris.fr ([PATCH v4 0/3] Add device STM32L4x5 SYSCFG) Changes from v1 to v2: - Removed a mention in the tests - Add an early return to prevent a clang compilation error in rcc_update_pllsaixcfgr() Arnaud Minier (7): Implement STM32L4x5_RCC skeleton Add

[PATCH v2 3/7] Add an internal PLL Clock object

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 168 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h | 40 ++ include/hw/misc/stm32l4x5_rcc_internals.h | 22 +++ 4

[PATCH 2/7] Add an internal clock multiplexer object

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 154 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h | 119 + include/hw/misc/stm32l4x5_rcc_internals.h

[PATCH 6/7] STM32L4x5: Use the RCC Sysclk

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/arm/b-l475e-iot01a.c| 10 +- hw/arm/stm32l4x5_soc.c | 33 - include/hw/arm/stm32l4x5_soc.h | 3 --- 3 files changed, 5 insertions(+), 41 deletions(-) diff --git a/hw/arm/b

[PATCH 5/7] RCC: Handle Register Updates

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 506 +++- 1 file changed, 494 insertions(+), 12 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c index 33c2a1915f..29545198a0 100644 --- a/hw

[PATCH 1/7] Implement STM32L4x5_RCC skeleton

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- MAINTAINERS | 5 +- docs/system/arm/b-l475e-iot01a.rst| 2 +- hw/arm/Kconfig| 1 + hw/arm/stm32l4x5_soc.c| 12 +- hw/misc/Kconfig

[PATCH 3/7] Add an internal PLL Clock object

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 168 ++ hw/misc/trace-events | 5 + include/hw/misc/stm32l4x5_rcc.h | 40 ++ include/hw/misc/stm32l4x5_rcc_internals.h | 22 +++ 4

[PATCH 7/7] Add tests for the STM32L4x5_RCC

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- tests/qtest/meson.build | 3 +- tests/qtest/stm32l4x5_rcc-test.c | 211 +++ 2 files changed, 213 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/stm32l4x5_rcc-test.c diff --git

[PATCH 0/7] Add device STM32L4x5 RCC

on 20240109194438.70934-1-ines.var...@telecom-paris.fr ([PATCH v4 0/3] Add device STM32L4x5 SYSCFG) Arnaud Minier (7): Implement STM32L4x5_RCC skeleton Add an internal clock multiplexer object Add an internal PLL Clock object Add initialization information for PLLs and clock multiplexers RCC: Handle

[PATCH 4/7] Add initialization information for PLLs and clock multiplexers

Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol --- hw/misc/stm32l4x5_rcc.c | 69 ++- include/hw/misc/stm32l4x5_rcc_internals.h | 707 ++ 2 files changed, 774 insertions(+), 2 deletions(-) diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc

Questions about clocks emulation

a clock tree similar to the one on the hardware. Is this limitation there for some reason or has it simply not been implemented? Thanks, Arnaud Minier