On 8/4/15 00:40, Richard Henderson wrote:
On 08/01/2015 02:47 AM, Chen Gang wrote:
I am just adding floating point instructions (e.g. fsingle_add1),
but for me, I can not find any details about them (the ISA
documents only give a summary description, but not details), e.g.
The tilegx splits
ideas, suggestions,
and completions for it).
Thanks.
--
Chen Gang
Open, share, and attitude like air, water, and life which God blessed
about it (e.g. virtio), others not (maybe each of them
have their own reasons -- e.g. hardware will never generate 0 size).
Welcome any other members' ideas, suggestions and completions.
Thanks.
--
Chen Gang
Open, share, and attitude like air, water, and life which God blessed
--
Chen
On 6/13/15 21:21, Chen Gang wrote:
+static void gen_st_add(struct DisasContext *dc,
+ uint8_t rsrc, uint8_t rsrcb, uint8_t imm8,
It needs int8_t instead of uint8_t for imm8, or it will cause memmove()
of glibc generates incorrect result with -O1/2/s optimization
On 6/13/15 21:21, Chen Gang wrote:
+
+static void decode_x1(struct DisasContext *dc, tilegx_bundle_bits bundle)
+{
+unsigned int opcode = get_Opcode_X1(bundle);
+uint8_t rsrc = (uint8_t)get_SrcA_X1(bundle);
+uint8_t rdst = (uint8_t)get_Dest_X1(bundle);
+int16_t imm16
On 7/19/15 17:42, Chen Gang wrote:
On 6/13/15 21:21, Chen Gang wrote:
+static void gen_st_add(struct DisasContext *dc,
+ uint8_t rsrc, uint8_t rsrcb, uint8_t imm8,
It needs int8_t instead of uint8_t for imm8, or it will cause memmove()
of glibc generates incorrect
On 6/13/15 21:10, Chen Gang wrote:
+
+void cpu_loop(CPUTLGState *env)
+{
+CPUState *cs = CPU(tilegx_env_get_cpu(env));
+int trapnr;
+
+while (1) {
+cpu_exec_start(cs);
+trapnr = cpu_tilegx_exec(env);
+cpu_exec_end(cs);
+switch (trapnr
On 7/19/15 19:31, Chen Gang wrote:
On 6/13/15 21:10, Chen Gang wrote:
+
+void cpu_loop(CPUTLGState *env)
+{
+CPUState *cs = CPU(tilegx_env_get_cpu(env));
+int trapnr;
+
+while (1) {
+cpu_exec_start(cs);
+trapnr = cpu_tilegx_exec(env);
+cpu_exec_end(cs
vi
under tilegx qemu have bugs).
Hope I can finish within this month (I also have to do some kernel and
gcc related things in my free time during this month).
Thanks.
On Jun 4, 2015, at 5:33 AM, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 06/03/2015 11:47 PM, Richard Henderson wrote
vi
under tilegx qemu have bugs).
Hope I can finish within this month (I also have to do some kernel and
gcc related things in my free time during this month).
Thanks.
On Jun 4, 2015, at 5:33 AM, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 06/03/2015 11:47 PM, Richard Henderson wrote
Today, I shall continue to try the test for qemu linux-user, and try to
finish gcc testsuite within this month.
Welcome any ideas, suggestions, and completions.
Thanks.
On 06/19/2015 09:12 AM, Chen Gang wrote:
On 06/19/2015 06:02 AM, Peter Maydell wrote:
On 13 June 2015 at 14:07, Chen Gang
On 06/19/2015 06:02 AM, Peter Maydell wrote:
On 13 June 2015 at 14:07, Chen Gang xili_gchen_5...@hotmail.com wrote:
It can finish running Hello world elf64 binary, and the related test
cases:
- with --enable-debug, enable assertion with -g:
./tilegx-linux-user/qemu-tilegx -L /upstream
They are based on Linux kernel tilegx architecture for 64 bit binary,
and also based on tilegx ABI reference document, and also reference from
other targets implementations.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/tilegx/syscall.h| 40 +
linux-user/tilegx
Use 'inline' instead of '__inline', and also use 'uint64_t' instead of
unsigned long long
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/opcode_tilegx.h | 220 +-
1 file changed, 110 insertions(+), 110 deletions(-)
diff --git a/target
The related copy is from Linux kernel arch/tile/include/uapi/arch/
spr_def_64.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/spr_def_64.h | 216 +
1 file changed, 216 insertions(+)
create mode 100644 target-tilegx/spr_def_64.h
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/cpu.c | 143 ++
target-tilegx/cpu.h | 175
2 files changed, 318 insertions
The related instructions are exception, cntlz, cnttz, shufflebytes, and
add_saturate.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/helper.c | 83 ++
target-tilegx/helper.h | 5 +++
2 files changed, 88 insertions(+)
create
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
include/elf.h | 2 +
linux-user/elfload.c | 23
linux-user
Generate related tcg instructions, and qemu tilegx can finish running
Hello world. The elf64 binary can be static or shared.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/translate.c | 2966 +
1 file changed, 2966 insertions
./tilegx-linux-user/qemu-tilegx -d all
/upstream/release-tile/test/test_static /tmp/d.log
Chen Gang (10):
linux-user: tilegx: Firstly add architecture related features
linux-user: Support tilegx architecture in linux-user
linux-user/syscall.c: conditionalize syscalls which are not defined
It is copied from Linux kernel arch/tile/include/uapi/arch/
opcode_tilegx.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/opcode_tilegx.h | 1406 +
1 file changed, 1406 insertions(+)
create mode 100644 target-tilegx/opcode_tilegx.h
Some of architectures (e.g. tilegx), several syscall macros are not
supported, so switch them.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux
Add related configuration, make files for tilegx. Now, qemu tilegx can
pass building, and finish running Hello world static/shared elf64
binary.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
configure | 2 ++
default-configs/tilegx-linux-user.mak | 1 +
target
, Chen Gang wrote:
I can't help thinking, as I read all of these decode functions, that it would
be better if the output disassembly, i.e. qemu_log_mask(CPU_LOG_TB_IN_ASM,
*),
were to happen here, instead of being spread across 99 other functions.
This has a side effect of reducing many
On 06/03/2015 11:20 PM, Chris Metcalf wrote:
On 06/03/2015 11:19 AM, Peter Maydell wrote:
On 3 June 2015 at 16:10, Chris Metcalf cmetc...@ezchip.com wrote:
On 06/03/2015 08:47 AM, Chen Gang wrote:
On 06/03/2015 08:34 PM, Peter Maydell wrote:
You must do something. You can't allow guest code
more about it, and provide more valuable
details for it.
And welcome any members to provide related pdf documents, if possible.
Thanks.
--
Chen Gang
Open, share, and attitude like air, water, and life which God blessed
On 06/04/2015 08:29 PM, Peter Maydell wrote:
On 4 June 2015 at 13:25, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 06/03/2015 11:20 PM, Chris Metcalf wrote:
On 06/03/2015 11:19 AM, Peter Maydell wrote:
On 3 June 2015 at 16:10, Chris Metcalf cmetc...@ezchip.com wrote:
On 06/03/2015 08:47 AM
On 06/03/2015 07:39 AM, Andreas Färber wrote:
Am 03.06.2015 um 02:43 schrieb Peter Maydell:
On 30 May 2015 at 22:14, Chen Gang xili_gchen_5...@hotmail.com wrote:
Use 'inline' instead of '__inline', and also use 'uint64_t' instead of
unsigned long long
Signed-off-by: Chen Gang gang.chen.5
On 06/03/2015 08:34 PM, Peter Maydell wrote:
On 3 June 2015 at 13:30, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 06/03/2015 01:40 AM, Peter Maydell wrote:
On 30 May 2015 at 22:10, Chen Gang xili_gchen_5...@hotmail.com wrote:
+#ifdef TARGET_TILEGX
+
+static uint64_t get_regval
On 06/03/2015 01:06 AM, Peter Maydell wrote:
On 30 May 2015 at 22:10, Chen Gang xili_gchen_5...@hotmail.com wrote:
They are based on Linux kernel tilegx architecture for 64 bit binary,
and also based on tilegx ABI reference document, and also reference from
other targets implementations
On 06/03/2015 01:40 AM, Peter Maydell wrote:
On 30 May 2015 at 22:10, Chen Gang xili_gchen_5...@hotmail.com wrote:
+#ifdef TARGET_TILEGX
+
+static uint64_t get_regval(CPUTLGState *env, uint8_t reg)
+{
+if (likely(reg TILEGX_R_COUNT)) {
+return env-regs[reg];
+} else
On 6/3/15 01:52, Peter Maydell wrote:
On 30 May 2015 at 22:19, Chen Gang xili_gchen_5...@hotmail.com wrote:
Add related configuration, make files for tilegx. Now, qemu tilegx can
pass building, and finish running Hello world static/shared elf64
binary.
Signed-off-by: Chen Gang gang.chen.5
On 6/3/15 01:44, Peter Maydell wrote:
On 30 May 2015 at 22:15, Chen Gang xili_gchen_5...@hotmail.com wrote:
The related copy is from Linux kernel arch/tile/include/uapi/arch/
spr_def_64.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/spr_def_64.h | 216
On 6/3/15 01:54, Peter Maydell wrote:
On 30 May 2015 at 22:18, Chen Gang xili_gchen_5...@hotmail.com wrote:
Generate related tcg instructions, and qemu tilegx can finish running
Hello world. The elf64 binary can be static or shared.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
Firstly, thank you very much for your valuable work for all patches.
On 6/3/15 01:51, Peter Maydell wrote:
On 30 May 2015 at 22:15, Chen Gang xili_gchen_5...@hotmail.com wrote:
+
+#define TILEGX_IS_ERRNO(ret) \
+ ((ret) 0xf000ULL) /* errno is 0 --
4096
On 6/3/15 01:44, Peter Maydell wrote:
On 30 May 2015 at 22:15, Chen Gang xili_gchen_5...@hotmail.com wrote:
The related copy is from Linux kernel arch/tile/include/uapi/arch/
spr_def_64.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/spr_def_64.h | 216
On 6/3/15 00:32, Richard Henderson wrote:
On 06/01/2015 01:54 PM, Chen Gang wrote:
Further, the TILEGX_R_COUNT restriction is also incorrect. True, you
don't
actually implement the top 7 special registers, but that doesn't matter, you
should still be incrementing them.
We did
On 6/2/15 00:02, Richard Henderson wrote:
On 05/30/2015 02:17 PM, Chen Gang wrote:
+for (count = 0; count 8; count++) {
+sel = (rsrcb (count * 8)) 0xf;
+if (sel 8) {
+vdst |= ((rdst (8 * sel)) 0xff) (count * 8);
+} else {
+vdst
On 5/27/15 05:39, Chen Gang wrote:
On 5/12/15 05:26, Chen Gang wrote:
+}
+
+/*
+ * Functional Description
+ *
+ *uint64_t output = 0;
+ *uint32_t counter;
+ *for (counter = 0; counter (WORD_SIZE / 32); counter++)
+ *{
+ *bool asel = ((counter
. For me, it would be easier for reading and
discussing (they are in one c file within 3K, related with each other,
and sent together).
On 05/30/2015 02:18 PM, Chen Gang wrote:
+/* mfspr can be only in X1 pipe, so it doesn't need to be bufferd */
+static void gen_mfspr(struct DisasContext *dc
./tilegx-linux-user/qemu-tilegx -d all
/upstream/release-tile/test/test_static /tmp/d.log
Chen Gang (10):
linux-user: tilegx: Firstly add architecture related features
linux-user: Support tilegx architecture in linux-user
linux-user/syscall.c: conditionalize syscalls which are not defined
The related instructions are exception, cntlz, cnttz, and shufflebytes.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/helper.c | 73 ++
target-tilegx/helper.h | 4 +++
2 files changed, 77 insertions(+)
create mode 100644
They are based on Linux kernel tilegx architecture for 64 bit binary,
and also based on tilegx ABI reference document, and also reference from
other targets implementations.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/tilegx/syscall.h| 35
linux-user/tilegx
Generate related tcg instructions, and qemu tilegx can finish running
Hello world. The elf64 binary can be static or shared.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/translate.c | 2787 +
1 file changed, 2787 insertions
Add related configuration, make files for tilegx. Now, qemu tilegx can
pass building, and finish running Hello world static/shared elf64
binary.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
configure | 2 ++
default-configs/tilegx-linux-user.mak | 1 +
target
It is copied from Linux kernel arch/tile/include/uapi/arch/
opcode_tilegx.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/opcode_tilegx.h | 1406 +
1 file changed, 1406 insertions(+)
create mode 100644 target-tilegx/opcode_tilegx.h
The related copy is from Linux kernel arch/tile/include/uapi/arch/
spr_def_64.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/spr_def_64.h | 216 +
1 file changed, 216 insertions(+)
create mode 100644 target-tilegx/spr_def_64.h
Use 'inline' instead of '__inline', and also use 'uint64_t' instead of
unsigned long long
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/opcode_tilegx.h | 220 +-
1 file changed, 110 insertions(+), 110 deletions(-)
diff --git a/target
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/cpu.c | 143 +++
target-tilegx/cpu.h | 171
2 files changed, 314 insertions
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
include/elf.h | 2 +
linux-user/elfload.c | 23 +
linux-user
Some of architectures (e.g. tilegx), several syscall macros are not
supported, so switch them.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux
).
Thanks.
--
Chen Gang
Open, share, and attitude like air, water, and life which God blessed
On 5/12/15 05:26, Chen Gang wrote:
+}
+
+/*
+ * Functional Description
+ *
+ *uint64_t output = 0;
+ *uint32_t counter;
+ *for (counter = 0; counter (WORD_SIZE / 32); counter++)
+ *{
+ *bool asel = ((counter 1) == 1
, and begin make patches for tilegx, next.
Welcome any ideas, suggestions and completions (e.g. for test cases). If
no additional reply, I shall send patches for tilegx within 4 days.
Thanks.
On 5/25/15 06:03, Chen Gang wrote:
For Hello world with shared glibc, it needs to implement additional
For Hello world with shared glibc, it needs to implement additional
instructions and fix one additional bug (it is about syscall_nr.h: need
stat64 and fstatat64).
I shall send patch v11 within this month. :-)
Thanks.
On 5/22/15 09:48, Chen Gang wrote:
On 05/22/2015 07:40 AM, Chris Metcalf
After fix additional 3 bugs (one for mnz, one for mz, one for v1cmpeqi),
at present, tilegx linux user can print Hello World! :-)
I shall reconstruct/prepare the code and send patch v11 for review
within this month.
Thanks.
On 5/19/15 10:47, Chen Gang wrote:
Hello All:
I also found another
On 05/22/2015 07:40 AM, Chris Metcalf wrote:
Congratulations!
Again, really thank all of you very much!! :-)
On May 21, 2015, at 4:58 PM, Chen Gang xili_gchen_5...@hotmail.com wrote:
After fix additional 3 bugs (one for mnz, one for mz, one for v1cmpeqi),
at present, tilegx linux user
Hello All:
I also found another bug: I did not set the system call error number to
r1 register, which will cause new_heap() fail although mmap64 succeed.
Hope it is my last bug for printing Hello world executable binary.
Thanks.
On 05/12/2015 07:16 PM, Chen Gang wrote:
On 05/12/2015 07:08 PM
On 5/12/15 00:55, Richard Henderson wrote:
On 05/10/2015 03:45 PM, Chen Gang wrote:
+static void gen_cmpltsi(struct DisasContext *dc,
+uint8_t rdst, uint8_t rsrc, int8_t imm8)
+{
+qemu_log_mask(CPU_LOG_TB_IN_ASM, cmpltsi r%d, r%d, %d\n
On 5/12/15 00:55, Richard Henderson wrote:
On 05/10/2015 03:45 PM, Chen Gang wrote:
+static void gen_cmpltsi(struct DisasContext *dc,
+uint8_t rdst, uint8_t rsrc, int8_t imm8)
+{
+qemu_log_mask(CPU_LOG_TB_IN_ASM, cmpltsi r%d, r%d, %d\n
On 5/12/15 00:55, Richard Henderson wrote:
On 05/10/2015 03:45 PM, Chen Gang wrote:
+static void gen_cmpltsi(struct DisasContext *dc,
+uint8_t rdst, uint8_t rsrc, int8_t imm8)
+{
+qemu_log_mask(CPU_LOG_TB_IN_ASM, cmpltsi r%d, r%d, %d\n
On 5/12/15 00:55, Richard Henderson wrote:
On 05/10/2015 03:45 PM, Chen Gang wrote:
+static void gen_cmpltsi(struct DisasContext *dc,
+uint8_t rdst, uint8_t rsrc, int8_t imm8)
+{
+qemu_log_mask(CPU_LOG_TB_IN_ASM, cmpltsi r%d, r%d, %d\n,
+ rdst
...@iki.fi; w...@tilera.com; qemu-devel@nongnu.org
Subject: Re: [PATCH 05/10 v10] target-tilegx/opcode_tilegx.h: Modify
it to fit qemu using
On 05/11/2015 02:06 PM, Chen Gang wrote:
On 5/12/15 00:01, Richard Henderson wrote:
On 05/10/2015 03:42 PM, Chen Gang wrote:
-static __inline unsigned int
On 05/12/2015 07:08 PM, Peter Maydell wrote:
On 12 May 2015 at 11:56, Chen Gang xili_gchen_5...@hotmail.com wrote:
Welcome any other members' ideas, suggestions or completions for it.
If one of another members also suggests to drop all uint8_t and uint16_t,
I shall drop them (more
Firstly, thank you very much for your response quickly!
On 5/12/15 00:55, Richard Henderson wrote:
On 05/10/2015 03:45 PM, Chen Gang wrote:
+static void gen_cmpltsi(struct DisasContext *dc,
+uint8_t rdst, uint8_t rsrc, int8_t imm8)
+{
+qemu_log_mask
On 5/12/15 00:01, Richard Henderson wrote:
On 05/10/2015 03:42 PM, Chen Gang wrote:
-static __inline unsigned int
+static inline uint8_t
get_BFEnd_X0(tilegx_bundle_bits num)
Do not change these casts to uint8_t. It's unnecessary churn.
For me, it is enough to return uint8_t
Generate related tcg instructions, and qemu tilegx runs to _init_malloc,
but causes assert in _init_malloc.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/translate.c | 2889 +
1 file changed, 2889 insertions(+)
create mode 100644
Add related configuration, make files for tilegx. Now, qemu tilegx can
pass building.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
configure | 2 ++
default-configs/tilegx-linux-user.mak | 1 +
target-tilegx/Makefile.objs | 1 +
3 files changed, 4
The related copy is from Linux kernel arch/tile/include/uapi/arch/
spr_def_64.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/spr_def_64.h | 216 +
1 file changed, 216 insertions(+)
create mode 100644 target-tilegx/spr_def_64.h
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/cpu.c | 143 +++
target-tilegx/cpu.h | 156
2 files changed, 299 insertions
Add several helpers for translation.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/helper.c | 41 +
target-tilegx/helper.h | 3 +++
2 files changed, 44 insertions(+)
create mode 100644 target-tilegx/helper.c
create mode 100644
It is copied from Linux kernel arch/tile/include/uapi/arch/
opcode_tilegx.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/opcode_tilegx.h | 1406 +
1 file changed, 1406 insertions(+)
create mode 100644 target-tilegx/opcode_tilegx.h
At present, it can run into glibc _init_malloc(), but cause assertion,
which should be fixed, next.
Since it already has quite a few of code, so send patches firstly, and
next, continue fixing the issue.
Chen Gang (10):
linux-user: tilegx: Firstly add architecture related features
linux
They are based on Linux kernel tilegx architecture for 64 bit binary,
and also based on tilegx ABI reference document, and also reference from
other targets implementations.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/tilegx/syscall.h| 35 +
linux-user/tilegx
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
include/elf.h | 2 +
linux-user/elfload.c | 23 +++
linux-user
Some of architectures (e.g. tilegx), several syscall macros are not
supported, so switch them.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/syscall.c | 50 +-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/linux
will have no any negative effect with our
current coding/reviewing, either no any negative effect for our next
coding/reviewing.
Thanks.
On 4/11/15 05:04, Chen Gang wrote:
+static const VMStateDescription vmstate_tilegx_cpu = {
+.name = cpu,
+.unmigratable = 1,
+};
I'd
On 5/8/15 11:14, Peter Maydell wrote:
On 7 May 2015 at 22:05, Chen Gang xili_gchen_5...@hotmail.com wrote:
Since no response, I assume that it is not suitable to send patches
before finish printing hello world successfully (when sending patches,
we should be sure of the patches are valuable
successfully and send patches within this
month.
Thanks.
On 5/3/15 22:30, Chen Gang wrote:
After spend two days, I fix the issue below: I misunderstood v4int_l
instruction, so cause this issue.
At present, I met mf (memory fence), I guess, we can just skip it, but I
am not quite sure, welcome
(it doesn't change quite much), if
suitable, I shall try to send patches to upstream for reviewing. Welcome
any ideas, suggestions and completions for it.
Thanks.
On 5/2/15 12:09, Chen Gang wrote:
Hello all:
At present, I met an issue (I guess, it should be my code bug), I am
analyzing it which may
.
Thanks.
On 5/2/15 10:42, Chen Gang wrote:
On 4/29/15 21:32, Chen Gang wrote:
On 4/29/15 05:43, Peter Maydell wrote:
On 28 April 2015 at 22:32, Chen Gang xili_gchen_5...@hotmail.com wrote:
The related information for cmpexch instruction:
Description
Compare the 8-byte contents
On 4/29/15 21:32, Chen Gang wrote:
On 4/29/15 05:43, Peter Maydell wrote:
On 28 April 2015 at 22:32, Chen Gang xili_gchen_5...@hotmail.com wrote:
The related information for cmpexch instruction:
Description
Compare the 8-byte contents of the CmpValue SPR with the 8-byte
value
On 4/29/15 05:43, Peter Maydell wrote:
On 28 April 2015 at 22:32, Chen Gang xili_gchen_5...@hotmail.com wrote:
The related information for cmpexch instruction:
Description
Compare the 8-byte contents of the CmpValue SPR with the 8-byte
value in memory at the address held
On 4/28/15 06:04, Richard Henderson wrote:
On 04/27/2015 02:12 PM, Chen Gang wrote:
Now, I am blocked at SPRs: mtspr SPR_CMPEXCH_VALUE %r12, and trying to
solve it.
SPR_CMPEXCH_VALUE should be present in your cpu structure, should be a TCGv
like all of your other registers, and this expands
On 4/29/15 04:19, Chen Gang wrote:
On 4/28/15 06:04, Richard Henderson wrote:
On 04/27/2015 02:12 PM, Chen Gang wrote:
Now, I am blocked at SPRs: mtspr SPR_CMPEXCH_VALUE %r12, and trying to
solve it.
SPR_CMPEXCH_VALUE should be present in your cpu structure, should be a TCGv
like all
trying to make a case for it internally, though.
Hello all:
Now, I am blocked at SPRs: mtspr SPR_CMPEXCH_VALUE %r12, and trying to
solve it.
And welcome any ideas, suggestions and completions for it.
Thanks.
On 2/15/2015 10:40 PM, Chen Gang S wrote:
Excuse me, I want to consult the related
On 4/26/15 03:30, Richard Henderson wrote:
On 04/25/2015 05:12 AM, Chen Gang wrote:
Hello All:
I want to consult an issue I met below for the latest master branch, is
it a qemu's bug? (it is about ctz/cnttz instruction for tilegx)
OP:
ld_i32 tmp0,env,$0xfffc
movi_i32
.
/* end: I add related printing log in tcg_reg_alloc_op() before assertion */
qemu-tilegx: /upstream/qemu/tcg/tcg.c:1982: tcg_reg_alloc_op: Assertion
`ts-val_type == 1' failed.
Welcome any ideas, suggestions and completions.
Thanks.
--
Chen Gang
Open, share, and attitude like air, water
On 4/22/15 05:31, Peter Maydell wrote:
On 21 April 2015 at 22:23, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 4/22/15 05:15, Peter Maydell wrote:
will work in place of both of the above (and does this CPU
really only have two kinds of compare-immediate? Some of the
case labels suggest
On 4/11/15 05:28, Chen Gang wrote:
On 4/10/15 06:19, Peter Maydell wrote:
On 27 March 2015 at 11:07, Chen Gang xili_gchen_5...@hotmail.com wrote:
+}
+
+static void gen_cmpltui(struct DisasContext *dc,
+uint8_t rdst, uint8_t rsrc, int8_t imm8)
+{
+qemu_log_mask
On 4/22/15 05:15, Peter Maydell wrote:
On 21 April 2015 at 22:01, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 4/11/15 05:28, Chen Gang wrote:
On 4/10/15 06:19, Peter Maydell wrote:
On 27 March 2015 at 11:07, Chen Gang xili_gchen_5...@hotmail.com wrote:
+}
+
+static void gen_cmpltui
On 4/11/15 05:51, Peter Maydell wrote:
On 10 April 2015 at 21:41, Chen Gang xili_gchen_5...@hotmail.com wrote:
On 4/10/15 05:31, Peter Maydell wrote:
On 27 March 2015 at 10:49, Chen Gang xili_gchen_5...@hotmail.com wrote:
+typedef struct target_sigaltstack {
+abi_ulong ss_sp
wrote:
On 27 March 2015 at 10:48, Chen Gang xili_gchen_5...@hotmail.com wrote:
They are based on Linux kernel tilegx architecture for 64 bit binary,
also based on tilegx ABI reference document.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
linux-user/tilegx/syscall.h| 80
On 4/10/15 05:31, Peter Maydell wrote:
On 27 March 2015 at 10:49, Chen Gang xili_gchen_5...@hotmail.com wrote:
[...]
+static inline void cpu_clone_regs(CPUTLGState *env, target_ulong newsp)
+{
+if (newsp) {
+env-regs[TILEGX_R_SP] = newsp;
+}
+env-regs[TILEGX_R_RE] = 0
On 4/10/15 05:38, Peter Maydell wrote:
On 27 March 2015 at 10:50, Chen Gang xili_gchen_5...@hotmail.com wrote:
[...]
+#elif defined(TARGET_TILEGX)
+
+/* Copy from Linux kernel uapi/asm-generic/stat.h */
+struct target_stat {
+abi_ulong st_dev; /* Device
On 4/10/15 05:44, Peter Maydell wrote:
On 27 March 2015 at 10:52, Chen Gang xili_gchen_5...@hotmail.com wrote:
[...]
+
+#define ELF_CLASS ELFCLASS64
+#define ELF_DATAELFDATA2LSB
+#define ELF_ARCHEM_TILEGX
+
+static inline void init_thread(struct target_pt_regs *regs
On 4/10/15 05:46, Peter Maydell wrote:
On 27 March 2015 at 10:53, Chen Gang xili_gchen_5...@hotmail.com wrote:
For tilegx, several syscall macros are not supported, so switch them to
avoid building break.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
+#ifdef TARGET_NR_getpgrp
On 4/10/15 05:55, Peter Maydell wrote:
On 27 March 2015 at 10:54, Chen Gang xili_gchen_5...@hotmail.com wrote:
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
---
target-tilegx/cpu-qom.h | 73
target-tilegx
On 4/10/15 06:03, Peter Maydell wrote:
On 27 March 2015 at 10:56, Chen Gang xili_gchen_5...@hotmail.com wrote:
It is from Tilera Corporation, and copied from Linux kernel arch/tile/
include/uapi/arch/opcode_tilegx.h.
Signed-off-by: Chen Gang gang.chen.5...@gmail.com
It's good to have
On 4/10/15 06:08, Peter Maydell wrote:
On 27 March 2015 at 10:57, Chen Gang xili_gchen_5...@hotmail.com wrote:
Finish processing tilegx bundle, and reach to related pipes.
+qemu_log_mask(LOG_UNIMP,
+ UNIMP y0, opcode %d, bundle [ FMT64X ]\n
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