On Wed, May 4, 2016 at 10:39 AM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> Hi everyone,
>
> On 04.05.2016 12:05, David Kiarie wrote:
>>
>> On Wed, May 4, 2016 at 9:12 AM, Jan Kiszka <jan.kis...@web.de> wrote:
>>>
>>> On 2016-04-3
On Wed, May 4, 2016 at 9:12 AM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-04-30 00:42, David Kiarie wrote:
>> These series adds AMD IOMMU support to Qemu. It's currently in the 9th
>> version.
>>
>> In this series I have (hopefully) addressed all the
On Sun, May 1, 2016 at 5:14 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Sat, Apr 30, 2016 at 01:42:40AM +0300, David Kiarie wrote:
>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>> The IOMMU does basic translation, error checking and has a
>> m
On Sun, May 1, 2016 at 5:00 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Sun, May 01, 2016 at 04:47:44PM +0300, Michael S. Tsirkin wrote:
>> On Sat, Apr 30, 2016 at 01:42:39AM +0300, David Kiarie wrote:
>> > These series adds AMD IOMMU support to Qemu. I
On Sun, May 1, 2016 at 4:45 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Sat, Apr 30, 2016 at 01:42:41AM +0300, David Kiarie wrote:
>> Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
>> depending on emulated IOMMU
>>
>> Signed-off-by: David Kiarie <d
Added an enum, subject to review, to machine properties which
it used to override iommu emulated from Intel to AMD.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 33 ++---
include/hw/boards.h | 1 +
include/h
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/acpi/aml-build.c | 2 +-
hw/acpi/core.c | 13 ---
hw/i386/acpi-build.c
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
These series adds AMD IOMMU support to Qemu. It's currently in the 9th version.
In this series I have (hopefully) addressed all the comments made in the
previous version.
I have also tested and successfully passed-through PCI device 'ac97' with more
devices to be tested.
David Kiarie (4
On Fri, Apr 29, 2016 at 9:09 AM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-04-25 00:12, David Kiarie wrote:
>> Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
>> depending on emulated IOMMU
>
> It seems you lack scope descriptions for the PCI device
On Thu, Apr 28, 2016 at 11:49 AM, Peter Xu wrote:
> On Thu, Apr 28, 2016 at 10:36:19AM +0200, Jan Kiszka wrote:
>> On 2016-04-28 10:29, Peter Xu wrote:
>> > On Thu, Apr 28, 2016 at 09:26:01AM +0200, Jan Kiszka wrote:
>> >> On 2016-04-28 09:05, Peter Xu wrote:
>> >>> This patch
Sorry, I keep missing Jan's email...
On Mon, Apr 25, 2016 at 1:12 AM, David Kiarie <davidkiar...@gmail.com> wrote:
> Hi all,
>
> The current AMD IOMMU patches that fixes Igor's comments. I got rid of
> structs and instead
> added individual integer fields into th
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/q35.c | 21 +++--
include/hw/i386/intel_iommu.h | 2 +-
2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pc
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/acpi/aml-build.c | 2 +-
hw/acpi/core.c | 13 --
hw/i386/acpi-build.c
Added a bool, subject to review to machine properties which
it used to override iommu emulated from Intel to AMD.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 32 +---
include/hw/boards.h | 1 +
include/h
Hi all,
The current AMD IOMMU patches that fixes Igor's comments. I got rid of structs
and instead
added individual integer fields into the table data directly, as suggested.
I have also got rid of some un-used macros and fixed a few other miscellaneous
things.
David Kiarie (4):
hw/i386
Added a bool, subject to review to machine properties which
it used to override iommu emulated from Intel to AMD.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 32 +---
include/hw/boards.h | 1 +
qemu-options.hx | 7 +--
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/q35.c | 21 +++--
include/hw/i386/intel_iommu.h | 1 +
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pc
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c | 98 ++-
include/hw/acpi/acpi-defs.h | 55
include/h
Hello all,
Long time no see, at usual ;)
AMD IOMMU patches fixing a few issues mentioned in previous version, formatting
errors and commit messages
David Kiarie (4):
hw/i386: Introduce AMD IOMMU
hw/i386: ACPI table for AMD IOMMU
hw/core: Add AMD IOMMU to machine properties
hw/pci-host
On Mon, Mar 14, 2016 at 11:40 AM, Marcel Apfelbaum <mar...@redhat.com> wrote:
> On 03/14/2016 02:24 AM, David Kiarie wrote:
>>
>> Add IOMMU as a string to machine properties which is
>> used to control whether and the type of IOMMU to emulate
>>
>>
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
mininal IOTLB implementation
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/q35.c | 21 +++--
include/hw/i386/intel_iommu.h | 1 +
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/q35.c b/hw/pc
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c | 98 ++-
include/hw/acpi/acpi-defs.h | 55
include/h
Add IOMMU as a string to machine properties which is
used to control whether and the type of IOMMU to emulate
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 27 ---
include/hw/boards.h | 1 +
qemu-options.hx | 7 +--
uti
much time. They were listed there mainly for purposes of listing the project.
I'd like to know if anyone is willing to mentor this project mainly the people
involved in the review process or anyone else!
David Kiarie (4):
hw/i386: Introduce AMD IOMMU
hw/i386: ACPI table for AMD IOMMU
hw/core
On Fri, Mar 11, 2016 at 4:22 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Sun, Feb 21, 2016 at 09:11:00PM +0300, David Kiarie wrote:
>> Add AMD IOMMU emulation support to q35 chipset
>>
>> Signed-off-by: David Kiarie <davidkiar...@gmail.com>
>> ---
On Thu, Mar 3, 2016 at 12:49 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Thu, Mar 03, 2016 at 01:04:31AM +0300, David Kiarie wrote:
>> On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin <m...@redhat.com> wrote:
>> > On Thu, Mar 03, 2016 at 12:09:
On Thu, Mar 3, 2016 at 3:06 PM, Marcel Apfelbaum <mar...@redhat.com> wrote:
> On 03/03/2016 02:02 PM, Marcel Apfelbaum wrote:
>>
>> On 03/03/2016 01:47 PM, David Kiarie wrote:
>>>
>>> On Thu, Mar 3, 2016 at 12:49 PM, Michael S. Tsirkin <m...@redhat.com&
On Thu, Mar 3, 2016 at 12:49 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Thu, Mar 03, 2016 at 01:04:31AM +0300, David Kiarie wrote:
>> On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin <m...@redhat.com> wrote:
>> > On Thu, Mar 03, 2016 at 12:09:
On Thu, Mar 3, 2016 at 12:17 AM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Thu, Mar 03, 2016 at 12:09:28AM +0300, David Kiarie wrote:
>>
>>
>> On 22/02/16 14:22, Marcel Apfelbaum wrote:
>> >On 02/21/2016 08:11 PM, David Kiarie wrote:
>> >&g
On 01/03/16 16:48, Jan Kiszka wrote:
On 2016-03-01 14:07, Michael S. Tsirkin wrote:
On Sun, Feb 21, 2016 at 09:10:56PM +0300, David Kiarie wrote:
Hello there,
Repost, AMD IOMMU patches version 6.
Changes since version 5
-Fixed macro formating issues
-changed occurences of IO MMU
On 21/02/16 23:09, Jan Kiszka wrote:
On 2016-02-21 19:10, David Kiarie wrote:
diff --git a/qemu-options.hx b/qemu-options.hx
index 2f0465e..dad160f 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -38,7 +38,7 @@ DEF("machine", HAS_ARG, QEMU_OPTI
On 25/02/16 18:43, Marcel Apfelbaum wrote:
On 02/21/2016 08:10 PM, David Kiarie wrote:
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
mininal IOTLB implementation
Hi,
Signed-off-by: David Kiarie <davidkiar...@gmail.
On Wed, Mar 2, 2016 at 7:00 AM, David Kiarie <davidkiar...@gmail.com> wrote:
> On Fri, Feb 26, 2016 at 9:23 AM, David Kiarie <davidkiar...@gmail.com> wrote:
>> On Thu, Feb 25, 2016 at 6:43 PM, Marcel Apfelbaum <mar...@redhat.com> wrote:
>>> On 02/21/2016 08:10 P
On Fri, Feb 26, 2016 at 9:23 AM, David Kiarie <davidkiar...@gmail.com> wrote:
> On Thu, Feb 25, 2016 at 6:43 PM, Marcel Apfelbaum <mar...@redhat.com> wrote:
>> On 02/21/2016 08:10 PM, David Kiarie wrote:
>>>
>>> Add AMD IOMMU emulaton to Qemu in addition
On Thu, Feb 25, 2016 at 6:43 PM, Marcel Apfelbaum <mar...@redhat.com> wrote:
> On 02/21/2016 08:10 PM, David Kiarie wrote:
>>
>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>> The IOMMU does basic translation, error checking and has a
>> mini
On Mon, Feb 22, 2016 at 10:29 AM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-02-22 06:57, David Kiarie wrote:
>> On Sun, Feb 21, 2016 at 11:20 PM, Jan Kiszka <jan.kis...@web.de> wrote:
>>> On 2016-02-21 19:10, David Kiarie wrote:
>>>> Hello there,
>
On Sun, Feb 21, 2016 at 11:20 PM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-02-21 19:10, David Kiarie wrote:
>> Hello there,
>>
>> Repost, AMD IOMMU patches version 6.
>>
>> Changes since version 5
>> -Fixed macro formating issues
>> -ch
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c| 98 -
include/hw/acpi/acpi-defs.h | 55 +
2 files c
On Sun, Feb 21, 2016 at 9:20 PM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-02-21 19:10, David Kiarie wrote:
>> Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
>> depending on emulated IOMMU
>>
>> Signed-off-by: David Kiarie <davidkiar...@gmail.
Add AMD IOMMU emulation support to q35 chipset
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/piix.c| 1 +
hw/pci-host/q35.c | 14 --
include/hw/i386/intel_iommu.h | 1 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
The IOMMU does basic translation, error checking and has a
mininal IOTLB implementation
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR
depending on emulated IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c| 208 +---
include/hw/acpi/acpi-defs.h | 55
2 files changed, 252 inse
Add IOMMU as a string to machine properties which is
used to control whether and the type of IOMMU to emulate
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 28
include/hw/boards.h | 3 ++-
qemu-options.hx | 6 +++---
uti
Hello there,
Repost, AMD IOMMU patches version 6.
Changes since version 5
-Fixed macro formating issues
-changed occurences of IO MMU to IOMMU for consistency
-Fixed capability registers duplication
-Rebased to current master
David Kiarie (4):
hw/i386: Introduce AMD IOMMU
hw/core: Add
Add AMD IO MMU emulation support to q35 chipset
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/piix.c| 1 +
hw/pci-host/q35.c | 14 --
include/hw/i386/intel_iommu.h | 1 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff
Add IVRS table for AMD IO MMU. Also reverve MMIO
region for IO MMU via ACPI
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c| 98 -
include/hw/acpi/acpi-defs.h | 55 +
2 files change
Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
The IO MMU does basic translation, error checking and has a
minimal IOTLB implementation.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
Add IO MMU as a string to machine properties which
is used to control whether and they type of IO MMU
to emulate
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 28
include/hw/boards.h | 3 ++-
qemu-options.hx | 6 +++---
I could
quickly send a clean patch.
Thanks!
David Kiarie (4):
hw/i386: Introduce AMD IO MMU
hw/core: Add AMD IO MMU to machine properties
hw/i386: ACPI table for AMD IO MMU
hw/pci-host: Emulate AMD IO MMU
hw/core/machine.c | 28 +-
hw/i386/Makefile.objs |1
On Mon, Feb 15, 2016 at 6:41 AM, David kiarie <davidkiar...@gmail.com> wrote:
> On Thu, Feb 4, 2016 at 6:03 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
>> On Mon, Jan 18, 2016 at 06:25:42PM +0300, David Kiarie wrote:
>>> Add AMD IO MMU emulation to Qemu in additi
On Thu, Feb 4, 2016 at 6:03 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Mon, Jan 18, 2016 at 06:25:42PM +0300, David Kiarie wrote:
>> Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
>> The IO MMU does basic translation, error checking and h
On Sun, Feb 14, 2016 at 4:07 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Sun, Feb 14, 2016 at 02:54:36PM +0200, Marcel Apfelbaum wrote:
>> On 01/18/2016 05:25 PM, David Kiarie wrote:
>> >Add IVRS table for AMD IO MMU.
>> >
>> >Signed-of
On Sun, Feb 14, 2016 at 4:02 PM, Marcel Apfelbaum
<marcel.apfelb...@gmail.com> wrote:
> On 01/18/2016 05:25 PM, David Kiarie wrote:
>>
>> Support AMD IO MMU emulation in q35 and piix chipsets
>>
>> Signed-off-by: David Kiarie <davidkiar...@gmail.com&
On Thu, Feb 4, 2016 at 6:03 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Mon, Jan 18, 2016 at 06:25:42PM +0300, David Kiarie wrote:
>> Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
>> The IO MMU does basic translation, error checking and h
David Kiarie (4):
hw/i386: Introduce AMD IO MMU
hw/core: Add AMD IO MMU to machine properties
hw/i386: ACPI table for AMD IO MMU
hw/pci-host: Emulate AMD IO MMU
hw/core/machine.c | 17 +-
hw/i386/Makefile.objs |1 +
hw/i386/acpi-build.c | 70 ++
hw
Add IO MMU as a string to machine properties which
is used to control whether and the type of IO MMU
to emulate
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 17 +
include/hw/boards.h | 3 ++-
include/hw/i386/intel_i
Add IVRS table for AMD IO MMU.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c| 70 +
include/hw/acpi/acpi-defs.h | 55 +++
2 files changed, 125 insertions(+)
diff --git a/h
Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
The IO MMU does basic translation, error checking and has a
minimal IOTLB implementation.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |1 +
hw/i386/amd_iommu.c
Support AMD IO MMU emulation in q35 and piix chipsets
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 14 --
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/
On 1/18/2016 8:27 PM, Marcel Apfelbaum wrote:
On 01/18/2016 06:48 PM, David Kiarie wrote:
On 1/18/2016 7:21 PM, Marcel Apfelbaum wrote:
On 01/18/2016 05:25 PM, David Kiarie wrote:
Add IO MMU as a string to machine properties which
is used to control whether and the type of IO MMU
On 1/17/2016 4:57 PM, Marcel Apfelbaum wrote:
On 01/14/2016 10:04 AM, David Kiarie wrote:
Support AMD IO MMU emulation in q35 and piix chipsets
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 16 ++--
2
On 1/18/2016 7:21 PM, Marcel Apfelbaum wrote:
On 01/18/2016 05:25 PM, David Kiarie wrote:
Add IO MMU as a string to machine properties which
is used to control whether and the type of IO MMU
to emulate
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/mac
; On Jan 14, 2016 9:29 PM, "Kevin O'Connor" <ke...@koconnor.net> wrote:
>>
>> On Thu, Jan 14, 2016 at 12:09:46PM +0200, Michael S. Tsirkin wrote:
>> > On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
>> > > Add IVRS table for AMD I
Add IVRS table for AMD IO MMU. Also reverve MMIO
region for IO MMU via ACPI
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c| 96 +
include/hw/acpi/acpi-defs.h | 55 ++
2 files change
Add IO MMU as a string to machine properties which
is used to control whether and they type of IO MMU
to emulate
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 17 +
include/hw/boards.h | 3 ++-
qemu-options.hx | 6 +++---
util/qemu-co
David Kiarie (4):
hw/core: Add AMD IO MMU to machine properties
hw/i386: ACPI table for AMD IO MMU
hw/pci-host: Emulate AMD IO MMU
hw/core/machine.c | 17 +-
hw/i386/Makefile.objs |1 +
hw/i386/acpi-build.c| 96 +++
hw/i386/amd_iommu.c | 1420
Support AMD IO MMU emulation in q35 and piix chipsets
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 16 ++--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/
From: David <davidkiar...@gmail.com>
Add AMD IO MMU emulation to Qemu in addition to Intel IO MMU.
The IO MMU does basic translation, error checking and has a
minimal IOTLB implementation.
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/Makefile.objs |
On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
>> Add IVRS table for AMD IO MMU. Also reverve MMIO
>
> reserve?
Yeah, typo.
>
>> region for IO MMU via ACPI
>
>
On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
> On Thu, Jan 14, 2016 at 11:04:27AM +0300, David Kiarie wrote:
>> Add IVRS table for AMD IO MMU. Also reverve MMIO
>
> reserve?
>
>> region for IO MMU via ACPI
>
>
> It does not
On Thu, Jan 14, 2016 at 6:42 PM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-01-14 16:39, Michael S. Tsirkin wrote:
>> On Thu, Jan 14, 2016 at 03:15:38PM +0300, David kiarie wrote:
>>> On Thu, Jan 14, 2016 at 1:09 PM, Michael S. Tsirkin <m...@redhat.com> wrote:
&
On Thu, Jan 14, 2016 at 7:19 PM, Jan Kiszka <jan.kis...@web.de> wrote:
> On 2016-01-14 17:09, David kiarie wrote:
>> On Thu, Jan 14, 2016 at 6:42 PM, Jan Kiszka <jan.kis...@web.de> wrote:
>>> On 2016-01-14 16:39, Michael S. Tsirkin wrote:
>>>> On Thu, Jan
On Thu, Oct 8, 2015 at 9:10 PM, Marcel Apfelbaum
<marcel.apfelb...@gmail.com> wrote:
> On 10/09/2015 05:53 AM, David Kiarie wrote:
>>
>> From: David <davidkiar...@gmail.com>
>>
>> Add iommu to machine properties in preparation of introducing
>>
On Fri, Oct 9, 2015 at 10:17 AM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> Hi David,
>
> Thanks for your efforts.
>
>
> On 09.10.2015 07:53, David Kiarie wrote:
>>
>> David (4):
>>hw/core: Add iommu to machine properties
>>
On Fri, Oct 9, 2015 at 3:24 PM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> On 09.10.2015 17:22, David kiarie wrote:
>>
>> On Fri, Oct 9, 2015 at 10:17 AM, Valentine Sinitsyn
>> <valentine.sinit...@gmail.com> wrote:
>>>
>
On Thu, Oct 8, 2015 at 9:24 PM, Marcel Apfelbaum
<marcel.apfelb...@gmail.com> wrote:
> On 10/09/2015 05:53 AM, David Kiarie wrote:
>>
>> From: David <davidkiar...@gmail.com>
>>
>> Introduce basic AMD IOMMU emulation in Qemu. IOMMU implements event
>>
From: David <davidkiar...@gmail.com>
Emulate AMD IOMMU on PIIX and Q35 controlled by a command line
switch
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/pci-host/piix.c | 10 ++
hw/pci-host/q35.c | 10 ++
2 files changed, 20 insertions(+)
diff --git a
From: David <davidkiar...@gmail.com>
Add AMD IOMMU IVRS table to ACPI tables
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/i386/acpi-build.c| 85 +
include/hw/acpi/acpi-defs.h | 55 +
2 f
From: David <davidkiar...@gmail.com>
Add iommu to machine properties in preparation of introducing
AMD IOMMU
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
---
hw/core/machine.c | 25 +
include/hw/boards.h | 2 ++
2 files changed, 27 insertions(+)
From: David <davidkiar...@gmail.com>
Introduce basic AMD IOMMU emulation in Qemu. IOMMU implements event logging and
host translation which should allow nested PCI passthrough.It also implemented
a very basic IOTLB implementation
Signed-off-by: David Kiarie <davidkiar...@gmail.com>
David (4):
hw/core: Add iommu to machine properties
hw/pci-host: Add AMD IOMMU to PIIX and Q35 pcs
hw/i386: Introduce AMD IOMMU
hw/acpi: ACPI table for AMD IOMMU
hw/core/machine.c | 25 +
hw/i386/Makefile.objs |1 +
hw/i386/acpi-build.c| 85 +++
On Wed, Sep 9, 2015 at 8:01 AM, Rita Sinha wrote:
> Hi David,
>
> Please find my response inline.
>
>
>>
>> Hi all,
>>
>> Most recent work is here
>> http://lists.nongnu.org/archive/html/qemu-devel/2015-08/msg02759.html
>> . Most the code is Qemu device boilerplate(so
On Wed, Sep 9, 2015 at 11:14 AM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> Oops, that was a long ago. Sorry & thanks.
No problem.
Will fix all other comments.
>
> Valentine
>
>
> On 09.09.2015 13:12, David kiarie wrote:
>>
>> I wrote som
integrated with QEMU.
>
> On 25.08.2015 04:19, David Kiarie wrote:
>>
>> From: David <davidkiar...@gmail.com>
>>
>> Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
>> emulation that only does translation and some basic Event logging.
>&
On Wed, Sep 9, 2015 at 9:47 AM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> Hi all,
>
>
> On 09.09.2015 09:23, David kiarie wrote:
>>
>> On Wed, Sep 9, 2015 at 12:35 AM, Jan Kiszka <jan.kis...@web.de> wrote:
>>>
>>> [thanks for
On Wed, Sep 9, 2015 at 10:45 AM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> On 09.09.2015 12:30, David kiarie wrote:
> ...snip...
>
>
>>>> +static void amd_iommu_cmdbuf_exec(AMDIOMMUState *s)
>>>> +{
>>>> +u
I wrote something basic on the cover letter
http://lists.nongnu.org/archive/html/qemu-devel/2015-08/msg02759.html
On Wed, Sep 9, 2015 at 11:07 AM, Valentine Sinitsyn
<valentine.sinit...@gmail.com> wrote:
> On 09.09.2015 12:59, David kiarie wrote:
>>
>> On Wed, Sep 9, 2015 a
On Wed, Sep 9, 2015 at 12:35 AM, Jan Kiszka wrote:
> [thanks for forwarding, Peter]
>
> Hi Rita,
>
> On 2015-09-08 10:11, Peter Maydell wrote:
>> On 7 September 2015 at 22:31, Rita Sinha wrote:
>>> Hi Jan,
>>>
>>> I am interested in participating in
Also, am not sure what HATS, GATS and sizes of virtual addresses(for
both guest and host) I should be using.
On Tue, Aug 25, 2015 at 10:41 AM, David kiarie davidkiar...@gmail.com wrote:
On Tue, Aug 25, 2015 at 10:31 AM, Valentine Sinitsyn
valentine.sinit...@gmail.com wrote:
On 25.08.2015 12
On Tue, Aug 25, 2015 at 9:39 AM, Valentine Sinitsyn
valentine.sinit...@gmail.com wrote:
Hi,
On 25.08.2015 04:19, David Kiarie wrote:
From: David davidkiar...@gmail.com
Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
emulation that only does translation and some basic Event
On Tue, Aug 25, 2015 at 10:31 AM, Valentine Sinitsyn
valentine.sinit...@gmail.com wrote:
On 25.08.2015 12:25, David kiarie wrote:
On Tue, Aug 25, 2015 at 9:39 AM, Valentine Sinitsyn
valentine.sinit...@gmail.com wrote:
Hi,
On 25.08.2015 04:19, David Kiarie wrote:
From: David davidkiar
From: David davidkiar...@gmail.com
Add AMD IOMMU emulation to q35 and PIIX chipsets.
Signed-off-by: David Kiarie davidkiar...@gmail.com
---
hw/pci-host/piix.c | 11 +++
hw/pci-host/q35.c | 11 +++
2 files changed, 22 insertions(+)
diff --git a/hw/pci-host/piix.c b/hw/pci-host
From: David davidkiar...@gmail.com
Add IVRS table for AMD IOMMU. Table indicates that all devices will be
translated by the IOMMU, features common to all IOMMUs and IVDB for the
IOMMU to be emulated
Signed-off-by: David Kiarie davidkiar...@gmail.com
---
hw/i386/acpi-build.c| 85
From: David davidkiar...@gmail.com
Add AMD IOMMU as one of the devices that can possibly be
emulated by Qemu. Also, add some helper functions for
manipulating presence/absence of IOMMU
Signed-off-by: David Kiarie davidkiar...@gmail.com
---
hw/core/machine.c | 25
This series implements basic AMD IOMMU emulation to Qemu
AMD IOMMU emulation.
-This series emulates AMD IOMMU on qemu. It implements the following features
-Translation - 4K pages
-Event logging - particulary fault logging.
-AMD IOMMU, being a convectional PCI device doesn't
From: David davidkiar...@gmail.com
Add AMD IOMMU emulation to Qemu. This is a very basic AMD IOMMU
emulation that only does translation and some basic Event logging.
Guest translation enables nested PCI passthrough
Signed-off-by: David Kiarie davidkiar...@gmail.com
---
hw/i386/Makefile.objs
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