On Tue, Dec 04, 2018 at 18:34:18 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
(snip)
> > Note that the IBM and ARM machines benefit from having
> > HARDFLOAT_2F{32,64}_USE_FP set to 0. Otherwise their performance
> > can suffer significantly:
>
> Is th
On Tue, Dec 04, 2018 at 13:52:16 +, Alex Bennée wrote:
> > We could always
> >
> > #ifdef __FAST_MATH__
> > #error "Silliness like this will get you nowhere"
> > #endif
>
> Emilio, are you happy to add that guard with a suitable pithy comment?
Isn't it better to just disable hardfloat then?
On Fri, Nov 30, 2018 at 08:15:56 +0100, Laurent Desnogues wrote:
> On Fri, Nov 30, 2018 at 4:00 AM Emilio G. Cota wrote:
> >
> > On Thu, Nov 29, 2018 at 19:39:15 -0500, Emilio G. Cota wrote:
> > > A64 and POWER9 host numbers:
> > >
> > > https://img
On Thu, Nov 29, 2018 at 19:39:15 -0500, Emilio G. Cota wrote:
> A64 and POWER9 host numbers:
>
> https://imgur.com/a/m6Pss99
>
> There's quite a bit of noise in the P9 measurements, but it's
> a shared machine so I can't do much about that.
>
> I'll update the A64
On Thu, Nov 29, 2018 at 11:23:09 -0800, Richard Henderson wrote:
> On 11/28/18 2:15 PM, Emilio G. Cota wrote:
> > Unfortunately, it doesn't seem to help, performance-wise.
>
> That is really disappointing, considering the size gains are huge -- even more
> dramatically for
On Thu, Nov 29, 2018 at 12:00:55 -0500, Emilio G. Cota wrote:
> On Thu, Nov 29, 2018 at 12:57:16 +0300, Roman Bolshakov wrote:
> > Hi Emilio,
> >
> > I think there's an issue with "\s" character class, it's not recognized
> > by macOS sed and I'm getting inc
On Thu, Nov 29, 2018 at 12:57:16 +0300, Roman Bolshakov wrote:
> Hi Emilio,
>
> I think there's an issue with "\s" character class, it's not recognized
> by macOS sed and I'm getting incorrect lines in
> qemu-plugins-ld64.symbols:
> _ qemu_xxx
> _ qemu_xyz
>
> After I replaced "\s" with
On Tue, Nov 27, 2018 at 21:38:22 -0800, Richard Henderson wrote:
> The intent here is to remove several move insns putting the
> function arguments into the proper place. I'm hoping that
> this will solve the skylake regression with spec2006, as
> seen with the ool softmmu patch set.
>
> Emilio,
should
> be applied only to qemu-system?
I just pushed to the same github branch the appended fixup.
The idea is to only add the linker flags when the output
binary links plugin.o.
Can you please test?
Thanks,
Emilio
---
commit 8f45416b79765b66e5ce0fca7db93b97bbcfcfbb
Author: Emi
Signed-off-by: Emilio G. Cota
---
docs/devel/build-system.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/devel/build-system.txt b/docs/devel/build-system.txt
index 52501f2ad9..f9fd27fab0 100644
--- a/docs/devel/build-system.txt
+++ b/docs/devel/build-system.txt
On Wed, Nov 28, 2018 at 12:50:23 +, Alex Bennée wrote:
> Emilio G. Cota writes:
> > I just wrote some code to go over the list and add TB callbacks,
> > which go right before the first insn_start Op. The code is hack-ish
> > in that we first generate the TCG ops we
On Wed, Nov 28, 2018 at 11:28:11 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Signed-off-by: Emilio G. Cota
> > ---
> > plugin-examples/bbcount_avgsize_racy.c | 50 ++
> > plugin-examples/mem_count_racy_both.c | 58 +
On Wed, Nov 28, 2018 at 12:40:23 +, Alex Bennée wrote:
> I was envisioning something more like the following so all the plugin
> gubins could be kept in the core code:
(snip)
> static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
> bool
On Tue, Nov 27, 2018 at 14:06:57 -0500, Emilio G. Cota wrote:
> On Tue, Nov 27, 2018 at 14:48:11 +, Alex Bennée wrote:
> > With a little tweaking to the TCG we could then insert
> > our instrumentation at the end of the pass with all the knowledge we
> > want to
On Tue, Nov 27, 2018 at 19:54:02 -0500, Emilio G. Cota wrote:
> To avoid altering the signature of .translate_insn, I've modified
> arm_ldl_code directly, as follows:
>
> uint32_t insn = cpu_ldl_code(env, addr);
> +
> if (bswap_code(sctlr_b)) {
> -
On Mon, Nov 26, 2018 at 20:38:25 -0500, Emilio G. Cota wrote:
> On Mon, Nov 26, 2018 at 11:30:25 -0800, Richard Henderson wrote:
> > On 11/26/18 11:07 AM, Emilio G. Cota wrote:
> > > The main reason why I added the qemu_plugin_insn_append calls
> > > was to avoid rea
On Tue, Nov 27, 2018 at 15:43:52 +0300, Roman Bolshakov wrote:
> ld64 on macOS has similar -exported_symbols_list option. Here's the reference:
>
> -exported_symbols_list filename
> The specified filename contains a list of global symbol names
> that will remain as global symbols
On Tue, Nov 27, 2018 at 18:20:25 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Signed-off-by: Emilio G. Cota
>
> There are no users of this for now so I don't think this qualifies for a
> first cut of the plugin API.
Fair enough. It was more as
On Tue, Nov 27, 2018 at 14:48:11 +, Alex Bennée wrote:
> Emilio G. Cota writes:
> > On Mon, Nov 26, 2018 at 15:16:00 +, Alex Bennée wrote:
> >> Emilio G. Cota writes:
> > (snip)
> >> > +if (tb_trans_cb && first_pass) {
> >&
On Tue, Nov 27, 2018 at 09:24:21 -0800, no-re...@patchew.org wrote:
> /tmp/qemu-test/src/fpu/softfloat.c: In function 'f32_is_inf':
> /tmp/qemu-test/src/fpu/softfloat.c:325:16: error: implicit declaration of
> function 'isinff' [-Werror=implicit-function-declaration]
> return
On Tue, Nov 27, 2018 at 13:49:13 +0100, Christophe de Dinechin wrote:
> (I did not finish the review, but decided to send what I already had).
>
> > On 22 Nov 2018, at 08:20, guangrong.x...@gmail.com wrote:
> >
> > From: Xiao Guangrong
> >
> > This modules implements the lockless and efficient
On Tue, Nov 27, 2018 at 12:11:32 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > For now only add it for ELF platforms, since we rely on the linker's
> > --dynamic-list flag to pass a list of symbols to be exported to the
> > executable. An alternativ
On Mon, Nov 26, 2018 at 15:16:00 +, Alex Bennée wrote:
> Emilio G. Cota writes:
(snip)
> > +if (tb_trans_cb && first_pass) {
> > +qemu_plugin_tb_trans_cb(cpu, plugin_tb);
> > +first_pass = false;
> > +goto translate;
> > +
On Mon, Nov 26, 2018 at 11:30:25 -0800, Richard Henderson wrote:
> On 11/26/18 11:07 AM, Emilio G. Cota wrote:
> > The main reason why I added the qemu_plugin_insn_append calls
> > was to avoid reading the instructions twice from guest memory,
> > because I was worried that d
On Mon, Nov 26, 2018 at 11:17:27 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > On Fri, Nov 23, 2018 at 17:10:53 +, Alex Bennée wrote:
> >> Emilio G. Cota writes:
> > (snip)
> >> > @@ -1322,12 +1323,21 @@ static void qemu_
On Mon, Nov 26, 2018 at 11:21:13 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > On Thu, Nov 22, 2018 at 17:12:34 +, Alex Bennée wrote:
> >>
> >> Emilio G. Cota writes:
> >>
> >> > In preparation for plugin support.
>
On Mon, Nov 26, 2018 at 11:11:53 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > On Thu, Nov 22, 2018 at 17:09:22 +, Alex Bennée wrote:
> >>
> >> Emilio G. Cota writes:
> >>
> >> > This will be used by plugin code to flush th
On Mon, Nov 26, 2018 at 11:02:24 +, Alex Bennée wrote:
> Emilio G. Cota writes:
> > On Fri, Nov 23, 2018 at 17:00:59 +, Alex Bennée wrote:
> >> What is the purpose of letting the plugin know a flush has occurred?
> >
> > Plugins might allocate per-TB data
On Mon, Nov 26, 2018 at 10:27:12 -0800, Richard Henderson wrote:
> On 11/26/18 6:52 AM, Alex Bennée wrote:
> > I'm not convinced this is the best way to go about it. We end up having
> > to sprinkle the plugin calls into each decoder rather than keeping all
> > the infrastructure in the common
On Mon, Nov 26, 2018 at 15:57:25 +0800, Xiao Guangrong wrote:
>
>
> On 11/23/18 7:02 PM, Dr. David Alan Gilbert wrote:
>
> > > +#include "qemu/osdep.h"
> > > +#include "qemu/bitmap.h"
> > > +#include "qemu/threaded-workqueue.h"
> > > +
> > > +#define SMP_CACHE_BYTES 64
> >
> > That's
below.
On Mon, Nov 26, 2018 at 16:18:24 +0800, Xiao Guangrong wrote:
> On 11/24/18 8:17 AM, Emilio G. Cota wrote:
> > On Thu, Nov 22, 2018 at 15:20:25 +0800, guangrong.x...@gmail.com wrote:
> > > +static uint64_t get_free_request_bitmap(Threads *threads, ThreadLocal
>
On Fri, Nov 23, 2018 at 15:45:25 +0100, Richard Henderson wrote:
> This variant of tcg-ldst.inc.c allows the entire thunk to be
> moved out-of-line, with caching across TBs within a region.
>
> Signed-off-by: Richard Henderson
> ---
(snip)
> +++ b/tcg/tcg-ldst-ool.inc.c
(snip)
> +typedef struct
On Fri, Nov 23, 2018 at 15:45:21 +0100, Richard Henderson wrote:
> This includes everything queued so far -- softmmu out-of-line
> patches
Reviewed-by: Emilio G. Cota
for patches 1-9.
I am sad to report that on a Skylake host, this series gives
a ~10% average slowdown for x86_64-s
On Sun, Nov 25, 2018 at 01:25:25 +0100, Aleksandar Markovic wrote:
> > Note: some architectures (at least PPC, there might be others) clear
> > the status flags passed to softfloat before most FP operations. This
> > precludes the use of hardfloat, so to avoid introducing a performance
> >
4 +-+..@@@&==@.@&.=.+before +-+
3 +-+..@.@&.=@.@&.=.+ad@@@&== +-+
2.5 +-+.##$$%%.@&.=@.@&.=.....+ @m@& = +-+
2 +-+@@@&==.***#.$.%.@&.=.***#$$%%.@&.=.***#$$%%d@
to disable hardfloat.
In the long run though it would be good to fix the targets so that
at least the inexact flag passed to softfloat is indeed sticky.
Signed-off-by: Emilio G. Cota
---
fpu/softfloat.c | 315
1 file changed, 315 insertions(+)
diff
machine, having 2F64 set to 1 pays off, but it
doesn't for 2F32:
- Intel i7-6700K:
add-single: [1] 285.79 vs [0] 426.70 MFlops
add-double: [1] 302.15 vs [0] 278.82 MFlops
Signed-off-by: Emilio G. Cota
---
fpu/softfloat.c | 117
1 file changed, 98
:
mul-single: 73.41 MFlops
mul-double: 76.93 MFlops
3. IBM POWER8E @ 2.1 GHz
- before:
mul-single: 58.40 MFlops
mul-double: 59.33 MFlops
- after:
mul-single: 60.25 MFlops
mul-double: 94.79 MFlops
Signed-off-by: Emilio G. Cota
---
fpu/softfloat.c | 54
:
fma-single: 66.14 MFlops
fma-double: 63.10 MFlops
3. IBM POWER8E @ 2.1 GHz
- before:
fma-single: 37.26 MFlops
fma-double: 37.29 MFlops
- after:
fma-single: 48.90 MFlops
fma-double: 59.51 MFlops
Here having 3FP64 set to 1 pays off for x86_64:
[1] 170.15 vs [0] 153.12 MFlops
Signed-off-by: Emilio G
r-mode).
Signed-off-by: Emilio G. Cota
---
tests/fp/fp-bench.c | 630
tests/fp/.gitignore | 1 +
tests/fp/Makefile | 5 +-
3 files changed, 635 insertions(+), 1 deletion(-)
create mode 100644 tests/fp/fp-bench.c
diff --git a/tests/fp/fp-b
Reviewed-by: Bastian Koppelmann
Signed-off-by: Emilio G. Cota
---
target/tricore/fpu_helper.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c
index df162902d6..31df462e4a 100644
--- a/target/tricore
ann
Tested-by: Bastian Koppelmann
Signed-off-by: Emilio G. Cota
---
fpu/softfloat.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index e1eef954e6..ecdc00c633 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -336,8 +336,8 @@ sta
G. Cota
---
fpu/softfloat.c | 64 +++--
1 file changed, 62 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 58e67d9b80..e35ebfaae7 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1624,7 +1624,8 @@ float16
F v
[...]
- After:
In 6133248 tests, no errors found in f64_mulAdd, rounding near_even, tininess
before rounding.
[...]
Signed-off-by: Emilio G. Cota
---
tests/fp/Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/fp/Makefile b/tests/fp/Makefile
index d649a5a1db..49cdcd1bd2 100
v5: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02793.html
Changes since v5:
- Rebase on rth/tcg-next-for-4.0
- Use QEMU_FLATTEN instead of __attribute__((flatten))
- Merge rth's cleanups (thanks!). With this, we now use a union to
hold {float|float32} or {double|float64} types,
to ~300 MFlops.
Signed-off-by: Emilio G. Cota
---
fpu/softfloat.c | 60 +++--
1 file changed, 58 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index e03feafb6f..4c6ecd1883 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
This paves the way for upcoming work.
Reviewed-by: Bastian Koppelmann
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/fpu/softfloat.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 8fd9f9bbae
These will gain some users very soon.
Signed-off-by: Emilio G. Cota
---
include/fpu/softfloat.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index 9eeccd88a5..38a5e99cf3 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu
On Thu, Nov 22, 2018 at 15:20:25 +0800, guangrong.x...@gmail.com wrote:
> +static uint64_t get_free_request_bitmap(Threads *threads, ThreadLocal
> *thread)
> +{
> +uint64_t request_fill_bitmap, request_done_bitmap, result_bitmap;
> +
> +request_fill_bitmap =
On Thu, Nov 22, 2018 at 15:20:25 +0800, guangrong.x...@gmail.com wrote:
> + /*
> + * the bit in these two bitmaps indicates the index of the ＠requests
This @ is not ASCII, is it?
> + * respectively. If it's the same, the corresponding request is free
> + * and owned by the user,
On Thu, Nov 22, 2018 at 17:12:34 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > In preparation for plugin support.
> >
> > Signed-off-by: Emilio G. Cota
>
> More macros for the macro-god. I guess this works but I wonder if it's
> pos
On Fri, Nov 23, 2018 at 17:04:28 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Signed-off-by: Emilio G. Cota
> > ---
> > bsd-user/syscall.c | 9 +
> > linux-user/syscall.c | 3 +++
> > 2 files changed, 12 insertions(+)
> >
&
On Fri, Nov 23, 2018 at 16:52:31 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Signed-off-by: Emilio G. Cota
>
> This commit message needs more description. What is this plugin mask
> for? Are we extending the TB flags with a mask of loaded plugins so we
On Fri, Nov 23, 2018 at 17:10:53 +, Alex Bennée wrote:
> Emilio G. Cota writes:
(snip)
> > @@ -1322,12 +1323,21 @@ static void qemu_tcg_rr_wait_io_event(CPUState *cpu)
> >
> > static void qemu_wait_io_event(CPUState *cpu)
> > {
> > +bool asleep =
On Thu, Nov 22, 2018 at 17:09:22 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > This will be used by plugin code to flush the code cache as well
> > as doing other bookkeeping in a safe work environment.
>
> This seems a little excessive given the
On Fri, Nov 23, 2018 at 17:00:59 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Signed-off-by: Emilio G. Cota
> > ---
> > accel/tcg/translate-all.c | 6 ++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/accel/tcg/translat
(Plus a qht-bench trivial patch.)
Note that these apply on top of rth's tcg-next-for-4.0.
Thanks,
Emilio
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/exec/tb-hash.h | 2 +-
include/{exec/tb-hash-xx.h => qemu/xxhash.h} | 6 +++---
tests/qht-bench.c| 2 +-
util/qsp.c | 2 +-
4 files changed
Before moving them all to include/qemu/xxhash.h.
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
---
include/exec/tb-hash-xx.h | 41 +--
include/exec/tb-hash.h| 2 +-
tests/qht-bench.c | 2 +-
util/qsp.c| 12
Which we forgot to do in bd224fce60 ("qht-bench: add -p flag
to precompute hash values", 2018-09-26).
Signed-off-by: Emilio G. Cota
---
tests/qht-bench.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qht-bench.c b/tests/qht-bench.c
index 2089e2bed1..636750d39f 100644
--- a
Change the order in which we extract a/b and c/d to
match the output of the upstream xxhash32.
Tested with:
https://github.com/cota/xxhash/tree/qemu
Signed-off-by: Emilio G. Cota
---
include/qemu/xxhash.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include
On Thu, Nov 22, 2018 at 17:15:20 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > It will be used for TB hashing soon.
> >
> > Signed-off-by: Emilio G. Cota
> > ---
> > include/qemu/xxhash.h | 40 +++-
&g
On Tue, Nov 20, 2018 at 18:25:25 +0800, Xiao Guangrong wrote:
> On 11/14/18 2:38 AM, Emilio G. Cota wrote:
> > On Tue, Nov 06, 2018 at 20:20:22 +0800, guangrong.x...@gmail.com wrote:
> > > From: Xiao Guangrong
(snip)
> > Batching achieves higher performance at high cor
On Fri, Nov 16, 2018 at 14:55:01 +0100, Etienne Dublé wrote:
(snip)
> So the idea is: what if we could share the cache of code already translated
> between all those processes?
> There would be sereral ways to achieve this:
> * use a shared memory area for the cache, and locking mechanisms.
> *
On Fri, Nov 16, 2018 at 09:10:32 +0100, Richard Henderson wrote:
> On 11/16/18 2:13 AM, Emilio G. Cota wrote:
> > This allows us to discard most TBs; in the example above,
> > we end up *not* discarding only ~70 TBs, that is we end up keeping
> > only 70/2500 = 2.8% of the
On Fri, Nov 16, 2018 at 09:07:50 +0100, Richard Henderson wrote:
> On 11/16/18 6:10 AM, Emilio G. Cota wrote:
> > It's possible that newer machines with larger reorder buffers
> > will be able to take better advantage of the higher instruction
> > locality, hiding the latency
On Thu, Nov 15, 2018 at 20:13:38 -0500, Emilio G. Cota wrote:
> I'll generate now some more perf numbers that we could include in the
> commit logs.
SPEC numbers are a net perf decrease, unfortunately:
Softmmu speedup for SPEC06int (test set)
On Thu, Nov 15, 2018 at 23:04:50 +0100, Richard Henderson wrote:
> On 11/15/18 7:48 PM, Emilio G. Cota wrote:
> > - Segfault in code_gen_buffer. This one I don't have a fix for,
> > but it's *much* easier to reproduce when -tb-size is very small,
> > e.g. "-tb-size
On Fri, Nov 16, 2018 at 00:15:53 +0100, Paolo Bonzini wrote:
> On 14/11/2018 20:42, Emilio G. Cota wrote:
> > On Wed, Nov 14, 2018 at 12:44:00 +0100, Paolo Bonzini wrote:
> >> This avoids the following deadlock:
> >>
> >> 1) a thread cal
On Thu, Nov 15, 2018 at 12:32:00 +0100, Richard Henderson wrote:
> On 11/14/18 2:00 AM, Emilio G. Cota wrote:
> > The following might be related: I'm seeing segfaults with -smp 8
> > and beyond when doing bootup+shutdown of an aarch64 guest on
> > an x86-64 host
On Wed, Nov 14, 2018 at 12:44:00 +0100, Paolo Bonzini wrote:
> This avoids the following deadlock:
>
> 1) a thread calls run_on_cpu for CPU 2 from a timer, and single_tcg_halt_cond
> is signaled
>
> 2) CPU 1 is running and exits. It finds no work item and enters CPU 2
>
> 3) because the I/O
On Wed, Nov 14, 2018 at 16:43:22 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Signed-off-by: Emilio G. Cota
> > ---
>
> >
> > void cpu_interrupt(CPUState *cpu, int mask);
> > diff --git a/cpus.c b/cpus.c
> > index 3efe89354d..a44
On Wed, Nov 14, 2018 at 17:01:13 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > In preparation for adding plugin support. One of the clean-up
> > actions when uninstalling plugins will be to flush the code
> > cache. We'll also have to clear the runt
On Wed, Nov 14, 2018 at 16:11:35 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
(snip)
> I needed to do this:
>
> modified tcg/tcg.c
> @@ -884,7 +884,7 @@ static TCGTemp *tcg_global_reg_new_internal(TCGContext
> *s, TCGType type,
>
> static inline uint32_t
On Wed, Nov 14, 2018 at 14:41:53 +, Alex Bennée wrote:
> Emilio G. Cota writes:
(snip)
> > -static GHashTable *helper_table;
> > +static struct qht helper_table;
> > +static bool helper_table_inited;
>
> Having a flag for initialisation seems a little excessiv
On Wed, Nov 14, 2018 at 13:03:19 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > This will allow us to trace 16B-long memory accesses.
> >
> > While at it, add some defines for the mem_info bits and simplify
> > trace_mem_get_info by making it a wr
On Wed, Nov 14, 2018 at 11:30:19 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > This allows us to queue synchronous CPU work without the BQL.
> >
> > Will gain a user soon.
>
> This is also in the cpu-lock series right?
No, in the cpu-lock seri
On Mon, Nov 12, 2018 at 22:44:46 +0100, Richard Henderson wrote:
> Based on an idea forwarded by Emilio, which suggests a 5-6%
> speed gain is possible. I have not spent too much time
> measuring this, as the code size gains are significant.
Nice!
> I believe that I posted an x86_64-only patch
On Tue, Nov 06, 2018 at 20:20:22 +0800, guangrong.x...@gmail.com wrote:
> From: Xiao Guangrong
>
> This modules implements the lockless and efficient threaded workqueue.
(snip)
> +++ b/util/threaded-workqueue.c
> +struct Threads {
> +/*
> + * in order to avoid contention, the @requests
On Fri, Nov 09, 2018 at 10:30:01 -0500, Cleber Rosa wrote:
> To be fully honest, this may not be a OSX (alone) condition, but may
> be a situation that only happens with OSX on Travis-CI, were resources
> are quite limited.
>
> I have personal experience with tests that exercise parallelism or
>
Cc'ing Fredrik, who I think was the intended recipient of the below.
E.
On Thu, Nov 01, 2018 at 11:06:30 +, Aleksandar Markovic wrote:
> Hi, Fridrik,
>
> I did some closer code inspection of R5900 in last few days, and I noticed
> some sub-optimal implementation in the area
On Wed, Oct 31, 2018 at 16:13:05 +, Alex Bennée wrote:
> > @@ -353,10 +355,12 @@ void s390_cpu_unhalt(S390CPU *cpu)
> > CPUState *cs = CPU(cpu);
> > trace_cpu_unhalt(cs->cpu_index);
> >
> > -if (cs->halted) {
> > -cs->halted = 0;
> > +cpu_mutex_lock(cs);
> > +if
On Wed, Oct 31, 2018 at 13:54:14 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Cc: Aurelien Jarno
> > Reviewed-by: Richard Henderson
> > Signed-off-by: Emilio G. Cota
> > ---
> > target/sh4/op_helper.c | 2 +-
> > 1 file changed, 1 i
known type name
> ‘int64_t’
> int64_t atomic_read_i64(const int64_t *ptr);
(snip)
> (regression from 782da5b2921c4d18777d5d5bd9385b9f7beae360)
>
> Signed-off-by: Marc-André Lureau
Reviewed-by: Emilio G. Cota
Thanks,
Emilio
nd the one it depends on (tlb-dirty). I had
yesterday a guest running parallel compilation jobs for ~12h with
no issues. So
Tested-by: Emilio G. Cota
for this and the tlb-dirty series.
Richard: the crash I reported on IRC must have been due to unrelated
changes. I was testing some TLB expe
On Mon, Oct 29, 2018 at 16:34:49 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > We don't pass a pointer to qemu_global_mutex anymore.
> >
> > Reviewed-by: Richard Henderson
> > Signed-off-by: Emilio G. Cota
>
> As discussed on IRC I d
On Mon, Oct 29, 2018 at 12:48:05 +0300, Pavel Dovgalyuk wrote:
> > From: Emilio G. Cota [mailto:c...@braap.org]
> > - 2-pass translation. Once a "TB translation" callback is called,
> > the plugin must know the span of the TB. We should not
> > force plug
On Mon, Oct 29, 2018 at 13:59:03 +0300, Pavel Dovgalyuk wrote:
> > From: Emilio G. Cota [mailto:c...@braap.org]
> > Signed-off-by: Emilio G. Cota
(snip)
> Thanks for the series.
> Can you provide more plugin examples for better understanding of
> double-translate idea?
>
On Sat, Oct 27, 2018 at 10:14:47 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > [I forgot to add the cover letter to git send-email; here it is]
> >
> > v3: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg04179.html
> >
> > "Why i
On Mon, Oct 29, 2018 at 15:39:29 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
(snip)
> > @@ -357,7 +357,7 @@ struct CPUState {
> > sigjmp_buf jmp_env;
> >
> > QemuMutex work_mutex;
> > -struct qemu_work_item *queued_work_first, *queu
On Tue, Oct 23, 2018 at 08:02:47 +0100, Richard Henderson wrote:
> +static void tlb_flush_page_locked(CPUArchState *env, int midx,
> + target_ulong addr)
> +{
> +target_ulong lp_addr = env->tlb_d[midx].large_page_addr;
> +target_ulong lp_mask =
On Wed, Oct 17, 2018 at 12:10:15 +0200, Paolo Bonzini wrote:
> On 16/10/2018 13:10, guangrong.x...@gmail.com wrote:
> An idea: the total number of requests is going to be very small, and a
> PtrRing is not the nicest data structure for multiple producer/single
> consumer. So you could instead:
On Fri, Oct 26, 2018 at 14:39:21 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Cc: Peter Maydell
>
> This will need to catch-up in the next re-base as there is a merge conflict.
Yep, this series is so long that I decided to keep the same
baseline as in v3,
On Tue, Oct 23, 2018 at 11:04:36 +0100, Laurent Vivier wrote:
> So, it would be helpful if any of you knowing that some patches have to
> be added to the pull request send me their list.
I sent this one in August:
linux-user: fix comment s/atomic_write/atomic_set/
For those of you who need some context: "plugins" are dynamic
libraries that are loaded at run-time. These plugins can
subscribe to interesting events (e.g. instruction execution)
via an API, to then do something interesting with them. This
functionality is similar to what other instrumentation
Signed-off-by: Emilio G. Cota
---
include/exec/tb-hash.h | 2 +-
include/{exec/tb-hash-xx.h => qemu/xxhash.h} | 6 +++---
tests/qht-bench.c| 2 +-
util/qsp.c | 2 +-
4 files changed, 6 insertions(+), 6 deleti
This takes the TCGHelperInfo directly, which will allow us to generate
helpers at run-time.
Signed-off-by: Emilio G. Cota
---
tcg/tcg.h | 2 ++
tcg/tcg.c | 50 +-
2 files changed, 47 insertions(+), 5 deletions(-)
diff --git a/tcg/tcg.h b/tcg
In preparation for plugin support.
Signed-off-by: Emilio G. Cota
---
accel/tcg/atomic_template.h | 92 +++--
1 file changed, 57 insertions(+), 35 deletions(-)
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index 8d177fefef..b13318c1ce
This will allow us to trace 16B-long memory accesses.
While at it, add some defines for the mem_info bits and simplify
trace_mem_get_info by making it a wrapper around trace_mem_build_info.
Signed-off-by: Emilio G. Cota
---
trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion
Signed-off-by: Emilio G. Cota
---
bsd-user/syscall.c | 3 +++
linux-user/exit.c | 1 +
2 files changed, 4 insertions(+)
diff --git a/bsd-user/syscall.c b/bsd-user/syscall.c
index 66492aaf5d..b7818af450 100644
--- a/bsd-user/syscall.c
+++ b/bsd-user/syscall.c
@@ -332,6 +332,7 @@ abi_long
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