Hi Paolo,
On 5/9/23 10:27 AM, Gavin Shan wrote:
For arm64 and riscv architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux guest. It's required that
the CPUs in one cluster can't span mutiple NUMA nodes. Otherwise, the Linux
scheduling domai
node boundary issues in qtests/numa-test (Gavin)
* Add helper set_numa_socket_boundary() and validate the
boundary in the generic path (Philippe)
Gavin Shan (3):
numa: Validate cluster and NUMA node boundary if required
hw/arm: Validate cluster and NUMA n
A
nodes.
Signed-off-by: Gavin Shan
Acked-by: Igor Mammedov
---
hw/arm/sbsa-ref.c | 2 ++
hw/arm/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 0b93558dde..efb380e7c8 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -864,6 +
odes.
Signed-off-by: Gavin Shan
Reviewed-by: Daniel Henrique Barboza
Acked-by: Igor Mammedov
---
hw/riscv/spike.c | 2 ++
hw/riscv/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 2c5546560a..81f7e53aed 100644
--- a/hw/riscv/spike.c
++
0x140
ret_from_fork+0x10/0x20
Improve the situation to warn when multiple CPUs in one cluster have
been associated with different NUMA nodes. However, one NUMA node is
allowed to be associated with different clusters.
Signed-off-by: Gavin Shan
Acked-by: Philippe Mathieu-Daudé
Acked-by: Igor Mammedov
--
Hi Igor,
On 4/13/23 7:21 PM, Igor Mammedov wrote:
On Thu, 13 Apr 2023 13:50:57 +0800
Gavin Shan wrote:
On 4/12/23 7:42 PM, Peter Maydell wrote:
On Wed, 12 Apr 2023 at 02:08, Gavin Shan wrote:
On 3/27/23 9:26 PM, Igor Mammedov wrote:
On Fri, 17 Mar 2023 14:25:39 +0800
Gavin Shan wrote
On 4/12/23 7:42 PM, Peter Maydell wrote:
On Wed, 12 Apr 2023 at 02:08, Gavin Shan wrote:
On 3/27/23 9:26 PM, Igor Mammedov wrote:
On Fri, 17 Mar 2023 14:25:39 +0800
Gavin Shan wrote:
For arm64 and riscv architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology
Hi Peter,
On 3/27/23 9:26 PM, Igor Mammedov wrote:
On Fri, 17 Mar 2023 14:25:39 +0800
Gavin Shan wrote:
For arm64 and riscv architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux guest. It's required that
the CPUs in one cluster can't sp
On 2/25/23 2:35 PM, Gavin Shan wrote:
For some architectures like ARM64, multiple CPUs in one cluster can be
associated with different NUMA nodes, which is irregular configuration
because we shouldn't have this in baremetal environment. The irregular
configuration causes Linux guest to misb
0x140
ret_from_fork+0x10/0x20
Improve the situation to warn when multiple CPUs in one cluster have
been associated with different NUMA nodes. However, one NUMA node is
allowed to be associated with different clusters.
Signed-off-by: Gavin Shan
Acked-by: Philippe Mathieu-Daudé
---
hw/core/machine.c
odes.
Signed-off-by: Gavin Shan
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/spike.c | 2 ++
hw/riscv/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index a584d5b3a2..4bf783884b 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -34
A
nodes.
Signed-off-by: Gavin Shan
---
hw/arm/sbsa-ref.c | 2 ++
hw/arm/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 0b93558dde..efb380e7c8 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -864,6 +864,8 @@ static void
v2 1/4] related to qtests/numa-test(Gavin)
v2:
* Fix socket-NUMA-node boundary issues in qtests/numa-test (Gavin)
* Add helper set_numa_socket_boundary() and validate the
boundary in the generic path (Philippe)
Gavin Shan (3):
numa: Validate clu
insertions(+), 10 deletions(-)
For hw/arm/virt.c:
Acked-by: Gavin Shan
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ac626b3bef74..267fe56fae76 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -3232,10 +3232,17 @@ static void machvirt_machine_init(void)
}
type_init
On 3/13/23 7:40 PM, Philippe Mathieu-Daudé wrote:
On 25/2/23 07:35, Gavin Shan wrote:
For some architectures like ARM64, multiple CPUs in one cluster can be
associated with different NUMA nodes, which is irregular configuration
because we shouldn't have this in baremetal environment
On 2/25/23 2:35 PM, Gavin Shan wrote:
For arm64 and riscv architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux guest. It's required that
the CPUs in one cluster can't span mutiple NUMA nodes. Otherwise, the Linux
scheduling domain can'
On 2/27/23 12:26 PM, Gavin Shan wrote:
This series intends to support dirty ring for live migration for arm64. The
dirty ring use discrete buffer to track dirty pages. For arm64, the speciality
is to use backup bitmap to track dirty pages when there is no-running-vcpu
context. It's known
ring. With this,
the code looks a bit clean.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Peter Xu
Tested-by: Zhenyu Zhang
---
accel/kvm/kvm-all.c | 76 -
1 file changed, 47 insertions(+), 29 deletions(-)
diff --git a/accel
n the subsequent patches.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Peter Xu
Tested-by: Zhenyu Zhang
---
accel/kvm/kvm-all.c | 2 +-
include/exec/memory.h | 7 +--
migration/dirtyrate.c | 4 ++--
migration/ram.c | 20 ++--
softmmu/mem
(PeterM)
v1:
* Combine two patches into one PATCH[v1 2/6] for the last stage indicator
(PeterX)
* Drop the secondary bitmap and use the original one directly
(Juan)
* Avoid "goto out" in helper kvm_dirty_ring_init()
s always enabled
and the unnecessary overhead to do the last stage of dirty log synchronization
when those two devices aren't used is introduced, but the overhead should
be very small and acceptable. The benefit is cover future cases where those
two devices are used without modifying the code.
In the last stage of live migration or memory slot removal, the
backup bitmap needs to be synchronized when it has been enabled.
Signed-off-by: Gavin Shan
Reviewed-by: Peter Xu
Tested-by: Zhenyu Zhang
---
accel/kvm/kvm-all.c | 11 +++
include/sysemu/kvm_int.h | 1 +
2 files
A
nodes.
Signed-off-by: Gavin Shan
---
hw/arm/sbsa-ref.c | 2 ++
hw/arm/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f778cb6d09..91d38af94c 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -864,6 +864,8 @@ static void
odes.
Signed-off-by: Gavin Shan
---
hw/riscv/spike.c | 2 ++
hw/riscv/virt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index cc3f6dac17..b09b993634 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -357,6 +357,8 @@ static void spike_machine_cl
* Drop PATCH[v2 1/4] related to qtests/numa-test(Gavin)
v2:
* Fix socket-NUMA-node boundary issues in qtests/numa-test (Gavin)
* Add helper set_numa_socket_boundary() and validate the
boundary in the generic path (Philippe)
Gavin Shan (3):
0x140
ret_from_fork+0x10/0x20
Improve the situation to warn when multiple CPUs in one cluster have
been associated with different NUMA nodes. However, one NUMA node is
allowed to be associated with different clusters.
Signed-off-by: Gavin Shan
---
hw/core/machine.c
On 2/25/23 1:20 AM, Igor Mammedov wrote:
On Fri, 24 Feb 2023 21:16:39 +1100
Gavin Shan wrote:
On 2/24/23 8:26 PM, Daniel Henrique Barboza wrote:
On 2/24/23 04:09, Gavin Shan wrote:
On 2/24/23 12:18 AM, Daniel Henrique Barboza wrote:
On 2/23/23 05:13, Gavin Shan wrote:
For arm64 and RiscV
On 2/23/23 10:51 PM, Peter Maydell wrote:
On Thu, 23 Feb 2023 at 00:52, Gavin Shan wrote:
On 2/23/23 2:54 AM, Peter Maydell wrote:
But we might have to for other boards we add later. We shouldn't
put code in per-board if it's not really board specific.
Moreover, I think "we
On 2/24/23 8:26 PM, Daniel Henrique Barboza wrote:
On 2/24/23 04:09, Gavin Shan wrote:
On 2/24/23 12:18 AM, Daniel Henrique Barboza wrote:
On 2/23/23 05:13, Gavin Shan wrote:
For arm64 and RiscV architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux
Hi Drew,
On 2/23/23 11:25 PM, Andrew Jones wrote:
On Thu, Feb 23, 2023 at 04:13:57PM +0800, Gavin Shan wrote:
For arm64 and RiscV architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux guest. It's required that
the CPUs in one socket can&#
On 2/24/23 12:18 AM, Daniel Henrique Barboza wrote:
On 2/23/23 05:13, Gavin Shan wrote:
For arm64 and RiscV architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux guest. It's required that
the CPUs in one socket can't span mutiple
On 2/23/23 11:57 PM, Daniel P. Berrangé wrote:
On Thu, Feb 23, 2023 at 04:13:57PM +0800, Gavin Shan wrote:
For arm64 and RiscV architecture, the driver (/base/arch_topology.c) is
used to populate the CPU topology in the Linux guest. It's required that
the CPUs in one socket can't sp
On 2/23/23 8:05 PM, Philippe Mathieu-Daudé wrote:
On 23/2/23 09:13, Gavin Shan wrote:
For some architectures like ARM64, multiple CPUs in one socket can't be
associated with different NUMA nodes. Otherwise, the guest kernel is confused
about the CPU topology. For example, the following wa
e the sitation to reject the configuration where multiple CPUs
in one socket have been associated with different NUMA nodes. The
newly introduced helper set_numa_socket_boundary() is expected to
called by specific machines (boards) where the boundary is required.
Signed-off-by: Gavin Shan
---
hw
There are two RISCV machines where NUMA is aware: 'virt' and 'spike'.
Both of them are required to follow socket-NUMA-node boundary. To
enable the validation to reject incorrect configuration.
Signed-off-by: Gavin Shan
---
hw/riscv/spike.c | 1 +
hw/riscv/virt.c | 1 +
* Add helper set_numa_socket_boundary() and validate the
boundary in the generic path (Philippe)
Gavin Shan (4):
qtest/numa-test: Follow socket-NUMA-node boundary for aarch64
numa: Validate socket and NUMA node boundary if required
hw/arm: Validate socket and NUMA node boun
There are two ARM machines where NUMA is aware: 'virt' and 'sbsa-ref'.
Both of them are required to follow socket-NUMA-node boundary. To
enable the validation to reject incorrect configuration.
Signed-off-by: Gavin Shan
---
hw/arm/sbsa-ref.c | 2 ++
hw/arm/virt.c | 2 ++
After socket-to-NUMA-node boundary is applied to aarch64 in the subsequent
patches, we need to explicitly specify 'smp.sockets=2' for 'test_mon_explicit'
and 'test_query_cpus' test cases. Besides, 'test_mon_partial' isn't applied
to aarch64 any more.
On 2/23/23 2:54 AM, Peter Maydell wrote:
On Wed, 22 Feb 2023 at 04:36, Gavin Shan wrote:
On 2/22/23 3:27 AM, Peter Maydell wrote:
Why does this need to be board-specific code? Is there
some way we can just do the right thing automatically?
Why does the GIC/ITS matter?
The kernel should
On 2/22/23 7:49 PM, Cornelia Huck wrote:
On Wed, Feb 22 2023, Gavin Shan wrote:
On 2/22/23 3:30 AM, Peter Maydell wrote:
On Mon, 13 Feb 2023 at 00:39, Gavin Shan wrote:
Signed-off-by: Gavin Shan
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 2 ++
2 files
On 2/22/23 10:58 AM, Peter Xu wrote:
On Wed, Feb 22, 2023 at 10:44:07AM +1100, Gavin Shan wrote:
Peter, could you please give some hints for me to understand the atomic
and non-atomic update here? Ok, I will drop this part of changes in next
revision with the assumption that we have atomic
On 2/22/23 3:27 AM, Peter Maydell wrote:
On Mon, 13 Feb 2023 at 00:40, Gavin Shan wrote:
When KVM device "kvm-arm-gicv3" or "arm-its-kvm" is used, we have to
enable the backup bitmap for the dirty ring. Otherwise, the migration
will fail because those two devices are usi
On 2/22/23 4:46 AM, Peter Xu wrote:
On Mon, Feb 13, 2023 at 08:39:22AM +0800, Gavin Shan wrote:
In the last stage of live migration or memory slot removal, the
backup bitmap needs to be synchronized when it has been enabled.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 11
On 2/22/23 10:31 AM, Philippe Mathieu-Daudé wrote:
On 22/2/23 00:12, Gavin Shan wrote:
On 2/21/23 9:21 PM, Philippe Mathieu-Daudé wrote:
On 21/2/23 10:21, Gavin Shan wrote:
On 2/21/23 8:15 PM, Philippe Mathieu-Daudé wrote:
On 21/2/23 09:53, Gavin Shan wrote:
Linux kernel guest reports
On 2/22/23 4:36 AM, Peter Xu wrote:
On Mon, Feb 13, 2023 at 08:39:21AM +0800, Gavin Shan wrote:
The global dirty log synchronization is used when KVM and dirty ring
are enabled. There is a particularity for ARM64 where the backup
bitmap is used to track dirty pages in non-running-vcpu
On 2/22/23 3:30 AM, Peter Maydell wrote:
On Mon, 13 Feb 2023 at 00:39, Gavin Shan wrote:
Signed-off-by: Gavin Shan
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 2 ++
2 files changed, 3 insertions(+)
For this to be a non-RFC patch, this needs to be a proper
On 2/21/23 9:21 PM, Philippe Mathieu-Daudé wrote:
On 21/2/23 10:21, Gavin Shan wrote:
On 2/21/23 8:15 PM, Philippe Mathieu-Daudé wrote:
On 21/2/23 09:53, Gavin Shan wrote:
Linux kernel guest reports warning when two CPUs in one socket have
been associated with different NUMA nodes, using the
+
assert(dirty_gfns && ring_size);
trace_kvm_dirty_ring_reap_vcpu(cpu->cpu_index);
Reviewed-by: Gavin Shan
On 2/21/23 8:15 PM, Philippe Mathieu-Daudé wrote:
On 21/2/23 09:53, Gavin Shan wrote:
Linux kernel guest reports warning when two CPUs in one socket have
been associated with different NUMA nodes, using the following command
lines.
-smp 6,maxcpus=6,sockets=2,clusters=1,cores=3,threads=1
/0x910
sched_init_domains+0xac/0xe0
sched_init_smp+0x48/0xc8
kernel_init_freeable+0x140/0x1ac
kernel_init+0x28/0x140
ret_from_fork+0x10/0x20
Fix it by preventing mutiple CPUs in one socket to be associated with
different NUMA nodes.
Reported-by: Yihuang Yu
Signed-off-by: Gavin Shan
ring. With this,
the code looks a bit clean.
No functional change intended.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 76 -
1 file changed, 47 insertions(+), 29 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index
n the subsequent patches.
No functional change intended.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 2 +-
include/exec/memory.h | 5 +++--
migration/dirtyrate.c | 4 ++--
migration/ram.c | 20 ++--
softmmu/memory.c | 10 +-
5 files changed, 21 inser
When KVM device "kvm-arm-gicv3" or "arm-its-kvm" is used, we have to
enable the backup bitmap for the dirty ring. Otherwise, the migration
will fail because those two devices are using the backup bitmap to track
dirty guest memory, corresponding to various hardware tables.
In the last stage of live migration or memory slot removal, the
backup bitmap needs to be synchronized when it has been enabled.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 11 +++
include/sysemu/kvm_int.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/accel/kvm
arm64 has different capability from x86 to enable the dirty ring, which
is KVM_CAP_DIRTY_LOG_RING_ACQ_REL. To enable it in kvm_dirty_ring_init()
when KVM_CAP_DIRTY_LOG_RING isn't supported.
Signed-off-by: Gavin Shan
Reviewed-by: Juan Quintela
---
accel/kvm/kvm-all.c | 10 --
1
Signed-off-by: Gavin Shan
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index 4bf2d7246e..a7cfefb3a8 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b
()
(Juan)
Gavin Shan (6):
linux-headers: Update for dirty ring
migration: Add last stage indicator to global dirty log
synchronization
kvm: Synchronize the backup bitmap in the last stage
kvm: Add helper kvm_dirty_ring_init()
hw/arm/virt: Enable backup bitmap
On 2/10/23 6:48 AM, Peter Xu wrote:
On Mon, Feb 06, 2023 at 07:20:04PM +0800, Gavin Shan wrote:
The global dirty log synchronization is used when KVM and dirty ring
are enabled. There is a particularity for ARM64 where the backup
bitmap is used to track dirty pages in non-running-vcpu
On 2/9/23 9:11 AM, Juan Quintela wrote:
Gavin Shan wrote:
Due to multiple capabilities associated with the dirty ring for different
architectures: KVM_CAP_DIRTY_{LOG_RING, LOG_RING_ACQ_REL} for x86 and
arm64 separately. There will be more to be done in order to support the
dirty ring for arm64
On 2/9/23 9:07 AM, Juan Quintela wrote:
Gavin Shan wrote:
When dirty ring is enabled on ARM64, the backup bitmap may be used
to track the dirty pages in no-running-vcpu situations. The original
bitmap is the primary one, used for the dirty ring buffer. We need
the secondary bitmap to collect
ring. With this,
the code looks a bit clean.
No functional change intended.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 73 -
1 file changed, 46 insertions(+), 27 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index
In the last stage of live migration or memory slot removal, the
backup bitmap needs to be synchronized.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 1a93985574..9ec117c441 100644
When KVM device "kvm-arm-gicv3" or "arm-its-kvm" is used, we have to
enable the backup bitmap for the dirty ring. Otherwise, the migration
will fail because those two devices are using the backup bitmap to track
dirty guest memory, corresponding to various hardware tables.
arm64 has different capability from x86 to enable the dirty ring, which
is KVM_CAP_DIRTY_LOG_RING_ACQ_REL. To enable it in kvm_dirty_ring_init()
when KVM_CAP_DIRTY_LOG_RING isn't supported.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 10 --
1 file changed, 8 insertions(
.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 50 ++--
include/sysemu/kvm_int.h | 1 +
2 files changed, 39 insertions(+), 12 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 01a6a026af..1a93985574 100644
--- a/accel/kvm/kvm
For the pre-copy live migration scenario, the last stage indicator
is needed for KVM backend to collect the dirty pages from the backup
bitmap when dirty ring is used. The indicator isn't used so far.
No functional change intended.
Signed-off-by: Gavin Shan
---
migration/ram.c
Signed-off-by: Gavin Shan
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index 4bf2d7246e..a7cfefb3a8 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b
ended.
Signed-off-by: Gavin Shan
---
accel/kvm/kvm-all.c | 2 +-
include/exec/memory.h | 5 +++--
migration/dirtyrate.c | 4 ++--
migration/ram.c | 6 +++---
softmmu/memory.c | 10 +-
5 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/acce
v=net0,mac=52:54:00:f1:26:a0
-netdev tap,id=vnet0,script=/etc/qemu-ifup,downscript=/etc/qemu-ifdown \
-device virtio-net-pci,bus=pcie.6,netdev=vnet0,mac=52:54:00:f1:26:b0
Gavin Shan (8):
linux-headers: Update for dirty ring
memory: Add last stage indicator to global dirty log synchro
ions (Markus)
v2: The property is changed to smp-cpus since 5.0 (Phild)
---
qapi/qom.json | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Gavin Shan
diff --git a/qapi/qom.json b/qapi/qom.json
index 30e76653ad..f4a7917f3d 100644
--- a/qap
On 11/11/22 6:54 PM, Igor Mammedov wrote:
On Fri, 11 Nov 2022 17:34:04 +0800
Gavin Shan wrote:
On 11/11/22 5:13 PM, Igor Mammedov wrote:
On Fri, 11 Nov 2022 07:47:16 +0100
Markus Armbruster wrote:
Gavin Shan writes:
On 11/11/22 11:05 AM, Zhenyu Zhang wrote:
Commit ffac16fab3 "ho
On 11/11/22 5:13 PM, Igor Mammedov wrote:
On Fri, 11 Nov 2022 07:47:16 +0100
Markus Armbruster wrote:
Gavin Shan writes:
On 11/11/22 11:05 AM, Zhenyu Zhang wrote:
Commit ffac16fab3 "hostmem: introduce "prealloc-threads" property"
(v5.0.0) changed the default number of
1 file changed, 1 insertion(+), 1 deletion(-)
With the following comments addressed:
Reviewed-by: Gavin Shan
---
Please consider amending the commit log to something like below.
The default "prealloc-threads" value is set to 1 when the property is
added by commit ffac16fab33
Hi Peter,
On 10/29/22 2:06 AM, Peter Maydell wrote:
On Wed, 26 Oct 2022 at 01:30, Gavin Shan wrote:
On 10/24/22 11:54 AM, Gavin Shan wrote:
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on
Hi Marc,
On 10/29/22 7:29 PM, Marc Zyngier wrote:
On Wed, 26 Oct 2022 01:29:56 +0100,
Gavin Shan wrote:
On 10/24/22 11:54 AM, Gavin Shan wrote:
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on
high memory region for GICv3 and GICv4 has been
enabled or not.
Suggested-by: Marc Zyngier
Signed-off-by: Gavin Shan
Reviewed-by: Marc Zyngier
---
docs/system/arm/virt.rst | 13 +++
hw/arm/virt.c| 75 ++--
2 files changed, 86 insertions(
ement should be applied. For now, 'vms->highmem_compact' is
set to false, meaning that we don't have memory layout change until it
becomes configurable through property 'compact-highmem' in next patch.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by
n machine, which is virt-7.1 or ealier than it. It
means the optimization is enabled by default from virt-7.2. Besides,
'compact-highmem' property is added so that the optimization can be
explicitly enabled or disabled on all machine types by users.
Signed-off-by: Gavin Shan
Reviewed-by: E
log and source code (Eric)
v3:
* Reorder the patches(Gavin)
* Add 'highmem-compact' property for backwards compatibility (Eric)
v2:
* Split the patches for easier review(Gavin)
* Improved changelog
This introduces virt_get_high_memmap_enabled() helper, which returns
the pointer to vms->highmem_{redists, ecam, mmio}. The pointer will
be used in the subsequent patches.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by: Cornelia Huck
Reviewed
This introduces variable 'region_base' for the base address of the
specific high memory region. It's the preparatory work to optimize
high memory region address assignment.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by: Cornelia Hu
This renames variable 'size' to 'region_size' in virt_set_high_memmap().
Its counterpart ('region_base') will be introduced in next patch.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by: Cornelia Huck
Reviewed-by: M
This introduces virt_set_high_memmap() helper. The logic of high
memory region address assignment is moved to the helper. The intention
is to make the subsequent optimization for high memory region address
assignment easier.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by
Hi Connie,
On 10/26/22 7:10 PM, Cornelia Huck wrote:
On Wed, Oct 26 2022, Gavin Shan wrote:
On 10/25/22 6:54 PM, Cornelia Huck wrote:
On Mon, Oct 24 2022, Gavin Shan wrote:
These 3 high memory regions are usually enabled by default, but
s/These 3/The/ ?
Ok.
they may be not used
Hi Connie,
On 10/26/22 6:43 PM, Cornelia Huck wrote:
On Wed, Oct 26 2022, Gavin Shan wrote:
On 10/26/22 12:29 AM, Eric Auger wrote:
On 10/24/22 05:54, Gavin Shan wrote:
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base
Hi Connie,
On 10/25/22 6:54 PM, Cornelia Huck wrote:
On Mon, Oct 24 2022, Gavin Shan wrote:
These 3 high memory regions are usually enabled by default, but
s/These 3/The/ ?
Ok.
they may be not used. For example, VIRT_HIGH_GIC_REDIST2 isn't
needed by GICv2. This leads to waste i
Hi Connie,
On 10/25/22 6:30 PM, Cornelia Huck wrote:
On Mon, Oct 24 2022, Gavin Shan wrote:
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is
Hi Eric,
On 10/26/22 12:29 AM, Eric Auger wrote:
On 10/24/22 05:54, Gavin Shan wrote:
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on highest RAM address. However, they can be disabled
in
Hi Peter and Marc,
On 10/24/22 11:54 AM, Gavin Shan wrote:
There are three high memory regions, which are VIRT_HIGH_REDIST2,
VIRT_HIGH_PCIE_ECAM and VIRT_HIGH_PCIE_MMIO. Their base addresses
are floating on highest RAM address. However, they can be disabled
in several cases.
(1) One specific
n machine, which is virt-7.1 or ealier than it. It
means the optimization is enabled by default from virt-7.2. Besides,
'compact-highmem' property is added so that the optimization can be
explicitly enabled or disabled on all machine types by users.
Signed-off-by: Gavin Shan
Reviewed-by: Co
This renames variable 'size' to 'region_size' in virt_set_high_memmap().
Its counterpart ('region_base') will be introduced in next patch.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by: Cornelia Huck
Tested-by: Zh
This introduces variable 'region_base' for the base address of the
specific high memory region. It's the preparatory work to optimize
high memory region address assignment.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by: Cornelia
This introduces virt_get_high_memmap_enabled() helper, which returns
the pointer to vms->highmem_{redists, ecam, mmio}. The pointer will
be used in the subsequent patches.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by: Eric Auger
Reviewed-by: Cornelia Huck
Tested
(Marc)
* Use 'bool fits' in virt_set_high_memmap() (Eric)
Gavin Shan (7):
hw/arm/virt: Introduce virt_set_high_memmap() helper
hw/arm/virt: Rename variable size to region_size in
virt_set_high_memmap
This introduces virt_set_high_memmap() helper. The logic of high
memory region address assignment is moved to the helper. The intention
is to make the subsequent optimization for high memory region address
assignment easier.
No functional change intended.
Signed-off-by: Gavin Shan
Reviewed-by
ement should be applied. For now, 'vms->highmem_compact' is
set to false, meaning that we don't have memory layout change until it
becomes configurable through property 'compact-highmem' in next patch.
Signed-off-by: Gavin Shan
Reviewed-by: Cornelia Huck
Tested-by: Zhenyu Z
ecam", "highmem-mmio".
Suggested-by: Marc Zyngier
Signed-off-by: Gavin Shan
---
docs/system/arm/virt.rst | 12
hw/arm/virt.c| 64
2 files changed, 76 insertions(+)
diff --git a/docs/system/arm/virt.rst b/docs/s
Hi Marc,
On 10/20/22 5:44 PM, Marc Zyngier wrote:
On Thu, 20 Oct 2022 00:57:32 +0100,
Gavin Shan wrote:
For Marc's suggestion to add properties so that these high memory
regions can be disabled by users. I can add one patch after this one
to introduce the following 3 properties. Coul
Hi Eric,
On 10/20/22 4:18 AM, Eric Auger wrote:
On 10/12/22 01:18, Gavin Shan wrote:
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is disabled
Hi Connie,
On 10/19/22 10:00 PM, Cornelia Huck wrote:
On Wed, Oct 12 2022, Gavin Shan wrote:
After the improvement to high memory region address assignment is
applied, the memory layout can be changed, introducing possible
migration breakage. For example, VIRT_HIGH_PCIE_MMIO memory region
is
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