Re: [PATCH 0/6 qemu] acpi: NUMA nodes for CXL HB as GP + complex NUMA test.

2024-04-12 Thread Huang, Ying
emu-devel/74e2845c5f95b0c139c79233ddb65bb17f2dd679.1710282274.git@redhat.com/ > Thanks a lot for your work! I need this to test some memory tiering kernel patches. I found the following git branch, https://gitlab.com/jic23/qemu/-/commits/cxl-2024-03-05/?ref_type=heads Can I use that branch directly? And, can you share an example qemu command line to setup Genport, CDAT, and HMAT? -- Best Regards, Huang, Ying

Re: [PATCH v11 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-04-09 Thread Huang, Ying
ose memory types that are not >> > initialized by device drivers. >> > Because late initialized memory and default DRAM memory need to be managed, >> > a default memory type is created for storing all memory types that are >> > not initialized by device drivers and as

Re: [PATCH v8 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-28 Thread Huang, Ying
ory types that are > not initialized by device drivers and as a fallback. > > Signed-off-by: Ho-Ren (Jack) Chuang > Signed-off-by: Hao Xiang > Reviewed-by: "Huang, Ying" > --- > mm/memory-tiers.c | 94 +++ > 1 file chan

Re: [PATCH v6 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-27 Thread Huang, Ying
e_memory_types[nid].memtype" will be !NULL. And it's possible (in theory) that some nodes becomes "node_state(nid, N_CPU) == true" between memory_tier_init() and memory_tier_late_init(). Otherwise, Looks good to me. Feel free to add Reviewed-by: "Huang, Ying" in the fu

Re: [PATCH v5 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-26 Thread Huang, Ying
pe = alloc_memory_type(MEMTIER_ADISTANCE_DRAM); > + default_dram_type = mt_find_alloc_memory_type(MEMTIER_ADISTANCE_DRAM, > + > _memory_types); > if (IS_ERR(default_dram_type)) > panic("%s() failed to allocate default DRAM tier\n", __func__); > > @@ -868,6 +919,14 @@ static int __init memory_tier_init(void) >* types assigned. >*/ > for_each_node_state(node, N_MEMORY) { > + if (!node_state(node, N_CPU)) > + /* > + * Defer memory tier initialization on CPUless numa > nodes. > + * These will be initialized after firmware and devices > are > + * initialized. > + */ > + continue; > + > memtier = set_node_memory_tier(node); > if (IS_ERR(memtier)) > /* -- Best Regards, Huang, Ying

Re: [External] Re: [PATCH v4 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-25 Thread Huang, Ying
"Ho-Ren (Jack) Chuang" writes: > On Fri, Mar 22, 2024 at 1:41 AM Huang, Ying wrote: >> >> "Ho-Ren (Jack) Chuang" writes: >> >> > The current implementation treats emulated memory devices, such as >> > CXL1.1 type3 mem

Re: [PATCH v4 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

2024-03-22 Thread Huang, Ying
t; _memory_types); > if (IS_ERR(default_dram_type)) > panic("%s() failed to allocate default DRAM tier\n", __func__); > > @@ -868,6 +913,14 @@ static int __init memory_tier_init(void) >* types assigned. >*/ > for_each_node_state(node, N_MEMORY) { > + if (!node_state(node, N_CPU)) > + /* > + * Defer memory tier initialization on CPUless numa > nodes. > + * These will be initialized after firmware and devices > are > + * initialized. > + */ > + continue; > + > memtier = set_node_memory_tier(node); > if (IS_ERR(memtier)) > /* -- Best Regards, Huang, Ying

Re: [PATCH v3 1/2] memory tier: dax/kmem: create CPUless memory tiers after obtaining HMAT info

2024-03-20 Thread Huang, Ying
> > return 0; > } > @@ -826,7 +897,8 @@ static int __init memory_tier_init(void) >* For now we can have 4 faster memory tiers with smaller adistance >* than default DRAM tier. >*/ > - default_dram_type = alloc_memory_type(MEMTIER_ADISTANCE_DRAM); > + default_dram_type = mt_find_alloc_memory_type( > + MEMTIER_ADISTANCE_DRAM, > _memory_types); > if (IS_ERR(default_dram_type)) > panic("%s() failed to allocate default DRAM tier\n", __func__); > > @@ -836,6 +908,14 @@ static int __init memory_tier_init(void) >* types assigned. >*/ > for_each_node_state(node, N_MEMORY) { > + if (!node_state(node, N_CPU)) > + /* > + * Defer memory tier initialization on CPUless numa > nodes. > + * These will be initialized after firmware and devices > are > + * initialized. > + */ > + continue; > + > memtier = set_node_memory_tier(node); > if (IS_ERR(memtier)) > /* -- Best Regards, Huang, Ying

Re: [External] Re: [PATCH v2 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-14 Thread Huang, Ying
"Ho-Ren (Jack) Chuang" writes: > On Tue, Mar 12, 2024 at 2:21 AM Huang, Ying wrote: >> >> "Ho-Ren (Jack) Chuang" writes: >> >> > The current implementation treats emulated memory devices, such as >> > CXL1.1 type3 mem

Re: [PATCH v2 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-12 Thread Huang, Ying
tance(struct access_coordinate *perf, > int *adist) > (default_dram_perf.read_latency + > default_dram_perf.write_latency) * > (default_dram_perf.read_bandwidth + > default_dram_perf.write_bandwidth) / > (perf->read_bandwidth + perf->write_bandwidth); > - mutex_unlock(_tier_lock); > + mutex_unlock(_perf_lock); > > return 0; > } > @@ -836,6 +890,14 @@ static int __init memory_tier_init(void) >* types assigned. >*/ > for_each_node_state(node, N_MEMORY) { > + if (!node_state(node, N_CPU)) > + /* > + * Defer memory tier initialization on CPUless numa > nodes. > + * These will be initialized when HMAT information is HMAT is platform specific, we should avoid to mention it in general code if possible. > + * available. > + */ > + continue; > + > memtier = set_node_memory_tier(node); > if (IS_ERR(memtier)) > /* -- Best Regards, Huang, Ying

Re: [External] Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-05 Thread Huang, Ying
"Ho-Ren (Jack) Chuang" writes: > On Sun, Mar 3, 2024 at 6:42 PM Huang, Ying wrote: >> >> Hi, Jack, >> >> "Ho-Ren (Jack) Chuang" writes: >> >> > * Introduce `mt_init_with_hmat()` >> > We defer memory tier ini

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-04 Thread Huang, Ying
"Ho-Ren (Jack) Chuang" writes: > On Mon, Mar 4, 2024 at 10:36 PM Huang, Ying wrote: >> >> "Ho-Ren (Jack) Chuang" writes: >> >> > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote: >> >> >> >> "Ho-Ren (

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-04 Thread Huang, Ying
"Ho-Ren (Jack) Chuang" writes: > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying wrote: >> >> "Ho-Ren (Jack) Chuang" writes: >> >> > The memory tiering component in the kernel is functionally useless for >> > CPUless memory/non-DRAM devices

Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

2024-03-03 Thread Huang, Ying
t.c | 3 ++ > include/linux/memory-tiers.h | 6 +++ > mm/memory-tiers.c| 76 ++++ > 3 files changed, 77 insertions(+), 8 deletions(-) -- Best Regards, Huang, Ying

Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

2024-03-03 Thread Huang, Ying
static int __init memory_tier_init(void) >* types assigned. >*/ > for_each_node_state(node, N_MEMORY) { > - memtier = set_node_memory_tier(node); > + if (!node_state(node, N_CPU)) > + /* > + * Defer memory tier initialization on CPUless numa > nodes. > + * These will be initialized when HMAT information is > + * available. > + */ > + continue; > + > + memtier = set_node_memory_tier(node, default_dram_type); On system with HMAT, how to fall back CPU-less node to default_dram_type? I found your description, but I don't find it in code. > if (IS_ERR(memtier)) > /* >* Continue with memtiers we are able to setup -- Best Regards, Huang, Ying

[Qemu-devel] [PATCH -v4] Monitor command: x-gpa2hva, translate guest physical address to host virtual address

2011-05-15 Thread Huang Ying
: - Add QMP support Signed-off-by: Max Asbock masb...@linux.vnet.ibm.com Signed-off-by: Jiajia Zheng jiajia.zh...@intel.com Signed-off-by: Huang Ying ying.hu...@intel.com --- hmp-commands.hx | 15 +++ monitor.c | 22 ++ 2 files changed, 37 insertions

[Qemu-devel] Re: [PATCH uq/master -v2 2/2] KVM, MCE, unpoison memory address across reboot

2011-02-10 Thread Huang Ying
On Wed, 2011-02-09 at 16:00 +0800, Jan Kiszka wrote: On 2011-02-09 04:00, Huang Ying wrote: In Linux kernel HWPoison processing implementation, the virtual address in processes mapping the error physical memory page is marked as HWPoison. So that, the further accessing to the virtual

[Qemu-devel] Re: [PATCH uq/master -v2 2/2] KVM, MCE, unpoison memory address across reboot

2011-02-10 Thread Huang Ying
On Thu, 2011-02-10 at 16:52 +0800, Jan Kiszka wrote: On 2011-02-10 01:27, Huang Ying wrote: @@ -1882,6 +1919,7 @@ int kvm_arch_on_sigbus_vcpu(CPUState *en hardware_memory_error(); } } +kvm_hwpoison_page_add(ram_addr

[Qemu-devel] [PATCH uq/master -v2 1/2] Add qemu_ram_remap

2011-02-08 Thread Huang Ying
qemu_ram_remap() unmaps the specified RAM pages, then re-maps these pages again. This is used by KVM HWPoison support to clear HWPoisoned page tables across guest rebooting, so that a new page may be allocated later to recover the memory error. Signed-off-by: Huang Ying ying.hu...@intel.com

[Qemu-devel] [PATCH uq/master -v2 2/2] KVM, MCE, unpoison memory address across reboot

2011-02-08 Thread Huang Ying
a new page to recover the issue. Signed-off-by: Huang Ying ying.hu...@intel.com --- target-i386/kvm.c | 39 +++ 1 file changed, 39 insertions(+) --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -508,6 +508,42 @@ static int kvm_get_supported_msrs(KVMSta

[Qemu-devel] Re: [PATCH uq/master 2/2] MCE, unpoison memory address across reboot

2011-01-16 Thread Huang Ying
On Fri, 2011-01-14 at 16:38 +0800, Jan Kiszka wrote: Am 14.01.2011 02:51, Huang Ying wrote: On Thu, 2011-01-13 at 17:01 +0800, Jan Kiszka wrote: Am 13.01.2011 09:34, Huang Ying wrote: [snip] + +void kvm_unpoison_all(void *param) Minor nit: This can be static now. In uq/master

[Qemu-devel] [PATCH uq/master 2/2] MCE, unpoison memory address across reboot

2011-01-13 Thread Huang Ying
page to recover the issue. Signed-off-by: Huang Ying ying.hu...@intel.com --- kvm.h |2 ++ target-i386/kvm.c | 39 +++ 2 files changed, 41 insertions(+) --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -580,6 +580,42 @@ static int

[Qemu-devel] [PATCH uq/master 1/2] Add qemu_ram_remap

2011-01-13 Thread Huang Ying
qemu_ram_remap() unmaps the specified RAM pages, then re-maps these pages again. This is used by KVM HWPoison support to clear HWPoisoned page tables across guest rebooting, so that a new page may be allocated later to recover the memory error. Signed-off-by: Huang Ying ying.hu...@intel.com

Re: [Qemu-devel] [PATCH uq/master 1/2] Add qemu_ram_remap

2011-01-13 Thread Huang Ying
On Fri, 2011-01-14 at 05:14 +0800, Blue Swirl wrote: On Thu, Jan 13, 2011 at 8:34 AM, Huang Ying ying.hu...@intel.com wrote: qemu_ram_remap() unmaps the specified RAM pages, then re-maps these pages again. This is used by KVM HWPoison support to clear HWPoisoned page tables across guest

[Qemu-devel] Re: [PATCH uq/master 2/2] MCE, unpoison memory address across reboot

2011-01-13 Thread Huang Ying
On Thu, 2011-01-13 at 17:01 +0800, Jan Kiszka wrote: Am 13.01.2011 09:34, Huang Ying wrote: In Linux kernel HWPoison processing implementation, the virtual address in processes mapping the error physical memory page is marked as HWPoison. So that, the further accessing to the virtual

[Qemu-devel] Re: [PATCH v3 12/21] kvm: x86: Drop MCE MSRs write back restrictions

2011-01-05 Thread Huang Ying
On Wed, 2011-01-05 at 16:07 +0800, Jan Kiszka wrote: Am 05.01.2011 07:42, Huang Ying wrote: On Tue, 2011-01-04 at 16:32 +0800, Jan Kiszka wrote: From: Jan Kiszka jan.kis...@siemens.com There is no need to restrict writing back MCE MSRs to reset or full state updates as setting

[Qemu-devel] Re: [PATCH v3 12/21] kvm: x86: Drop MCE MSRs write back restrictions

2011-01-04 Thread Huang Ying
MCG_STATUS, so their content should be kept. And the following sequence may set uncorrected value in MCE registers. savevm - loadvm - (OS clear MCE registers) - reset - (MCE registers has new (uncorrected) value) Best Regards, Huang Ying Signed-off-by: Jan Kiszka jan.kis...@siemens.com CC

[Qemu-devel] Re: [RFC 2/2] KVM, MCE, unpoison memory address across reboot

2011-01-04 Thread Huang Ying
On Fri, 2010-12-31 at 17:10 +0800, Jan Kiszka wrote: Am 31.12.2010 06:22, Huang Ying wrote: In Linux kernel HWPoison processing implementation, the virtual address in processes mapping the error physical memory page is marked as HWPoison. So that, the further accessing to the virtual

[Qemu-devel] [RFC 1/2] Add qemu_ram_remap

2010-12-30 Thread Huang Ying
qemu_ram_remap() unmaps the specified RAM pages, then re-maps these pages again. This is used by KVM HWPoison support to clear HWPoisoned page tables across guest rebooting, so that a new page may be allocated later to recover the memory error. Signed-off-by: Huang Ying ying.hu...@intel.com

[Qemu-devel] Re: [PATCH v3 3/7] target-i386: Don't use SoftFloat uint64 type

2010-12-19 Thread Huang Ying
On Sun, 2010-12-19 at 00:25 +0800, Andreas Färber wrote: softfloat.h's uint64 type has least-width semantics, which seems unintended here since uint64_t is used in helpers. v3: * Split off. Cc: Huang Ying ying.hu...@intel.com Cc: Juan Quintela quint...@redhat.com Signed-off-by: Andreas

Re: [Qemu-devel] Re: [PATCH 11/11] kvm, x86: broadcast mce depending on the cpu version

2010-10-14 Thread Huang Ying
Regards, Huang Ying

[Qemu-devel] Re: [patch uq/master 7/8] MCE: Relay UCR MCE to guest

2010-10-07 Thread Huang Ying
to guest will mean that guest receives VAL|UC|!PCC and RIPV event from virtual processor that doesn't have SER_P. Dean also noted this. I don't think it was deliberate choice to not expose SER_P. Huang? In fact, that should be a BUG. I will fix it as soon as possible. Best Regards, Huang Ying

[Qemu-devel] Re: [patch uq/master 7/8] MCE: Relay UCR MCE to guest

2010-10-07 Thread Huang Ying
in business... Because the contents of poisoned pages are not relevant after reboot. Qemu can replace the poisoned pages with good pages when reboot guest. Do you think that is good. Best Regards, Huang Ying

[Qemu-devel] [BUGFIX] MCE: Fix bug of IA32_MCG_STATUS after system reset

2010-01-05 Thread Huang Ying
in real hardware. This patch fixes this via set env-mcg_status to 0 during system reset. Signed-off-by: Huang Ying ying.hu...@intel.com --- target-i386/helper.c |2 ++ 1 file changed, 2 insertions(+) --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -617,6 +617,8 @@ void cpu_reset