add extra nested bridges/root ports to blobs so it would be
posible to check how follow up patches would affect it.
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 4
tests/data/acpi/pc/DSDT.bridge | Bin 9532 -> 12608 bytes
tests/data/acpi
Signed-off-by: Igor Mammedov
---
hw/pci-bridge/pci_bridge_dev.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index 3435df8d73..4b2696ea7f 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..dea61d94f1 100644
--- a/tests/qtest/bios-tables-test
On Wed, 4 Jan 2023 10:34:09 +0100
Philippe Mathieu-Daudé wrote:
> On 4/1/23 10:01, Laszlo Ersek wrote:
[...]
> > diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c
> > index 53654f863830..ff14c3f4106f 100644
> > --- a/hw/acpi/cpu_hotplug.c
> > +++ b/hw/acpi/cpu_hotplug.c
> > @@ -52,6
mixed with ACPI S3 suspend/resume, using KVM accel
> (regression-test);
>
> - OVMF IA32 + qemu-system-i386, SMM enabled, using TCG accel; verified the
> register block switch and the present/possible CPU counting through the
> modern hotplug interface, during OVMF boot (bugfix
u-Daudé
> Message-Id: <20221027204720.33611-2-phi...@linaro.org>
Reviewed-by: Igor Mammedov
> ---
> hw/mips/malta.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/mips/malta.c b/hw/mips/malta.c
> index c0a2e0ab04..9bffa1b128 100644
On Tue, 29 Nov 2022 11:13:39 +0100
Igor Mammedov wrote:
> Changelog:
>- keep comment reminding that there was a bridge, so it would be easy to
> find
> removed code if someone wishes to bring it back
>- s/IS_PCI_BRIDGE/is_bridge/ in one instance where local is
On Tue, 13 Dec 2022 15:08:53 +0100
Philippe Mathieu-Daudé wrote:
> On 12/12/22 00:41, Philippe Mathieu-Daudé wrote:
> > Hi,
> >
> > In the last years we had few discussions on "simplifying" QEMU (system
> > emulation / virtualization), in particular for the "management layer".
> >
> > Some of
On Mon, 12 Dec 2022 11:51:15 +0100
Philippe Mathieu-Daudé wrote:
> tco.c contains the ICH9 implementation of its "total cost
> of ownership". Rename it accordingly to emphasis this is
> a part of the ICH9 model.
>
> Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Igor
On Wed, 23 Nov 2022 11:25:08 +0100
Gerd Hoffmann wrote:
> On Tue, Nov 22, 2022 at 01:43:16PM -0500, Kevin O'Connor wrote:
> > On Mon, Nov 21, 2022 at 11:32:13AM +0100, Gerd Hoffmann wrote:
> > > Current seabios code will only enable and use the 64bit pci io window in
> > > case it runs out of
Changelog:
- keep comment reminding that there was a bridge, so it would be easy to find
removed code if someone wishes to bring it back
- s/IS_PCI_BRIDGE/is_bridge/ in one instance where local is_bridge already
exists
Igor Mammedov (2):
remove DEC 21154 PCI bridge
pci: drop
that was commented out 'forever'.
Signed-off-by: Igor Mammedov
---
v2:
(BALATON Zoltan )
- leave reminder about removed bridge so it would be easier to find
commit that removed it
---
hw/pci-bridge/dec.h | 9 ---
include/hw/pci/pci_ids.h | 1 -
hw/pci-bridge/dec.c | 164
and use cast to TYPE_PCI_BRIDGE instead.
Signed-off-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
v2:
(Philippe Mathieu-Daudé )
- replace leftover IS_PCI_BRIDGE cast with is_bridge variable
---
include/hw/pci/pci.h | 11 +--
include/hw/pci
, \_SB.PRQC)
-Alias (PRQD, \_SB.PRQD)
-Alias (PRQE, \_SB.PRQE)
-Alias (PRQF, \_SB.PRQF)
-Alias (PRQG, \_SB.PRQG)
-Alias (PRQH, \_SB.PRQH)
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 36 +
1 file changed, 36 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..a4587652dd 100644
--- a/tests/qtest
in, but it should be fine as bridge initialization
also hardcodes PCI address of the bridge so it can't ever
move. Once QEMU tree has fixed SeaBIOS blob, we should be able
to drop this part and revert back to alias based approach
Reported-by: Volker Rümelin
Signed-off-by: Igor Mammedov
---
tested
It's too late for actual SeaBIOS fix to get merged in time for 7.2
so here goes a workaround in QEMU.
See patch 2/3 for full description.
Igor Mammedov (3):
tests: acpi: whitelist DSDT before moving PRQx to _SB scope
acpi: x86: move RPQx field back to _SB scope
tests: acpi: x86: update
On Sun, 20 Nov 2022 22:08:54 +
Mark Cave-Ayland wrote:
> On 16/11/2022 19:39, BALATON Zoltan wrote:
>
> > On Wed, 16 Nov 2022, Igor Mammedov wrote:
> >
> >> Code has not been used practically since its inception (2004)
> >> f2aa58c6f4a20 UniNorth P
On Sat, 19 Nov 2022 09:49:39 +0100
Volker Rümelin wrote:
> Am 18.11.22 um 15:55 schrieb Igor Mammedov:
> > On Fri, 18 Nov 2022 14:08:36 +0100
> > Igor Mammedov wrote:
> >
> >> On Thu, 17 Nov 2022 22:51:46 +0100
> >> Volker Rümelin wrote:
> > [..
On Sat, 19 Nov 2022 12:22:13 -0500
"Michael S. Tsirkin" wrote:
> On Fri, Nov 18, 2022 at 03:55:17PM +0100, Igor Mammedov wrote:
> > On Fri, 18 Nov 2022 14:08:36 +0100
> > Igor Mammedov wrote:
> >
> > > On Thu, 17 Nov 2022 22
On Fri, 18 Nov 2022 14:08:36 +0100
Igor Mammedov wrote:
> On Thu, 17 Nov 2022 22:51:46 +0100
> Volker Rümelin wrote:
[...]
> > since this patch SeaBIOS no longer detects the PS/2 keyboard. This means
> > there's no keyboard in SeaBIOS, GRUB or FreeDOS. OVMF and Linux de
On Thu, 17 Nov 2022 22:51:46 +0100
Volker Rümelin wrote:
> > From: Igor Mammedov
> >
> > PCI-ISA bridges that are built in PIIX/Q35 are building its own AML
> > using AcpiDevAmlIf interface. Now build_append_pci_bus_devices()
> > gained AcpiDevAmlIf interface
On Wed, 16 Nov 2022 20:39:29 +0100 (CET)
BALATON Zoltan wrote:
> On Wed, 16 Nov 2022, Igor Mammedov wrote:
>
> > Code has not been used practically since its inception (2004)
> > f2aa58c6f4a20 UniNorth PCI bridge support
> > or maybe even earlier, but it was con
On Wed, 16 Nov 2022 16:35:10 +0100
Philippe Mathieu-Daudé wrote:
> On 16/11/22 16:27, Igor Mammedov wrote:
> > and use cast to TYPE_PCI_BRIDGE instead.
> >
> > Signed-off-by: Igor Mammedov
> > ---
> > include/hw/pci/pci.h | 11 +--
that was commented out 'forever'.
Signed-off-by: Igor Mammedov
---
hw/pci-bridge/dec.h | 9 ---
include/hw/pci/pci_ids.h | 1 -
hw/pci-bridge/dec.c | 164 --
hw/pci-bridge/meson.build | 2 -
hw/pci-host/uninorth.c| 6 --
5 files changed, 182
and use cast to TYPE_PCI_BRIDGE instead.
Signed-off-by: Igor Mammedov
---
include/hw/pci/pci.h | 11 +--
include/hw/pci/pci_bridge.h| 1 +
hw/acpi/pcihp.c| 3 +--
hw/i386/acpi-build.c | 5 ++---
hw/pci-bridge/cxl_downstream.c
Igor Mammedov (2):
remove DEC 21154 PCI bridge
pci: drop redundant PCIDeviceClass::is_bridge field
hw/pci-bridge/dec.h| 9 --
include/hw/pci/pci.h | 11 +-
include/hw/pci/pci_bridge.h| 1 +
include/hw/pci/pci_ids.h | 1 -
hw/acpi
On Tue, 15 Nov 2022 15:01:06 +0100
Philippe Mathieu-Daudé wrote:
> Hi,
>
> On 7/11/22 23:47, Michael S. Tsirkin wrote:
>
> >
> > pci,pc,virtio: features, tests, fixes, cleanups
> >
> > lots of acpi rework
> > first version of
On Fri, 11 Nov 2022 10:47:20 +
Daniel P. Berrangé wrote:
> On Wed, Nov 09, 2022 at 01:36:07PM +, Dario Faggioli wrote:
> > Hello,
> >
> > Sorry for the potentially naive question, but I'm not clear what the
> > process would be if, say, I'd like to raise the number of maximum CPUs
> > a
On Fri, 11 Nov 2022 12:40:59 +0100
Gerd Hoffmann wrote:
> On Fri, Nov 11, 2022 at 11:51:23AM +0100, Igor Mammedov wrote:
> > On Tue, 8 Nov 2022 12:21:11 +0100
> > Gerd Hoffmann wrote:
> >
> > > > >> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> &
On Fri, 11 Nov 2022 17:34:04 +0800
Gavin Shan wrote:
> On 11/11/22 5:13 PM, Igor Mammedov wrote:
> > On Fri, 11 Nov 2022 07:47:16 +0100
> > Markus Armbruster wrote:
> >> Gavin Shan writes:
> >>> On 11/11/22 11:05 AM, Zhenyu Zhang wrote:
> >
On Tue, 8 Nov 2022 12:21:11 +0100
Gerd Hoffmann wrote:
> > >> > diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> > >> > index 566accf7e6..5bf5465a21 100644
> > >> > --- a/hw/i386/pc.c
> > >> > +++ b/hw/i386/pc.c
> > >> > @@ -1061,7 +1061,6 @@ void pc_memory_init(PCMachineState *pcms,
> > >> >
On Wed, 9 Nov 2022 13:36:07 +
Dario Faggioli wrote:
> Hello,
>
> Sorry for the potentially naive question, but I'm not clear what the
> process would be if, say, I'd like to raise the number of maximum CPUs
> a q35 VM can have.
>
> So, right now we have:
>
> void
On Fri, 11 Nov 2022 10:43:30 +0100
Igor Mammedov wrote:
> On Thu, 10 Nov 2022 09:28:44 +
> Peter Maydell wrote:
>
> > On Wed, 9 Nov 2022 at 21:42, Michael S. Tsirkin wrote:
> >
> > > > > diff --git a/hw/display/meson.build b/hw/display/meson.build
&g
On Thu, 10 Nov 2022 09:28:44 +
Peter Maydell wrote:
> On Wed, 9 Nov 2022 at 21:42, Michael S. Tsirkin wrote:
>
> > > > diff --git a/hw/display/meson.build b/hw/display/meson.build
> > > > index adc53dd8b6..7a725ed80e 100644
> > > > --- a/hw/display/meson.build
> > > > +++
On Fri, 11 Nov 2022 07:47:16 +0100
Markus Armbruster wrote:
> Gavin Shan writes:
>
> > Hi Zhenyu,
> >
> > On 11/11/22 11:05 AM, Zhenyu Zhang wrote:
> >> Commit ffac16fab3 "hostmem: introduce "prealloc-threads" property"
> >> (v5.0.0) changed the default number of threads from number of CPUs
On Tue, 8 Nov 2022 08:49:01 -0500
"Michael S. Tsirkin" wrote:
> On Tue, Nov 08, 2022 at 02:36:41PM +0100, Igor Mammedov wrote:
> > On Mon, 7 Nov 2022 17:51:11 -0500
> > "Michael S. Tsirkin" wrote:
> >
> > > From: Igor Mammedov
> >
On Mon, 7 Nov 2022 17:51:11 -0500
"Michael S. Tsirkin" wrote:
> From: Igor Mammedov
>
> Signed-off-by: Igor Mammedov
> Message-Id: <20221017102146.2254096-3-imamm...@redhat.com>
> Reviewed-by: Michael S. Tsirkin
> Signed-off-by: Michael S. Tsirkin
>
death from
> > signal 6 (Aborted) (core dumped)
> > TAP parsing error: Too few tests run (expected 62, got 31)
> > (test program exited with status code -6)
> > ――――――
> >
> > https://gitlab.com
On Fri, 04 Nov 2022 05:53:02 +0100
Markus Armbruster wrote:
> Philippe Mathieu-Daudé writes:
>
> > On 3/11/22 11:47, Zhenyu Zhang wrote:
> >> Since the amount of prealloc-threads to smp-cpus is
> >> defaulted in hostmem, so sync this information.
>
> Has this always defaulted to smp-cpus,
nathan
>
>
> >
> > Signed-off-by: Julia Suvorova
> > Message-Id: <20220731162141.178443-5-jus...@redhat.com>
> > Message-Id: <2022101731.101412-5-jus...@redhat.com>
> > Reviewed-by: Michael S. Tsirkin
> > Signed-off-by: Michael S. Tsirkin
On Mon, 31 Oct 2022 11:48:58 -0400
"Michael S. Tsirkin" wrote:
> On Mon, Oct 31, 2022 at 01:50:24PM +, Daniel P. Berrangé wrote:
> > On Mon, Oct 31, 2022 at 01:19:30PM +, Daniel P. Berrangé wrote:
> > > The TCO watchdog is unconditionally integrated into the Q35 machine
> > > type by
On Mon, 31 Oct 2022 08:50:41 -0400
"Michael S. Tsirkin" wrote:
>
> Holiday here tomorrow, so most likely this is it for features for this
> release.
>
> The following changes since commit 75d30fde55485b965a1168a21d016dd07b50ed32:
>
> Merge tag 'block-pull-request' of
testcase requires KVM for execution and would fail with
"
qemu-system-i386: current -smp configuration requires kernel irqchip
and X2APIC API support
"
move it to kvm guarded section.
This fixes CI failure on hosts that doesn't have KVM enabled for Q35
machine type.
Signed-of
On Mon, 31 Oct 2022 06:52:11 -0400
"Michael S. Tsirkin" wrote:
> On Mon, Oct 31, 2022 at 11:49:42AM +0100, Igor Mammedov wrote:
> > On Thu, 27 Oct 2022 11:11:48 -0400
> > "Michael S. Tsirkin" wrote:
> >
> > > we had such a beautiful str
26133110.91828-2-shen...@gmail.com>
Reviewed-by: Igor Mammedov
> ---
> hw/i386/acpi-build.c | 7 ---
> 1 file changed, 7 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 960305462c..1ebf14b899 100644
> --- a/hw/i386/acpi-build.c
>
On Fri, 28 Oct 2022 12:34:19 +0200
Bernhard Beschow wrote:
> The code currently assumes Q35 iff ICH9 and i440fx iff PIIX. Now that more
> AML generation has been moved into the south bridges and since the
> machines define themselves primarily through their north bridges, let's
> switch to
On Fri, 28 Oct 2022 12:34:18 +0200
Bernhard Beschow wrote:
> The is_piix4 attribute is set once in one location and read once in
> another. Doing both in one location allows for removing the attribute
> altogether.
we also test for piix4 in acpi_get_pm_info(),
Perhaps we should move is_piix4 to
On Thu, 27 Oct 2022 11:11:48 -0400
"Michael S. Tsirkin" wrote:
> we had such a beautiful structure for updating
> expected files, designed to keep bisect working.
> It turns out that we ignored the result of
> the allow list checks unless all tables matched
> anyway.
>
> Sigh.
strange,
it
On Thu, 27 Oct 2022 10:15:58 -0400
"Michael S. Tsirkin" wrote:
> On Thu, Oct 27, 2022 at 03:52:53PM +0200, Igor Mammedov wrote:
> > On Thu, 27 Oct 2022 01:59:22 -0400
> > "Michael S. Tsirkin" wrote:
> >
> > > Just noticed this when disass
On Thu, 27 Oct 2022 02:11:23 -0400
"Michael S. Tsirkin" wrote:
> On Tue, Oct 11, 2022 at 01:17:31PM +0200, Julia Suvorova wrote:
> > Changes in the tables (for 275 cores):
> > FACP:
> > + Use APIC Cluster Model (V4) : 1
> >
> > APIC:
> > +[02Ch 0044 1]Subtable
On Thu, 27 Oct 2022 01:59:22 -0400
"Michael S. Tsirkin" wrote:
> Just noticed this when disassembling:
>
> Parsing completed
> ACPI Warning: NsLookup: Type mismatch on ODAT (RegionField), searching for
> (Buffer) (20210604/nsaccess-760)
> Disassembly completed
> ASL Output:
On Mon, 17 Oct 2022 12:21:35 +0200
Igor Mammedov wrote:
> Series continues refactoring started at recently merged [1].
> It replaces special cases/quirks for ISA/SMB bridges and PCI
> attached VGA devices with generic AcpiDevAmlIf interface,
> which allows device to provide
On Thu, 20 Oct 2022 08:01:48 -0400
"Michael S. Tsirkin" wrote:
> On Thu, Oct 20, 2022 at 01:48:49PM +0200, Igor Mammedov wrote:
> > On Thu, 20 Oct 2022 08:48:36 +0800
> > Robert Hoo wrote:
> >
> > > Ping...
> >
> > sorry, ser
On Mon, 17 Oct 2022 18:13:14 +0530
Ani Sinha wrote:
> On Mon, Oct 17, 2022 at 3:52 PM Igor Mammedov wrote:
> >
> > Expected change in q35 tests:
> > @@ -2797,14 +2797,6 @@ DefinitionBlock ("", "DSDT",
.pdf
> [2] Intel PMEM _DSM Interface Spec v2.0, 3.10 Deprecated Functions
> https://pmem.io/documents/IntelOptanePMem_DSM_Interface-V2.0.pdf
>
> Signed-off-by: Robert Hoo
Reviewed-by: Igor Mammedov
> ---
> hw/acpi/nvdimm.c | 95
&g
, 2022-09-27 at 08:30 +0800, Robert Hoo wrote:
> > > On Mon, 2022-09-26 at 15:22 +0200, Igor Mammedov wrote:
> > > > > > 0800200c9a66"), One, 0x05, Local0, One)
> > > > > > +CreateDWordField (Local3, Zero, ST
) // _Exx: Edge-Triggered GPE
+{
+Acquire (\_SB.PCI0.BLCK, 0x)
+\_SB.PCI0.PCNT ()
+Release (\_SB.PCI0.BLCK)
+}
+ }
}
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 34 ---
It will be used in followup commits to figure out if
device has it's own, device specific AML block.
Signed-off-by: Igor Mammedov
---
include/hw/acpi/acpi_aml_interface.h | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/include/hw/acpi/acpi_aml_interface.h
b
to make that happen (bridge sits at _ADR: 0x001F0003),
relax PCI enumeration logic to include devices with *function* > 0
if device has something to say about itself (i.e. has build_dev_aml
callback set).
Signed-off-by: Igor Mammedov
---
hw/i386/acpi-build.c | 27 +++
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 34 +
1 file changed, 34 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..570b17478e 100644
--- a/tests/qtest
{
}
Also for ipmismbus test, child 'Device (MI1)' of SMB0 will be moved along with
it
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 21
tests/data/acpi/q35/DSDT| Bin 8418 -> 8407 bytes
tests/
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 34 +
1 file changed, 34 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..725a1dc798 100644
--- a/tests/qtest
, however 'iasl' may print warnings. So be nice
to iasl/guest OS and do things in proper order.
PS2: Also follow up patches will move some of hotplug code
from PCI tree to _E01 and that also requires PCI Device
nodes build first, before Scope can reuse that from
global context.
Signed-off-by: Igor
treat bridge just as any other PCI device if it's
possible.
Signed-off-by: Igor Mammedov
---
hw/i386/acpi-build.c | 75
hw/isa/lpc_ich9.c| 23 ++
hw/isa/piix3.c | 17 +-
3 files changed, 39 insertions(+), 76 deletions
, Arg1, Arg2, Arg3, Local0))
+}
similar changes are expected for Q35 modulo:
-Field (PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve)
+Field (SF8.PIRQ, ByteAcc, NoLock, Preserve)
and bridge address
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..fd5852776c 100644
--- a/tests/qtest
Signed-off-by: Igor Mammedov
---
hw/display/vga_int.h | 2 ++
hw/display/acpi-vga-stub.c | 7 +++
hw/display/acpi-vga.c | 26 ++
hw/display/meson.build | 17 +
hw/display/vga-pci.c | 4
hw/i386/acpi-build.c | 26
enumeration code.
PS:
at the end, \_GPE clean up patches which are not part of
AcpiDevAmlIf refactoring but iti's still related to PCI,
so I've included them there as well.
1)
https://patchwork.ozlabs.org/project/qemu-devel/list/?series=303856
Igor Mammedov (11):
acpi: pc: vga: use AcpiDevAmlIf
On Tue, 11 Oct 2022 13:17:29 +0200
Julia Suvorova wrote:
> Signed-off-by: Julia Suvorova
> Message-Id: <20220731162141.178443-4-jus...@redhat.com>
Acked-by: Igor Mammedov
> ---
> tests/data/acpi/q35/APIC.core-count2| 0
> tests/data/acpi/q35/DSDT.core-count2
uvorova
> Message-Id: <20220731162141.178443-5-jus...@redhat.com>
Reviewed-by: Igor Mammedov
> ---
> tests/qtest/bios-tables-test.c | 58 ++
> 1 file changed, 45 insertions(+), 13 deletions(-)
>
> diff --git a/tests/qtest/bios-tables-te
On Tue, 6 Sep 2022 09:10:32 -0400
"Michael S. Tsirkin" wrote:
> On Tue, Sep 06, 2022 at 01:41:08PM +0200, Igor Mammedov wrote:
> > On Fri, 1 Jul 2022 09:34:58 -0400
> > Igor Mammedov wrote:
> >
> > > Flushing out ACPI PCI cleanups that preceed convers
X2APIC configuration checks",
> 2022-05-16)
> dc89f32d92 ("target/i386: Fix sanity check on max APIC ID / X2APIC
> enablement", 2022-05-16)
>
> We may want to have this for stable too (mostly for 7.1.0 only). Adding a
> fixes tag.
>
> Cc: David W
On Thu, 22 Sep 2022 20:29:12 +0800
Robert Hoo wrote:
> On Thu, 2022-09-22 at 20:21 +0800, Robert Hoo wrote:
> > And empty bios-tables-test-allowed-diff.h.
> >
> > Diff of ASL form, from qtest testlog.txt:
> >
> > --- /tmp/asl-RFWZS1.dsl 2022-09-22 18:25:06.191519589 +0800
> > +++
On Fri, 23 Sep 2022 21:27:08 -0400
Peter Xu wrote:
> On Fri, Sep 23, 2022 at 06:03:44PM -0400, Peter Xu wrote:
> > On Fri, Sep 23, 2022 at 10:41:59AM +0200, Igor Mammedov wrote:
> > > It's worth putting history excavation with explanation what is broken and
> >
On Fri, 23 Sep 2022 10:20:34 +0200
Igor Mammedov wrote:
> On Thu, 22 Sep 2022 12:40:01 -0400
> Peter Xu wrote:
>
> > On Thu, Sep 22, 2022 at 03:46:17PM +0200, Igor Mammedov wrote:
> > > On Wed, 21 Sep 2022 12:12:27 -0400
> > > Peter Xu wrote:
> > &
On Thu, 22 Sep 2022 12:40:01 -0400
Peter Xu wrote:
> On Thu, Sep 22, 2022 at 03:46:17PM +0200, Igor Mammedov wrote:
> > On Wed, 21 Sep 2022 12:12:27 -0400
> > Peter Xu wrote:
> >
> > > It's true that when vcpus<=255 we don't require the length of 32bit APIC
want to enable x2apic, we can use eim=off in the
> intel-iommu parameters to skip enabling KVM x2apic.
>
> This partly reverts commit 77250171bdc02aee106083fd2a068147befa1a38, while
> keeping the valid bit on checking split irqchip, but revert the other change.
>
> Cc: David Woo
On Tue, 20 Sep 2022 20:28:31 +0800
Robert Hoo wrote:
> On Tue, 2022-09-20 at 11:13 +0200, Igor Mammedov wrote:
> > On Fri, 16 Sep 2022 21:15:35 +0800
> > Robert Hoo wrote:
> >
> > > On Fri, 2022-09-16 at 09:37 +0200, Igor Mammedov wrote:
> > >
On Tue, 20 Sep 2022 14:15:36 +0100
Peter Maydell wrote:
> On Wed, 24 Aug 2022 at 16:04, Igor Mammedov wrote:
> >
> > On Tue, 16 Aug 2022 17:49:57 +0800
> > Keqian Zhu wrote:
> >
> > > Setup an ARM virtual machine of machine virt and execute qmp
> &g
On Fri, 16 Sep 2022 21:15:35 +0800
Robert Hoo wrote:
> On Fri, 2022-09-16 at 09:37 +0200, Igor Mammedov wrote:
>
> > > Fine, get your point now.
> > > In ASL it will look like this:
> > > Local1 = Package (0x3) {STTS, SLSA, MAXT}
> &g
> them step by step. This is the step for qapi/acpi.py.
>
> Said commit explains the transformation in more detail. The invariant
> violations mentioned there do not occur here.
>
> Cc: Michael S. Tsirkin
> Cc: Igor Mammedov
> Cc: Ani Sinha
> Signed-off-by:
On Fri, 16 Sep 2022 10:27:08 +0800
Robert Hoo wrote:
> On Fri, 2022-09-09 at 15:39 +0200, Igor Mammedov wrote:
> ...
> > looks more or less fine except of excessive use of named variables
> > which creates global scope variables.
> >
> > I'd suggest to store tempor
yet)
> - fast short CMPSB, SCASB (KVM doesn't support yet)
>
> Signed-off-by: Wang, Lei
> Reviewed-by: Robert Hoo
looks fine to me,
Acked-by: Igor Mammedov
> ---
> target/i386/cpu.c | 128 ++
> target/i386/cpu.h | 4 ++
>
On Fri, 09 Sep 2022 22:02:34 +0800
Robert Hoo wrote:
> On Fri, 2022-09-09 at 15:39 +0200, Igor Mammedov wrote:
> > On Thu, 1 Sep 2022 11:27:20 +0800
> > Robert Hoo wrote:
> >
> > > Recent ACPI spec [1] has defined NVDIMM Label Methods _LS{I,R,W},
> > &g
On Thu, 1 Sep 2022 11:27:20 +0800
Robert Hoo wrote:
> Recent ACPI spec [1] has defined NVDIMM Label Methods _LS{I,R,W}, which
> deprecates corresponding _DSM Functions defined by PMEM _DSM Interface spec
> [2].
>
> Since the semantics of the new Label Methods are same as old _DSM
> methods,
ec,
> Section 3. [1]
>
> No functional changes in this patch.
>
> [1] https://pmem.io/documents/IntelOptanePMem_DSM_Interface-V2.0.pdf
>
> Signed-off-by: Robert Hoo
> Reviewed-by: Jingqi Liu
Reviewed-by: Igor Mammedov
> ---
> hw/acpi/nvdimm.c | 4 ++--
> 1 file changed,
ond reboot,
> virt_acpi_build_update() is called with a NULL "build_state" and
> returns without updating the ACPI tables. This seems to be
> upsetting the firmware.
>
> To fix this, don't change the callback_opaque in fw_cfg_modify_bytes_read().
Fixes: bdbb5b1706d165
On Fri, 1 Jul 2022 09:34:58 -0400
Igor Mammedov wrote:
> Flushing out ACPI PCI cleanups that preceed conversion of
> DSDT PCI slots ennumeration to AcpiDevAmlIf interface.
> It's is mostly collection of patches thraet removes code
> duplication, we've accumulated around PCI
On Mon, 5 Sep 2022 22:25:25 +0530 (IST)
Ani Sinha wrote:
> On Mon, 5 Sep 2022, Ani Sinha wrote:
>
> >
> >
>
> > > >
> > > > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > > > index 0355bd3dda..3dc9379f27 100644
> > > > --- a/hw/i386/acpi-build.c
> > > > +++
On Mon, 5 Sep 2022 12:55:31 +0530
Ani Sinha wrote:
> Possible fix for https://bugzilla.redhat.com/show_bug.cgi?id=2089545
>
> Change in AML:
>
> @@ -47,33 +47,39 @@
> Scope (_SB)
> {
> Device (PCI0)
> {
> Name (_HID, EisaId ("PNP0A08") /* PCI Express
On Wed, 24 Aug 2022 21:46:58 +0530
Ani Sinha wrote:
> On Wed, Aug 24, 2022 at 8:54 PM Igor Mammedov wrote:
>
> > On Mon, 22 Aug 2022 14:38:09 +0530
> > Ani Sinha wrote:
> >
> > > Currently the bit 0 of the flags field of Root Port ATS capability
> >
On Sun, 31 Jul 2022 18:21:40 +0200
Julia Suvorova wrote:
> The new test is run with a large number of cpus and checks if the
> core_count field in smbios_cpu_test (structure type 4) is correct.
>
> Choose q35 as it allows to run with -smp > 255.
>
> Signed-off-by: Julia Suvorova
pls, run
On Sun, 31 Jul 2022 18:21:38 +0200
Julia Suvorova wrote:
> Introduce the 64-bit entry point. Since we no longer have a total
> number of structures, stop checking for the new ones at the EOF
> structure (type 127).
needs fixing checkpatch warnings
other than that
Reviewed-by: Igor
res than 256, and contains the actual core number per socket if
> we have more.
>
> core_enabled2 and thread_count2 fields work the same way.
>
> Signed-off-by: Julia Suvorova
I'd fix up checkpatch warnings but otherwise looks good to me
Reviewed-by: Igor Mammedov
> -
On Mon, 22 Aug 2022 14:38:09 +0530
Ani Sinha wrote:
> Currently the bit 0 of the flags field of Root Port ATS capability reporting
> structure sub-table under the DMAR table is set to 1. This indicates
> ALL_PORTS,
> thus enabling ATS capability for all pcie roots without the ability to turn
>
y=47,
> argv=argv@entry=0xf518, envp=envp@entry=0x0) at ../softmmu/main.c:38
> #14 0xab16f99c in main (argc=47, argv=0xf518) at
> ../softmmu/main.c:47
>
> Fixes: ebb62075021a ("hw/acpi: Add ACPI Generic Event Device Support")
> Signed-off-by: Ke
On Sun, 14 Aug 2022 22:55:19 +0800
WANG Xuerui wrote:
> From: WANG Xuerui
>
> Previously both "foo" and "foo-loongarch-cpu" are accepted for the -cpu
> command-line option, the latter of which being excessively long and
> redundant, hence unwanted. Remove support for consistency with other
>
On Thu, 28 Jul 2022 09:37:13 -0400
Igor Mammedov wrote:
> OSK value is irrelevant for ACPI test case.
> Supply fake OSK explicitly to prevent QEMU complaining about
> invalid key when it fallbacks to default_osk.
>
> Suggested-by: Daniel P. Berrangé
> Signed-off-by: Igor
On Mon, 08 Aug 2022 19:57:23 +0200
BB wrote:
> Am 8. August 2022 14:15:40 MESZ schrieb Igor Mammedov :
> >On Wed, 3 Aug 2022 19:26:30 +0200
> >Bernhard Beschow wrote:
> >
> >> On Tue, Aug 2, 2022 at 8:37 AM Philippe Mathieu-Daudé via <
> >> qemu-devel
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