Signed-off-by: Igor Mammedov
---
hw/char/serial-isa.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c
index 7a7ed239cd..141a6cb168 100644
--- a/hw/char/serial-isa.c
+++ b/hw/char/serial-isa.c
@@ -27,7 +27,7
Signed-off-by: Igor Mammedov
---
hw/i386/acpi-build.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 85a7313cad..414b9240b2 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1748,16 +1748,10
Signed-off-by: Igor Mammedov
---
hw/block/fdc-isa.c | 16 ++--
hw/i386/acpi-build.c | 1 -
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c
index fa20450747..fee1ca68a8 100644
--- a/hw/block/fdc-isa.c
+++ b/hw/block/fdc-isa.c
Signed-off-by: Igor Mammedov
---
hw/char/parallel.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/hw/char/parallel.c b/hw/char/parallel.c
index f735a6cd7f..1c9ca47820 100644
--- a/hw/char/parallel.c
+++ b/hw/char/parallel.c
@@ -28,7 +28,7 @@
#include "
0x20, // Length
-)
-IRQNoFlags ()
- {6}
- })
-}
-}
-
Scope (\_SB)
{
Scope (PCI0)
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
tests/data/acpi/q35/DSDT.applesmc | Bi
To allow incremental conversion from ISADeviceClass::build_aml
to AcpiDevAmlIf, add support for the later without removing
the former. Once conversion is complete, another commit will
drop ISADeviceClass::build_aml related code.
Signed-off-by: Igor Mammedov
---
hw/isa/isa-bus.c | 5 +
1
contextual where devices scattered across DSDT
are consolidated under respective device that
hosts bus they are attached to.
PS:
+ series adds several ACPI tests for devices
that were missing them.
Igor Mammedov (35):
acpi: add interface to build device specific AML
acpi: make isa_build_aml
Signed-off-by: Igor Mammedov
---
tests/qtest/bios-tables-test-allowed-diff.h | 31 +
1 file changed, 31 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..d95f4b25c4 100644
--- a/tests/qtest
. It will
allow get rid of some data-mining and ad-hoc AML building,
by asking device(s) to generate its own AML blob like it's
done for ISA devices.
Signed-off-by: Igor Mammedov
---
include/hw/acpi/acpi_aml_interface.h | 40
hw/acpi/acpi_interface.c | 8 ++
hw
is a partial conversion, as it only fetches
AML from slave devices attached to its I2C bus.
The conversion will be completed when PCI bus is
switched to use AcpiDevAmlIf and build_smb0() could be
dropped.
Signed-off-by: Igor Mammedov
---
hw/i2c/smbus_ich9.c | 15 +++
1 file changed, 15
On Thu, 12 May 2022 17:05:41 +0100
Peter Maydell wrote:
> On Thu, 12 May 2022 at 16:59, Eric Auger wrote:
> >
> > Hi Peter,
> >
> > On 5/12/22 15:08, Peter Maydell wrote:
> > > On Thu, 5 Mar 2020 at 16:52, Eric Auger wrote:
> > >> The tests themselves are the same as the ISA device ones.
>
On Tue, 10 May 2022 09:14:19 +0100
Daniel P. Berrangé wrote:
> On Tue, May 10, 2022 at 09:03:25AM +0200, Igor Mammedov wrote:
> > On Mon, 9 May 2022 13:03:38 +0100
> > Daniel P. Berrangé wrote:
> >
> > > On Mon, May 09, 2022 at 09:12:49AM +0200, Igor Mammedov
On Mon, 9 May 2022 18:41:17 +0700
"Suthikulpanit, Suravee" wrote:
> Igor,
>
> On 5/9/2022 2:12 PM, Igor Mammedov wrote:
> > On Wed, 4 May 2022 08:16:39 -0500
> > Suravee Suthikulpanit wrote:
> >
> >> This is the maximum number of vCPU s
On Mon, 9 May 2022 13:03:38 +0100
Daniel P. Berrangé wrote:
> On Mon, May 09, 2022 at 09:12:49AM +0200, Igor Mammedov wrote:
> > On Wed, 4 May 2022 08:16:39 -0500
> > Suravee Suthikulpanit wrote:
> >
> > > This is the maximum number of vCPU supported by
>
On Wed, 4 May 2022 08:16:39 -0500
Suravee Suthikulpanit wrote:
> This is the maximum number of vCPU supported by
> the AMD x2APIC virtualization.
>
> Signed-off-by: Suravee Suthikulpanit
> ---
> hw/i386/pc_q35.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Thu, 05 May 2022 21:26:59 +0800
Robert Hoo wrote:
> On Thu, 2022-05-05 at 10:50 +0200, Igor Mammedov wrote:
> ...
> > > > > > > @@ -1247,6 +1247,11 @@ static void nvdimm_build_fit(Aml
> > > > > > > *dev)
> > > >
On Thu, 05 May 2022 11:07:53 +0800
Robert Hoo wrote:
> On Tue, 2022-05-03 at 10:27 +0200, Igor Mammedov wrote:
> > On Fri, 29 Apr 2022 17:01:47 +0800
> > Robert Hoo wrote:
> >
> > > On Wed, 2022-04-27 at 16:34 +0200, Igor Mammedov wrote:
> > &g
On Tue, 3 May 2022 22:03:02 +0800
Gavin Shan wrote:
> In aarch64_numa_cpu(), the CPU and NUMA association is something
> like below. Two threads in the same core/cluster/socket are
> associated with two individual NUMA nodes, which is unreal as
> Igor Mammedov mentioned. We
ciate
> CPU with its NUMA node.
>
> * hw/core/machine.c::machine_numa_finish_cpu_init() to record
> CPU slots with no NUMA mapping set.
>
> * hw/core/machine-hmp-cmds.c::hmp_hotpluggable_cpus() to dump
> cluster-id.
>
> Signed-off-by: Gavin Shan
>
> Signed-off-by: Gavin Shan
> Reviewed-by: Yanan Wang
Acked-by: Igor Mammedov
> ---
> hw/arm/virt.c | 15 ++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 5bdd98e4a1..0fd7f9a6a1 100644
On Mon, 2 May 2022 18:07:00 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 5/2/22 4:52 PM, Igor Mammedov wrote:
> > On Mon, 25 Apr 2022 11:27:59 +0800
> > Gavin Shan wrote:
> >
> >> The CPU topology isn't enabled on arm/virt machine yet, but we're
> >>
On Fri, 29 Apr 2022 17:01:47 +0800
Robert Hoo wrote:
> On Wed, 2022-04-27 at 16:34 +0200, Igor Mammedov wrote:
> > On Tue, 12 Apr 2022 14:57:52 +0800
> > Robert Hoo wrote:
> >
> > > Since ACPI 6.2, previous NVDIMM/_DSM funcions "Get Namespace Label
>
On Mon, 25 Apr 2022 11:27:59 +0800
Gavin Shan wrote:
> The CPU topology isn't enabled on arm/virt machine yet, but we're
> going to do it in next patch. After the CPU topology is enabled by
> next patch, "thrad-id=1" becomes invalid because the CPU core is
^^^ typo
> preferred
On Tue, 12 Apr 2022 14:57:51 +0800
Robert Hoo wrote:
> The original NVDIMM _DSM functions (index 4~6) for label operations have
> been deprecated by new ACPI methods _LS{I,R,W}[1][2].
>
> Patch 1 implements the new _LS{I,R,W} methods, on top of old _DSM
> implementation.
>
> Patch 2 fixes some
On Tue, 12 Apr 2022 14:57:52 +0800
Robert Hoo wrote:
> Since ACPI 6.2, previous NVDIMM/_DSM funcions "Get Namespace Label Data
> Size (function index 4)", "Get Namespace Label Data (function index 5)",
> "Set Namespace Label Data (function index 6)" has been deprecated by ACPI
where it's said
vdimm acpi: save arg3 of _DSM method")
> Signed-off-by: Robert Hoo
> Reviewed-by: Jingqi Liu
Reviewed-by: Igor Mammedov
> ---
> hw/acpi/nvdimm.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
>
On Fri, 15 Apr 2022 15:07:33 +0800
Robert Hoo wrote:
> On Thu, 2022-03-24 at 09:22 +0100, Igor Mammedov wrote:
> > On Mon, 14 Mar 2022 16:50:59 +0800
> > Robert Hoo wrote:
> >
> > > Icelake, is the codename for Intel 3rd generation Xeon Scalable
> > &g
ge
Alternatively allow shpc on builtin pxb bridge, by adding a property
that could turn it on, as it's explicitly disabled at the moment:
pxb_dev_realize_common():
qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false);
> Regards,
> Eric Ren
>
> On Fri, 22 Apr 2022 at 16:57, Igor
On Fri, 22 Apr 2022 09:29:20 +0100
Daniel P. Berrangé wrote:
> On Fri, Apr 22, 2022 at 03:17:11PM +0800, Eric Ren wrote:
> > Hi Marcel and all,
> >
> > It fails when I want to hotplug device to PXB bus. Then, I find this
> > commit that explicitely declares the fact that PXB bus does not
void by reusing the existing IDs in
> ms->possible_cpus. Currently, the only user of build_pptt() is
> arm/virt machine.
>
> Signed-off-by: Gavin Shan
Looks fine to me, so
Acked-by: Igor Mammedov
Also do we have a bios-tables tests that watches over/tests PPTT table?
if not pl
On Wed, 20 Apr 2022 22:24:46 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 4/20/22 7:50 PM, Igor Mammedov wrote:
> > On Wed, 20 Apr 2022 18:31:02 +0800
> > Gavin Shan wrote:
> >> On 4/20/22 4:32 PM, Igor Mammedov wrote:
> >>> On Mon, 18 Apr 2
On Wed, 20 Apr 2022 18:31:02 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 4/20/22 4:32 PM, Igor Mammedov wrote:
> > On Mon, 18 Apr 2022 10:09:18 +0800
> > Gavin Shan wrote:
> >
> >> Currently, the SMP configuration isn't considered when the CPU
> >&
On Mon, 18 Apr 2022 10:09:18 +0800
Gavin Shan wrote:
> Currently, the SMP configuration isn't considered when the CPU
> topology is populated. In this case, it's impossible to provide
> the default CPU-to-NUMA mapping or association based on the socket
> ID of the given CPU.
>
> This takes
On Wed, 20 Apr 2022 13:19:34 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 4/19/22 4:54 PM, Igor Mammedov wrote:
> > On Thu, 14 Apr 2022 08:33:29 +0800
> > Gavin Shan wrote:
> >> On 4/13/22 9:52 PM, Igor Mammedov wrote:
> >>> On Sun, 3 Apr 2
On Thu, 14 Apr 2022 08:33:29 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 4/13/22 9:52 PM, Igor Mammedov wrote:
> > On Sun, 3 Apr 2022 22:59:53 +0800
> > Gavin Shan wrote:
> >
> >> When the PPTT table is built, the CPU topology is re-calculated, but
On Wed, 13 Apr 2022 15:08:33 -0400
Peter Xu wrote:
> On Wed, Apr 13, 2022 at 04:37:35PM +0200, Igor Mammedov wrote:
> > On Thu, 31 Mar 2022 08:41:01 -0400
> > Peter Xu wrote:
> >
> > > On Thu, Mar 31, 2022 at 10:47:33AM +0100, Stefan Hajnoczi wrote:
> &g
On Thu, 31 Mar 2022 08:41:01 -0400
Peter Xu wrote:
> On Thu, Mar 31, 2022 at 10:47:33AM +0100, Stefan Hajnoczi wrote:
> > On Wed, Mar 30, 2022 at 01:13:03PM -0400, Peter Xu wrote:
> > > On Wed, Mar 30, 2022 at 05:08:24PM +0100, Stefan Hajnoczi wrote:
> > > > On Wed, Mar 30, 2022 at
On Fri, 25 Mar 2022 15:19:41 -0400
Jagannathan Raman wrote:
> Assign separate address space for each device in the remote processes.
>
> Signed-off-by: Elena Ufimtseva
> Signed-off-by: John G Johnson
> Signed-off-by: Jagannathan Raman
> ---
> include/hw/remote/iommu.h | 18
>
On Sun, 3 Apr 2022 22:59:53 +0800
Gavin Shan wrote:
> When the PPTT table is built, the CPU topology is re-calculated, but
> it's unecessary because the CPU topology has been populated in
> virt_possible_cpu_arch_ids() on arm/virt machine.
>
> This reworks build_pptt() to avoid by reusing the
rty for PCI device")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/932
Signed-off-by: Igor Mammedov
---
include/hw/acpi/pcihp.h | 2 --
hw/acpi/acpi-pci-hotplug-stub.c | 4
hw/acpi/pcihp.c | 6 --
hw/acpi/piix4.c | 15 +++
binzciMKJhzqJ.bin
Description: Binary data
On Wed, 6 Apr 2022 18:36:41 +0100
"Dr. David Alan Gilbert" wrote:
> * Igor Mammedov (imamm...@redhat.com) wrote:
> > On Wed, 6 Apr 2022 17:11:09 +0100
> > "Dr. David Alan Gilbert" wrote:
> >
> > > * Igor Mammedov (imamm...@redhat.com)
On Wed, 6 Apr 2022 17:11:09 +0100
"Dr. David Alan Gilbert" wrote:
> * Igor Mammedov (imamm...@redhat.com) wrote:
> > On Wed, 6 Apr 2022 10:38:51 +0100
> > "Dr. David Alan Gilbert" wrote:
> >
> > > * Igor Mammedov (imamm...@redhat.com) w
On Wed, 6 Apr 2022 10:38:51 +0100
"Dr. David Alan Gilbert" wrote:
> * Igor Mammedov (imamm...@redhat.com) wrote:
> > On Wed, 6 Apr 2022 09:35:31 +0100
> > "Dr. David Alan Gilbert (git)" wrote:
> >
> > > From: "Dr. David Alan Gilber
On Wed, 6 Apr 2022 09:35:31 +0100
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> The 'acpi_index' field is a statically configured field, which for
> some reason is migrated; this never makes much sense because it's
> command line static.
that's true only for the
On Mon, 4 Apr 2022 18:48:00 +0800
Gavin Shan wrote:
> Hi Daniel,
>
> On 4/4/22 4:39 PM, Daniel P. Berrangé wrote:
> > On Sun, Apr 03, 2022 at 10:59:51PM +0800, Gavin Shan wrote:
> >> Currently, the SMP configuration isn't considered when the CPU
> >> topology is populated. In this case, it's
On Fri, 01 Apr 2022 12:07:56 +0800
Robert Hoo wrote:
> On Thu, 2022-03-31 at 16:41 +0200, Igor Mammedov wrote:
> > On Thu, 31 Mar 2022 21:08:12 +0800
> > Robert Hoo wrote:
> >
> > > >
> > > > Can user initialize/format LSA f
On Thu, 31 Mar 2022 21:08:12 +0800
Robert Hoo wrote:
> On Thu, 2022-03-31 at 14:09 +0200, Igor Mammedov wrote:
> > On Tue, 29 Mar 2022 15:07:43 +0800
> > Robert Hoo wrote:
> >
> > > Since v2.7, QEMU has supported the emulation of NVDIMM's labels.
> >
On Fri, 18 Mar 2022 20:18:19 +0100
Lukasz Maniak wrote:
> From: Łukasz Gieryk
>
> PCI device capable of SR-IOV support is a new, still-experimental
> feature with only a single working example of the Nvme device.
>
> This patch in an attempt to fix a double-free problem when a
>
On Tue, 29 Mar 2022 00:15:38 +0300
Maxim Davydov wrote:
> The command "query-init-properties" is needed to get values of properties
> after initialization (not only default value). It makes sense, for example,
> when working with x86_64-cpu.
> All machine types (and x-remote-object, because its
On Tue, 29 Mar 2022 15:07:41 +0800
Robert Hoo wrote:
> QEMU option "-device nvdimm,...,label-size=" designates a vNVDIMM with
> Label Storage Area (LSA), where stores the namespace labels and conforms to
> some format and rules defined by NVDIMM label protocol[1].
>
> Recent guest Kernel, will
On Tue, 29 Mar 2022 15:07:43 +0800
Robert Hoo wrote:
> Since v2.7, QEMU has supported the emulation of NVDIMM's labels.
> With -device nvdimm,...,lsa-size=, the vNVDIMM to guest has this
> capability. But if the emulated LSA area isn't initialized, guest Kernel
> can't enumerate it correctly.
>
On Tue, 29 Mar 2022 00:15:30 +0300
Maxim Davydov wrote:
> We need to be able to check machine type after its definition. It's
> necessary when using complicated inheritance of compatible features. For
> instance, this tool can help to find bugs in the machine type definition
> if the name of the
On Tue, 29 Mar 2022 00:15:32 +0300
Maxim Davydov wrote:
> Call pci_bus_get_w64_range can fail with the segmentation fault. For
> example, this can happen during attempt to get pci-hole64-end
>" immediately after initialization"
this too vague, pls provide a better description
and is possible a
On Tue, 29 Mar 2022 00:15:33 +0300
Maxim Davydov wrote:
> Attempt to get memory region if the device doesn't have hostmem may not be
> an error. This can be happen immediately after initialization (getting
> value without default one).
Above statement begs for expanded explanation
Pls rephrase
On Wed, 23 Mar 2022 15:24:37 +0800
Gavin Shan wrote:
> When the PPTT table is built, the CPU topology is re-calculated, but
> it's unecessary because the CPU topology has been populated in
> virt_possible_cpu_arch_ids() on arm/virt machine.
>
> This avoids to re-calculate the CPU topology by
On Wed, 23 Mar 2022 15:24:35 +0800
Gavin Shan wrote:
> Currently, the SMP configuration isn't considered when the CPU
> topology is populated. In this case, it's impossible to provide
> the default CPU-to-NUMA mapping or association based on the socket
> ID of the given CPU.
>
> This takes
On Sat, 26 Mar 2022 03:08:19 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 3/25/22 10:00 PM, Igor Mammedov wrote:
> > On Wed, 23 Mar 2022 15:24:38 +0800
> > Gavin Shan wrote:
> >
> >> The value of the following field has been used in ACPI PPTT table
> >
On Sat, 26 Mar 2022 02:49:59 +0800
Gavin Shan wrote:
> Hi Igor,
>
> On 3/25/22 9:19 PM, Igor Mammedov wrote:
> > On Wed, 23 Mar 2022 15:24:35 +0800
> > Gavin Shan wrote:
> >> Currently, the SMP configuration isn't considered when the CPU
> >> to
On Wed, 23 Mar 2022 15:24:38 +0800
Gavin Shan wrote:
> The value of the following field has been used in ACPI PPTT table
> to identify the corresponding processor. This takes the same field
> as the ACPI processor ID in MADT and SRAT tables.
>
> ms->possible_cpus->cpus[i].props.thread_id
socket.
>
> This fixes the issue by considering the socket ID when the default
> CPU-to-NUMA association is provided in virt_possible_cpu_arch_ids().
> With this applied, no more CPU topology broken warnings are seen
> from the Linux guest. The 6 CPUs are associated with NODE#0/1, but
> there are no CPU
On Wed, 23 Mar 2022 15:24:35 +0800
Gavin Shan wrote:
> Currently, the SMP configuration isn't considered when the CPU
> topology is populated. In this case, it's impossible to provide
> the default CPU-to-NUMA mapping or association based on the socket
> ID of the given CPU.
>
> This takes
On Tue, 22 Mar 2022 20:07:45 +0100
Philippe Mathieu-Daudé wrote:
> From: Philippe Mathieu-Daudé
>
> Both xsave_buf and hvf_caps are allocated in hvf_arch_init_vcpu(),
> free them in hvf_arch_vcpu_destroy().
>
> Reported-by: Mark Kanda
> Suggested-by: Igor Mammedov
>
since v5.2, now it's time to remove it completely
> from code.
>
> Signed-off-by: Robert Hoo
Reviewed-by: Igor Mammedov
> ---
> Note: This patch is a reword, rebase and resend of
> https://lore.kernel.org/qemu-devel/1619660147-136679-1-git-send-email-robert...@linux.in
On Tue, 22 Mar 2022 13:05:22 +0100
Philippe Mathieu-Daudé wrote:
> From: Philippe Mathieu-Daudé
>
> Fix vCPU hot-unplug related leak reported by Valgrind:
>
> ==132362== 4,096 bytes in 1 blocks are definitely lost in loss record 8,440
> of 8,549
> ==132362==at 0x4C3B15F:
FILES...
>
> Signed-off-by: Markus Armbruster
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Cédric Le Goater
> Reviewed-by: Alex Bennée
> Acked-by: Dr. David Alan Gilbert
for */i386/*
Reviewed-by: Igor Mammedov
nit:
possible miss, see below
[...]
> diff --gi
On Thu, 10 Mar 2022 17:11:14 +
Peter Maydell wrote:
> On Thu, 10 Mar 2022 at 16:30, Igor Mammedov wrote:
> >
> > Do On Thu, 10 Mar 2022 16:05:24 +
> > Peter Maydell wrote:
> >
> > > On Thu, 10 Mar 2022 at 15:36, Igor Mammedov wrote:
> &g
On Thu, 17 Mar 2022 11:13:44 +
David Woodhouse wrote:
> On Thu, 2022-03-17 at 10:05 +0100, Igor Mammedov wrote:
> > re-sending reply as something went wrong with headers (I suspect Daniel's
> > name formatting)
> > and email got bounced back.
> >
> > O
On Fri, 18 Mar 2022 14:34:12 +0800
"wangyanan (Y)" wrote:
> Hi Gavin,
>
> On 2022/3/3 11:11, Gavin Shan wrote:
> > When the PPTT table is built, the CPU topology is re-calculated, but
> > it's unecessary because the CPU topology, except the cluster IDs,
> > has been populated in
On Fri, 18 Mar 2022 21:00:35 +0800
"wangyanan (Y)" wrote:
> On 2022/3/18 17:56, Igor Mammedov wrote:
> > On Fri, 18 Mar 2022 14:23:34 +0800
> > "wangyanan (Y)" wrote:
> >
> >> Hi Gavin,
> >>
> >> On 2022/3/3 11:11, Ga
On Fri, 18 Mar 2022 14:23:34 +0800
"wangyanan (Y)" wrote:
> Hi Gavin,
>
> On 2022/3/3 11:11, Gavin Shan wrote:
> > The default CPU-to-NUMA association is given by
> > mc->get_default_cpu_node_id()
> > when it isn't provided explicitly. However, the CPU topology isn't fully
> > considered in
re-sending reply as something went wrong with headers (I suspect Daniel's name
formatting)
and email got bounced back.
On Wed, 16 Mar 2022 14:31:33 +
David Woodhouse wrote:
> On Wed, 2022-03-16 at 12:28 +0100, Igor Mammedov wrote:
> > Generally Daniel is right, as long as it's
On Wed, 16 Mar 2022 06:47:48 -0400
"Michael S. Tsirkin" wrote:
> On Wed, Mar 16, 2022 at 10:37:49AM +, David Woodhouse wrote:
> > On Wed, 2022-03-16 at 05:56 -0400, Michael S. Tsirkin wrote:
> > > On Wed, Mar 16, 2022 at 09:37:07AM +, David Woodhouse wrote:
> > > > Yep, that's the
On Mon, 14 Mar 2022 14:25:41 +
David Woodhouse wrote:
> The check on x86ms->apic_id_limit in pc_machine_done() had two problems.
>
> Firstly, we need KVM to support the X2APIC API in order to allow IRQ
> delivery to APICs >= 255. So we need to call/check kvm_enable_x2apic(),
> which was
On Fri, 11 Mar 2022 14:58:41 +
David Woodhouse wrote:
> On Fri, 2022-03-11 at 09:39 -0500, Igor Mammedov wrote:
> > if VM is started with:
> >
> >-enable-kvm -smp 256
> >
> > without specifying 'split' irqchip, VM might eventually boot
> > but no
ot;)
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2060691
Signed-off-by: Igor Mammedov
---
hw/i386/pc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index fd55fc725c..a612df5241 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -74
On Fri, 11 Mar 2022 06:37:56 +0100
Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
&g
d) // _DSM: Device-Specific
> Method
> {
> Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x03))
> }
> }
> }
> }
>
> -Name (MEMA, 0x43D1)
> +Name (MEMA, 0x43F5)
> }
>
On Fri, 11 Mar 2022 06:37:49 +0100
Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
> Reviewed-by: Alex Bennée
Reviewed-by: Igor Mammedov
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/qtest/bio
On Tue, 08 Feb 2022 16:38:27 +0800
Robert Hoo wrote:
> Hi,
>
> Can we remove the deprecated 'Icelake-Client' CPU model now? if so, I
> can rebase patch to latest and resend.
Please rebase and resend.
PS:
Also looking at deprecation commit 3e6a015cbd0f, it doesn't
have any reason behind
On Thu, 10 Mar 2022 13:18:35 -0500
Steven Sistare wrote:
> On 3/10/2022 12:28 PM, Steven Sistare wrote:
> > On 3/10/2022 11:00 AM, Igor Mammedov wrote:
> >> On Thu, 10 Mar 2022 10:36:08 -0500
> >> Steven Sistare wrote:
> >>
> >>> On 3/8/2022
On Thu, 10 Mar 2022 11:51:37 +0530
Ani Sinha wrote:
> On Mon, Feb 28, 2022 at 8:56 PM Ani Sinha wrote:
> >
> > e820 reserved entries were used before the dynamic entries with fw config
> > files
> > were intoduced into qemu with the following change:
> > 7d67110f2d9a6("pc: add etc/e820 fw_cfg
Do On Thu, 10 Mar 2022 16:05:24 +
Peter Maydell wrote:
> On Thu, 10 Mar 2022 at 15:36, Igor Mammedov wrote:
> >
> > On Wed, 9 Mar 2022 16:56:21 +
> > Peter Maydell wrote:
> > > ...also, in the device-introspect-test where I see this problem,
On Fri, 4 Mar 2022 16:16:38 +0530
Ani Sinha wrote:
> On Fri, Mar 4, 2022 at 4:11 PM Ani Sinha wrote:
> >
> > On Fri, Mar 4, 2022 at 3:48 PM Gerd Hoffmann wrote:
> > >
> > > On Thu, Mar 03, 2022 at 03:12:51PM +0530, Ani Sinha wrote:
> > > > On Thu, Mar 3, 2022 at 15:11 Gerd Hoffmann wrote:
On Thu, 10 Mar 2022 10:36:08 -0500
Steven Sistare wrote:
> On 3/8/2022 2:20 AM, Igor Mammedov wrote:
> > On Tue, 8 Mar 2022 01:50:11 -0500
> > "Michael S. Tsirkin" wrote:
> >
> >> On Mon, Mar 07, 2022 at 09:41:44AM -0500, Steven Sistare wrote:
> &
On Wed, 9 Mar 2022 16:56:21 +
Peter Maydell wrote:
> On Wed, 9 Mar 2022 at 16:53, Peter Maydell wrote:
> >
> > On Wed, 9 Mar 2022 at 16:21, Paolo Bonzini wrote:
> > >
> > > On 3/9/22 11:33, Peter Maydell wrote:
> > > > Hi; does anybody know how device reference counting is supposed
> >
On Tue, 8 Mar 2022 15:55:17 +0100
Gerd Hoffmann wrote:
I'd duplicate table changes fro 6/11 here,
so whoever looks on this commit later won't have to be a detective.
> Signed-off-by: Gerd Hoffmann
> ---
> tests/data/acpi/virt/SSDT.memhp | Bin 736 -> 736 bytes
> 1 file changed, 0
On Tue, 8 Mar 2022 01:50:11 -0500
"Michael S. Tsirkin" wrote:
> On Mon, Mar 07, 2022 at 09:41:44AM -0500, Steven Sistare wrote:
> > On 3/4/2022 5:41 AM, Igor Mammedov wrote:
> > > On Thu, 3 Mar 2022 12:21:15 -0500
> > > "Michael S. Tsirkin" wrote
On Sun, 6 Mar 2022 19:56:04 +0530
Ani Sinha wrote:
> On Sun, Mar 6, 2022 at 4:06 PM Michael S. Tsirkin wrote:
> >
> > On Fri, Mar 04, 2022 at 09:10:30PM +0530, Ani Sinha wrote:
> > > From: Liav Albani
> > >
> > > This can allow the guest OS to determine more easily if i8042 controller
> > >
On Wed, 2 Mar 2022 17:45:58 +0200
Liav Albani wrote:
> >>> but I feel quoting spec
> >>> and including table name is a good idea actually, but pls quote verbatim:
> >>>
> >> I don't do that and don't ask it from others.
> >>
> >> The reason being that pointing where to look in spec and
On Thu, 3 Mar 2022 11:25:25 +0800
Gavin Shan wrote:
> Hi Gerd,
>
> On 3/1/22 7:42 PM, Gerd Hoffmann wrote:
> >>> Unless it architecturally wrong thing i.e. (node size less than 128Mb)
> >>> ,in which case limiting it in QEMU would be justified, I'd prefer
> >>> firmware being fixed or it
On Thu, 3 Mar 2022 12:21:15 -0500
"Michael S. Tsirkin" wrote:
> On Wed, Dec 22, 2021 at 11:05:15AM -0800, Steve Sistare wrote:
> > Allocate anonymous memory using memfd_create if the memfd-alloc machine
> > option is set.
> >
> > Signed-off-by: Steve Sistare
> > ---
> > hw/core/machine.c |
On Tue, 1 Mar 2022 10:20:06 -0500
"Michael S. Tsirkin" wrote:
> On Tue, Mar 01, 2022 at 10:12:00AM -0500, Igor Mammedov wrote:
> > Q35 switched to ACPI PCI hotplug by default in since 6.1
> > machine type and migration worked as expected (with BARs
> > on tar
Type name will be used in followup patch for cast check
in pcihp code.
Signed-off-by: Igor Mammedov
---
include/hw/pci-bridge/xio3130_downstream.h | 15 +++
hw/pci-bridge/xio3130_downstream.c | 3 ++-
2 files changed, 17 insertions(+), 1 deletion(-)
create mode 100644
://lore.kernel.org/all/20220225100127.78974...@redhat.com/T/
Gitlab link:
https://gitlab.com/imammedo/qemu/-/tree/pcie_poweroff_acpi_regression_rhbz2053584_V2
Igor Mammedov (3):
pci: expose TYPE_XIO3130_DOWNSTREAM name
acpi: pcihp: pcie: set power on cap on parent slot
q35: compat: keep
see the same PCIe device and slot on src & dst.
1)
Fixes: d5daff7d312 (pcie: implement slot power control for pcie root ports)
Signed-off-by: Igor Mammedov
---
include/hw/acpi/pcihp.h | 1 +
hw/acpi/ich9.c | 20
hw/acpi/pcihp.c | 11 +++
hw/
uggested-by: "Michael S. Tsirkin"
Signed-off-by: Igor Mammedov
---
include/hw/pci/pcie.h | 1 +
hw/acpi/pcihp.c | 12 +++-
hw/pci/pcie.c | 11 +++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/
On Tue, 1 Mar 2022 15:22:17 +0530 (IST)
Ani Sinha wrote:
> On Tue, 1 Mar 2022, Igor Mammedov wrote:
>
> > On Mon, 28 Feb 2022 22:17:32 +0200
> > Liav Albani wrote:
> >
> > > This can allow the guest OS to determine more easily if i8042 controller
> >
On Tue, 1 Mar 2022 06:19:51 -0500
"Michael S. Tsirkin" wrote:
> On Tue, Mar 01, 2022 at 09:43:54AM +0100, Igor Mammedov wrote:
> > On Mon, 28 Feb 2022 22:17:32 +0200
> > Liav Albani wrote:
> >
> > > This can allow the guest OS to determine more eas
On Tue, 1 Mar 2022 08:29:05 +0530 (IST)
Ani Sinha wrote:
> On Mon, 28 Feb 2022, Liav Albani wrote:
>
> > This can allow the guest OS to determine more easily if i8042 controller
> > is present in the system or not, so it doesn't need to do probing of the
> > controller, but just initialize it
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