use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/ne2000.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ne2000.c b/hw/ne2000.c
index b668ad1..f8acaae 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -721,9 +721,6
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/ide/ich.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index e44339b..cb1c405 100644
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -77,11
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/ide/via.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 04f3290..e9e67de 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -160,11
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/vga-pci.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/hw/vga-pci.c b/hw/vga-pci.c
index ce9ec45..481f448 100644
--- a/hw/vga-pci.c
+++ b/hw/vga-pci.c
@@ -74,7
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/usb-ohci.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index d21c820..7ff2322 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/vt82c686.c | 35 ---
1 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/hw/vt82c686.c b/hw/vt82c686.c
index ca8f826..f23bea9 100644
--- a/hw/vt82c686.c
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pcnet-pci.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pcnet-pci.c b/hw/pcnet-pci.c
index 9415a1e..216cf81 100644
--- a/hw/pcnet-pci.c
+++ b/hw/pcnet-pci.c
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/ide/piix.c | 32 ++--
1 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index c349644..84f72b0 100644
--- a/hw/ide/piix.c
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/es1370.c | 24 +++-
1 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/hw/es1370.c b/hw/es1370.c
index 40cb48c..1ed62b7 100644
--- a/hw/es1370.c
+++ b/hw/es1370.c
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/eepro100.c | 72 +---
1 files changed, 32 insertions(+), 40 deletions(-)
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 05450e8..f010f78
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix4.c | 10 +++---
1 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/hw/piix4.c b/hw/piix4.c
index 71f1f84..9590e7b 100644
--- a/hw/piix4.c
+++ b/hw/piix4.c
@@ -86,15 +86,8
.git.yamah...@valinux.co.jp
From: Isaku Yamahata yamah...@valinux.co.jp
Date: Wed, 18 May 2011 09:58:21 +0900
Subject: [PATCH] pci: initialize prog_interface by common code
Add prog_interface to PCIDeviceInfo and initialize
prog_interface register in the common initialization code.
It's read-only
On Tue, May 17, 2011 at 04:21:11PM +0200, Jan Kiszka wrote:
I also succeeded with passing through a PCIe host device. Nicely, the
full set capabilities showed up on the guest side this way. But GPU
pass-through did not improve this way (it rather regressed, yet unclear
why).
Interesting.
I
On Thu, May 12, 2011 at 12:39:22PM +0200, Juan Quintela wrote:
Shribman, Aidan aidan.shrib...@sap.com wrote:
On Wed, May 11, 2011 at 8:58 AM, Shribman, Aidan
aidan.shrib...@sap.com wrote:
From: Aidan Shribman aidan.shrib...@sap.com
[PATCH] Add warmup phase for live migration of
On Thu, May 05, 2011 at 03:41:57PM +0300, Michael S. Tsirkin wrote:
On Fri, Apr 08, 2011 at 09:52:59PM +0900, Isaku Yamahata wrote:
vender id/device id... in configuration space are read-only registers
which are commonly defined for all pci devices.
So initialize them in common code
━
From: Isaku Yamahata [mailto:yamah...@valinux.co.jp]
To: Adnan Khaleel [mailto:ad...@khaleel.us]
Cc: Hu Tao [mailto:hu...@cn.fujitsu.com], qemu-devel@nongnu.org
Sent: Wed, 20 Apr 2011 21:07:46 -0500
Subject: Re: [Qemu-devel] [PATCH 00/26] q35 chipset support
I forgot to changet its HEAD. Now it's fixed.
So please change the branch manually or clone the repo again.
On Tue, Apr 19, 2011 at 04:58:32PM +0800, Hu Tao wrote:
On Tue, Apr 19, 2011 at 05:51:27PM +0900, Isaku Yamahata wrote:
On Tue, Apr 19, 2011 at 04:28:01PM +0800, Hu Tao wrote:
On Wed
.
rm: cannot remove directory
`/users/akhaleel/akhaleel/MergeSpace/qemu_0.14_q35/
qemu/.git/clone-tmp': Directory not empty
Adnan
━
From: Isaku Yamahata [mailto:yamah...@valinux.co.jp]
To: Hu Tao
On Mon, Apr 18, 2011 at 06:26:08PM +0200, Juan Quintela wrote:
Isaku Yamahata yamah...@valinux.co.jp wrote:
It's vmstate parameter was wrong. This patch fixes it.
Reported-by: Avi Kivity a...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/acpi_piix4.c |3
On Tue, Apr 19, 2011 at 04:28:01PM +0800, Hu Tao wrote:
On Wed, Mar 16, 2011 at 06:29:11PM +0900, Isaku Yamahata wrote:
This patch series adds basic q35 chipset support for native pci express
support. Some bios related patches are still needed.
For those who want to try it, the following
On Tue, Apr 19, 2011 at 02:33:46PM +0200, Juan Quintela wrote:
Isaku Yamahata yamah...@valinux.co.jp wrote:
shouldn't last one still be uint16_t?
It results in an error by type_check_pointer.
You are right. We are just lying. Will think about how to fix this
properly (basically move
On Sun, Apr 17, 2011 at 06:53:12PM +0300, Avi Kivity wrote:
On 04/17/2011 04:50 PM, Isaku Yamahata wrote:
On Sun, Apr 17, 2011 at 04:17:51PM +0300, Avi Kivity wrote:
On 03/16/2011 11:29 AM, Isaku Yamahata wrote:
factor out ACPI GPE logic. Later it will be used by ICH9 ACPI.
I think
On Mon, Apr 18, 2011 at 11:22:40AM +0300, Avi Kivity wrote:
Are you using qemu-kvm.git or qemu.git? I think there are indeed two
issues, your patch fixes the first and there is another that is specific
to qemu-kvm.
I'm using qemu.git. I've start to have a look at qemu-kvm.git,
--
It's vmstate parameter was wrong. This patch fixes it.
Reported-by: Avi Kivity a...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/acpi_piix4.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c
index 96f5222
On Sun, Apr 17, 2011 at 04:17:51PM +0300, Avi Kivity wrote:
On 03/16/2011 11:29 AM, Isaku Yamahata wrote:
factor out ACPI GPE logic. Later it will be used by ICH9 ACPI.
I think this patch is causing qemu-kvm failures on migration:
(gdb) bt
#0 0x0049aff4 in qemu_put_be16s (f
formatting fixes, thanks to
Stefan Hajnoczi for suggestions, with changes from
Isaku Yamahata, and with my further refinements.
Signed-off-by: Michael Tokarev m...@tls.msk.ru
---
hw/acpi.c | 293
---
qemu-options.hx |7 +-
2
On Tue, Apr 12, 2011 at 01:13:15PM +0800, Wen Congyang wrote:
This bug is introduced by commit 23910d3f.
Oh, Thanks. Good catch. I agree with the first hunk.
But what is the second hunk for? The GPE STS register is W1C.
(NULL check and 0xff masking is okay. it's a bit redundant, though)
From
On Tue, Apr 12, 2011 at 05:08:18PM +0800, Wen Congyang wrote:
At 04/12/2011 04:48 PM, Isaku Yamahata Write:
On Tue, Apr 12, 2011 at 01:13:15PM +0800, Wen Congyang wrote:
This bug is introduced by commit 23910d3f.
Oh, Thanks. Good catch. I agree with the first hunk.
But what
Thank you. Looks good.
On Tue, Apr 12, 2011 at 05:27:44PM +0800, Wen Congyang wrote:
This bug is introduced by commit 23910d3f.
Signed-off-by: Wen Congyang we...@cn.fujitsu.com
---
hw/acpi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/acpi.c
On Sat, Apr 09, 2011 at 10:38:10AM +0200, Jan Kiszka wrote:
On 2011-04-04 04:15, Isaku Yamahata wrote:
On Mon, Apr 04, 2011 at 08:42:07AM +0900, Isaku Yamahata wrote:
Thank you for applying. But I found that the patch is wrong and
I'm preparing the new one. Can you please revert
On Sat, Apr 09, 2011 at 01:26:07PM +0200, Jan Kiszka wrote:
On first glance, it looks like KVM's in-kernel IOAPIC model is affected
by the same issue.
Agreed.
As you have the test case at hand, could you run it
against qemu-kvm which stresses the kernel version?
Unfortunately I don't have
vender id/device id... in configuration space are read-only registers
which are commonly defined for all pci devices.
So initialize them in common code and it simplifies the initialization a bit.
I converted some of them.
If this is the right direction, I'll convert the remaining devices.
Isaku
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/ide/piix.c | 29 -
1 files changed, 8 insertions(+), 21 deletions(-)
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index c349644..2736b48 100644
--- a/hw/ide/piix.c
+++ b
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/usb-uhci.c | 38 +++---
1 files changed, 11 insertions(+), 27 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 346db3e..16c4f3f 100644
--- a/hw/usb
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/eepro100.c | 60 +---
1 files changed, 27 insertions(+), 33 deletions(-)
diff --git a/hw/eepro100.c b/hw/eepro100.c
index f2505e4..8f82bfd
Use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/apb_pci.c | 13 ++---
1 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 84e9af7..974c87a 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/dec_pci.c | 27 ---
1 files changed, 8 insertions(+), 19 deletions(-)
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index bf88f2a..0468aab 100644
--- a/hw/dec_pci.c
+++ b/hw
use PCIDeviceInfo to initialize ids.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/vmware_vga.c | 13 ++---
1 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 4656767..354c221 100644
--- a/hw/vmware_vga.c
+++ b/hw
vender id/device id... in configuration space are read-only registers
which are commonly defined for all pci devices.
So move those initialization into common place.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c | 46 --
hw/pci.h
On Mon, Apr 04, 2011 at 03:58:39PM +0400, Dmitry Eremin-Solenikov wrote:
On 4/3/11, Isaku Yamahata yamah...@valinux.co.jp wrote:
On Sat, Apr 02, 2011 at 06:47:37PM +0400, Dmitry Eremin-Solenikov wrote:
On 4/2/11, Isaku Yamahata yamah...@valinux.co.jp wrote:
Have you verified that all bus
consolidate smbus initialization for pc_piix, mips_malta and mips_fulong.
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Huacai Chen zltjiang...@gmail.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
hw/mips_fulong2e.c |9
simplify i440fx initialization by eliminating
i440fx_init_memory_mappings().
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pc.h |2 +-
hw/pc_piix.c |8 +---
hw/piix_pci.c | 15 ++-
3 files changed, 8 insertions(+), 17 deletions(-)
diff --git a/hw
Factor out smram/pam logic for later use.
Which will be used by q35 too.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Makefile.target |2 +-
hw/pam.c| 128 +++
hw/pam.h| 96
Factor out PC pam, smram logic. which will also be used for q35 later.
All the magic numbers are replaced with symbolic constants at the same.
As by product, pc_piix initalization is simplified a bit.
Isaku Yamahata (2):
pc/piix_pci: factor out smram/pam logic
pc, i440fx: simplify i440fx
On Sat, Apr 02, 2011 at 06:47:37PM +0400, Dmitry Eremin-Solenikov wrote:
On 4/2/11, Isaku Yamahata yamah...@valinux.co.jp wrote:
Have you verified that all bus devices have been qdevified since this
code has been added? I wouldn't bet it is the case.
I think his analysis is valid. So how
factor out ide initialization to call drive_get(IF_IDE)
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/ide.h |3 +++
hw/ide/core.c | 14 ++
hw/mips_fulong2e.c |9 +
hw/mips_malta.c| 10 +-
hw/mips_r4k.c | 10
Thank you for applying. But I found that the patch is wrong and
I'm preparing the new one. Can you please revert it?
On Sun, Apr 03, 2011 at 09:53:14PM +0200, Aurelien Jarno wrote:
On Wed, Mar 16, 2011 at 06:05:01PM +0900, Isaku Yamahata wrote:
- the trigger mode is edge at first
- During
On Mon, Apr 04, 2011 at 08:42:07AM +0900, Isaku Yamahata wrote:
Thank you for applying. But I found that the patch is wrong and
I'm preparing the new one. Can you please revert it?
Here is the corrected patch. The first wrong patch clears the interrupts
bit unconditionally. Which caused losing
Hi. SLIC table can be fed dynamically by utilize the existing fw_cfg interface.
Something like this. (This requires your qemu patch.)
This is just for showing the idea.
thanks,
diff --git a/src/acpi.c b/src/acpi.c
index 6428d9c..e0815bd 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -627,6 +627,7
supports NAPI.
TODO: test more OSes, stress test with save/load, live-migration
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c b/hw
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
/dummy_for_save_load_compat/pci_irq_levels_vmstate/g
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci
. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v4 - v5:
- fix piix_set_irq_pic()
Changes v3 - v4:
- replace irq_num with pirq or pci_intx
Changes v1 - v2:
- some minor clean ups
- commit log message
---
hw/piix_pci.c | 101
Sorry for late comment after the commit.
PRIx64 shouldn't be used instead of cast?
On Fri, Apr 01, 2011 at 10:08:23PM +0200, Aurelien Jarno wrote:
On Mon, Feb 28, 2011 at 10:22:33AM +0800, Wen Congyang wrote:
I enable acpi_piix4 debug, and got the following build errors:
# make
CC
:
ee27041a238d51247e30100d1909066978cd8858.1301703026.git.yamah...@valinux.co.jp
From: Isaku Yamahata yamah...@valinux.co.jp
Date: Sat, 2 Apr 2011 09:04:54 +0900
Subject: [PATCH] qdev: Register only one qbus_reset_all_fn() for system bus
This is the revised version of Dmitry's.
his report is as follows and this patch fixes
On Mon, Mar 28, 2011 at 11:21:23AM +0200, Markus Armbruster wrote:
Isaku Yamahata yamah...@valinux.co.jp writes:
On Mon, Mar 28, 2011 at 07:18:04AM +0200, Stefan Weil wrote:
Am 28.03.2011 04:17, schrieb Isaku Yamahata:
[...]
On Sat, Mar 26, 2011 at 10:53:09PM +0100, Stefan Weil wrote
On Sun, Mar 27, 2011 at 04:56:29PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 23, 2011 at 11:17:19AM +0900, Isaku Yamahata wrote:
v4 has minor typo. I sent it too early. Here's fixed one.
v3 - v4 Main changes are
- use pirq, pci_intx instead of irq_num in piix_pci.c
- patch 4/4
On Mon, Mar 28, 2011 at 01:34:02PM +0200, Michael S. Tsirkin wrote:
On Mon, Mar 28, 2011 at 08:19:56PM +0900, Isaku Yamahata wrote:
On Sun, Mar 27, 2011 at 04:56:29PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 23, 2011 at 11:17:19AM +0900, Isaku Yamahata wrote:
v4 has minor typo. I
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
piix_pci
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
reassert interrupts on load.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
- TODO: test more OSes, stress test with save/load, live-migration
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v4 - v5:
- fix piix_set_irq_pic()
Changes v3 - v4
Hi. cirrus_init_common() is used by both isa and pci cirrus.
and isa cirrus isn't qdevfied yet.
So what you want is
- remove qemu_register_reset() and cirrus_reset() from cirrus_init_common()
- add to PCIDeviceInfo cirrus_vga_info
.qdev.reset = cirrus_reset()
in order to use pci reset
On Mon, Mar 28, 2011 at 07:18:04AM +0200, Stefan Weil wrote:
Am 28.03.2011 04:17, schrieb Isaku Yamahata:
Hi. cirrus_init_common() is used by both isa and pci cirrus.
and isa cirrus isn't qdevfied yet.
So what you want is
- remove qemu_register_reset() and cirrus_reset() from
part independent patch series to make the merge easy.
Isaku Yamahata (4):
acpi, acpi_piix, vt82c686: factor out PM_TMR logic
acpi, acpi_piix, vt82c686: factor out PM1a EVT logic
acpi, acpi_piix, vt82c686: factor out PM1_CNT logic
acpi, acpi_piix: factor out GPE logic
hw/acpi.c | 197
factor out ACPI PM1a EVT logic.
Later this will be used by ich9 acpi.
Cc: Blue Swirl blauwir...@gmail.com
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v7 - v8:
- vt82c686
---
hw/acpi.c | 37
factor out ACPI GPE logic. Later it will be used by ICH9 ACPI.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/acpi.c | 66 ++
hw/acpi.h | 17 ++
hw/acpi_piix4.c | 95
factor out ACPI PM1_CNT logic. This will be used by ich9 acpi.
Cc: Blue Swirl blauwir...@gmail.com
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v7 - v8:
- vt82c686
---
hw/acpi.c | 49
Swirl blauwir...@gmail.com
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Change v8 - v9:
- qemu_get_clock_ns() and so on.
Changes v7 - v8:
- vt82c686.c
---
hw/acpi.c | 45
On Tue, Mar 22, 2011 at 03:40:16PM +0200, Michael S. Tsirkin wrote:
On Tue, Mar 22, 2011 at 09:50:37AM +0900, Isaku Yamahata wrote:
On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
@@ -37,8 +37,27 @@
typedef PCIHostState I440FXState;
+#define
/g
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
reassert interrupts on load.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
- TODO: test more OSes, stress test with save/load, live-migration
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- replace irq_num with pirq or pci_intx
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
a bit.
Changes v2 - v3:
- s/dummy_for_save_load_compat/pci_irq_levels_vmstate/g
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci
reassert interrupts on load.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
- TODO: test more OSes, stress test with save/load, live-migration
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- replace irq_num with pirq or pci_intx
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
On Mon, Mar 21, 2011 at 01:37:07PM +0200, Michael S. Tsirkin wrote:
+static int piix3_post_load(void *opaque, int version_id)
+{
+PIIX3State *piix3 = opaque;
+piix3_update_irq_levels(piix3);
Couldn't figure out why would we not want to
propagate the interrupts here.
Could you
On Mon, Mar 21, 2011 at 01:37:07PM +0200, Michael S. Tsirkin wrote:
+/* irq routing is changed. so rebuild bitmap */
+static void piix3_update_irq_levels(PIIX3State *piix3)
+{
+int pirq;
+
+piix3-pic_levels = 0;
+for (pirq = 0; pirq PIIX_NUM_PIRQS; pirq++) {
+
On Mon, Mar 21, 2011 at 02:31:11PM +0200, Michael S. Tsirkin wrote:
On Mon, Mar 21, 2011 at 09:10:32PM +0900, Isaku Yamahata wrote:
On Mon, Mar 21, 2011 at 01:37:07PM +0200, Michael S. Tsirkin wrote:
+static int piix3_post_load(void *opaque, int version_id)
+{
+PIIX3State *piix3
On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
@@ -37,8 +37,27 @@
typedef PCIHostState I440FXState;
+#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
+#define PIIX_NUM_PIRQS 4ULL/* PIRQ[A-D] */
I've changed this to
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- rename member s/dummy_for_save_load_compat
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v1 - v2:
- some minor clean ups
- commit log message
efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (3):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
hw/pci.c |7 +++
hw/pci.h |1 +
hw/piix_pci.c | 119
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
On Thu, Mar 17, 2011 at 07:29:09AM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 16, 2011 at 06:29:15PM +0900, Isaku Yamahata wrote:
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Isaku Yamahata (3):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
hw/pci.c
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 31 +--
1 files changed, 21 insertions(+), 10
optimize irq routing in piix_pic.c which has been a TODO.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 103 +---
1 files changed, 90 insertions(+), 13 deletions(-)
diff --git
On Thu, Mar 17, 2011 at 04:43:36PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 16, 2011 at 06:29:14PM +0900, Isaku Yamahata wrote:
introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is
standardized. PCI bridge swizzle is common logic, by introducing
this function duplicated
is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (3):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 94
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 31 +--
1 files changed, 21 insertions(+), 10
On Thu, Mar 17, 2011 at 04:41:08PM +0200, Michael S. Tsirkin wrote:
+static int piix3_post_load(void *opaque, int version_id)
+{
+PIIX3State *piix3 = opaque;
+piix3_rebuild_irq_levels(piix3);
Don't we need to set_irq_pic here as well?
And in that case, just make the for loop
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