[PATCH v4 3/6] Add i.MX6UL missing devices.

* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add 4 missing PWM devices Signed-off-by: Jean-Christophe Dubois Reviewed

[PATCH v4 5/6] Add i.MX7 missing TZ devices and memory regions

- ROM - CAAM Signed-off-by: Jean-Christophe Dubois Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx7.c | 63 +++ include/hw/arm/fsl-imx7.h | 7 + 2 files changed, 70 insertions(+) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index

[PATCH v4 6/6] Add i.MX7 SRC device implementation

applications. Signed-off-by: Jean-Christophe Dubois Reviewed-by: Peter Maydell --- hw/arm/fsl-imx7.c | 8 +- hw/misc/imx7_src.c | 276 + hw/misc/meson.build| 1 + hw/misc/trace-events | 4 + include/hw/arm/fsl-imx7.h | 3

[PATCH v4 2/6] Refactor i.MX6UL processor code

* Add Addr and size definition for most i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments Signed-off-by: Jean-Christophe Dubois

[PATCH v4 4/6] Refactor i.MX7 processor code

* Add Addr and size definition for all i.MX7 devices in i.MX7 header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments Signed-off-by: Jean-Christophe Dubois --- hw

[PATCH v4 1/6] Remove i.MX7 IOMUX GPR device from i.MX6UL

as an unimplemented device at the same bus adress and the 2 instantiations were actualy colliding. So we go back to the unimplemented device for now. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 11 --- include/hw/arm/fsl-imx6ul.h | 2 -- 2 files changed, 13

[PATCH v4 0/6] Complete i.MX6UL and i.MX7 processor for bare metal application.

w comments in code review. Jean-Christophe Dubois (6): Remove i.MX7 IOMUX GPR device from i.MX6UL Refactor i.MX6UL processor code Add i.MX6UL missing devices. Refactor i.MX7 processor code Add i.MX7 missing TZ devices and memory regions Add i.MX7 SRC device implementation hw/arm/fs

Re: [PATCH v3 1/5] Refactor i.MX6UL processor code

Le 02/08/2023 à 23:32, Philippe Mathieu-Daudé a écrit : Hi Jean-Christophe, On 2/8/23 23:08, Jean-Christophe Dubois wrote: * Add Addr and size definition for all i.MX6UL devices in i.MX6UL header file. I'm OK with your patch, but some addr/size are added, while other are changed. It is hard

[PATCH v3 3/5] Refactor i.MX7 processor code

* Add Addr and size definition for all i.MX7 devices in i.MX7 header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments Signed-off-by: Jean-Christophe Dubois --- hw

[PATCH v3 2/5] Add i.MX6UL TZ missing devices.

* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 12

[PATCH v3 5/5] Add i.MX7 SRC device implementation

application. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 8 +- hw/misc/imx7_src.c | 276 + hw/misc/meson.build| 1 + hw/misc/trace-events | 4 + include/hw/arm/fsl-imx7.h | 2 + include/hw/misc/imx7_src.h

[PATCH v3 0/5] Complete i.MX6UL and i.MX7 processor for bare metal application.

s since v1: * split the i.MX6UL patch into a refactor patch and an addon patch. * Split the i.MX7 patch into a refactor patch and an addon patch. * Fix SRC code after few comments in code review. Jean-Christophe Dubois (5): Refactor i.MX6UL processor code Add i.MX6UL TZ missing devices. Refa

[PATCH v3 4/5] Add i.MX7 missing TZ devices and memory regions

- ROM - CAAM Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 63 +++ include/hw/arm/fsl-imx7.h | 7 + 2 files changed, 70 insertions(+) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 3bb0da6850..7ca105fd24 100644 --- a/hw

[PATCH v3 1/5] Refactor i.MX6UL processor code

-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 149 +++ include/hw/arm/fsl-imx6ul.h | 150 +--- 2 files changed, 240 insertions(+), 59 deletions(-) diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 2189dcbb72

[PATCH v2 3/5] Refactor i.MX7 processor code

Add Addr and size definition for all i.MX7 devices in i.MX7 header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments Signed-off-by: Jean-Christophe Dubois --- hw

[PATCH v2 4/5] Add i.MX7 missing TZ devices and memory regions

- ROM - CAAM Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 63 +++ include/hw/arm/fsl-imx7.h | 7 + 2 files changed, 70 insertions(+) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 3bb0da6850..7ca105fd24 100644 --- a/hw

[PATCH v2 5/5] Add i.MX7 SRC device implementation

application. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 8 +- hw/misc/imx7_src.c | 276 + hw/misc/meson.build| 1 + hw/misc/trace-events | 4 + include/hw/arm/fsl-imx7.h | 2 + include/hw/misc/imx7_src.h

[PATCH v2 2/5] Add i.MX6UL TZ missing devices.

* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 12

[PATCH v2 1/5] Refactor i.MX6UL processor code

-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 149 include/hw/arm/fsl-imx6ul.h | 149 +--- 2 files changed, 239 insertions(+), 59 deletions(-) diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 2189dcbb72

[PATCH v2 0/5] Complete i.MX6UL and i.MX7 processor for bare metal application.

the i.MX7 patch into a refactor patch and an addon patch. * Fix SRC code after few comments in code review. Jean-Christophe Dubois (5): Refactor i.MX6UL processor code Add i.MX6UL TZ missing devices. Refactor i.MX7 processor code Add i.MX7 missing TZ devices and memory regions Add i.MX7

[PATCH 2/3] Rework i.MX7 device implementation/instantiation

From: jcdubois * Add Addr and size definition for all i.MX7 devices in i.MX7 header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add TZASC as unimplemented device. - Allow bare

[PATCH 3/3] Add i.MX7 SRC device implementation

7_src.c @@ -0,0 +1,289 @@ +/* + * IMX7 System Reset Controller + * + * Copyright (c) 2023 Jean-Christophe Dubois + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#incl

[PATCH 1/3] Rework i.MX6UL device implementation/instantiation

From: jcdubois * Add Addr and size definition for all i.MX6UL devices in i.MX6UL header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM (add missing PWM instances) - CAN * Add TZASC as

[PATCH 0/3] Complete i.MX6UL and i.MX7 processor for bare metal application.

why Linux is using the 2 cores in Qemu even if the SRC is not implemented. This is not the case when running bare metal application (like u-boot itself) that do not rely on the PSCI service being available. Jean-Christophe Dubois (3): Rework i.MX6UL device implementation/instantiation Rework i.

[PATCH] i.MX7D: Connect IRQs to GPIO devices.

IRQs were not associated to the various GPIO devices inside i.MX7D. This patch brings the i.MX7D on par with i.MX6. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 31 ++- include/hw/arm/fsl-imx7.h | 15 +++ 2 files changed, 45

[PATCH] i.MX6UL: Add a specific GPT timer instance for the i.MX6UL

The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c| 2 +- hw/misc/imx6ul_ccm.c | 6 -- hw/timer/imx_gpt.c | 25 + include/hw/timer/imx_gpt.h | 1 + 4 files changed

[PATCH] i.MX7D: Connect GPT timers to IRQ

So far the GPT timers were unable to raise IRQs to the processor. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 10 ++ include/hw/arm/fsl-imx7.h | 5 + 2 files changed, 15 insertions(+) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index cc6fdb9373

[PATCH] Fix i.MX GPT timers for i.MX6UL and i.MX7 processors

to the i.MX6UL GPT timer as its clock sources differ slightly from the i.MX7 version. Tested by running µCOS application on i.MX7D emulated processor. µCOS is using the GPT timer as its tick source. Jean-Christophe Dubois (3): i.MX7D: Connect GPT timers to IRQ i.MX7D: Compute clock frequency

[PATCH] i.MX7D: Compute clock frequency for the fixed frequency clocks.

CCM derived clocks will have to be added later. Signed-off-by: Jean-Christophe Dubois --- hw/misc/imx7_ccm.c | 49 +- 1 file changed, 40 insertions(+), 9 deletions(-) diff --git a/hw/misc/imx7_ccm.c b/hw/misc/imx7_ccm.c index 075159e497..f135ec7b7e

Re: [PATCH for-6.2] Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2"

Le 19/11/2021 à 17:34, Peter Maydell a écrit : This reverts commit 9fcd15b9193e819b6cc2fd0a45e3506148812bb4. This change turns out to cause regressions, for instance on the imx6ul boards as described here: https://lore.kernel.org/qemu-devel/c8b89685-7490-328b-51a3-48711c140...@tribudubois.net/

Re: Qemu and ARM secure state.

Le 09/11/2021 à 11:55, Peter Maydell a écrit : On Mon, 8 Nov 2021 at 22:09, Jean-Christophe DUBOIS wrote: OK, so one problem seems to be that PSCI-via-SMC is enabled on i.MX6UL when there is no built in PSCI related function on this processor. According the Linux DTS, i.MX7 (solo and dual

Re: Qemu and ARM secure state.

Le 08/11/2021 à 15:50, Peter Maydell a écrit : On Sat, 6 Nov 2021 at 18:11, Jean-Christophe DUBOIS wrote: One small question/remark: According to the the "Arm Power State Coordinate Interface" (DEN0022D.b) document (chapter 5) PSCI calls can only be issued by "normal wor

Re: Qemu and ARM secure state.

Le 08/11/2021 à 15:14, Alex Bennée a écrit : Jean-Christophe DUBOIS writes: One small question/remark: According to the the "Arm Power State Coordinate Interface" (DEN0022D.b) document (chapter 5) PSCI calls can only be issued by "normal world" (EL1 or EL2). Therefore,

Re: Qemu and ARM secure state.

psci_call() function? This would prevent calling the built-in Qemu PSCI function if SMC is issued  from secure state. Regards. JC Le 06/11/2021 à 14:04, Jean-Christophe DUBOIS a écrit : So it seems that what is needed is a way to choose on the command line if we want to enable the Qemu built-in

Re: Qemu and ARM secure state.

orm allows to dynamically choose one or the other. Other platforms seems to need the same feature. JC Le 06/11/2021 à 11:04, Jean-Christophe DUBOIS a écrit : So, I am trying to understand: Contrary to what I said, In my case the SMC instruction is not really a "no-op" as it sets

Re: Qemu and ARM secure state.

unknown PSCI request). Is there something I am missing? Regards JC Le 04/11/2021 à 22:11, Jean-Christophe DUBOIS a écrit : Le 04/11/2021 à 12:11, Peter Maydell a écrit : On Wed, 3 Nov 2021 at 13:27, Jean-Christophe DUBOIS wrote: I have a little application that is designed to work on th

Re: Qemu and ARM secure state.

Le 04/11/2021 à 12:11, Peter Maydell a écrit : On Wed, 3 Nov 2021 at 13:27, Jean-Christophe DUBOIS wrote: I have a little application that is designed to work on the i.MX6UL processor. I developed it and tested it on the mcimx6ul-evk platform emulated by Qemu. This application used to work

Re: [RFC PATCH] contrib/gitdm: Add more individual contributors

Acked-by Jean-Christophe Dubois On 04/10/2020 20:25, Philippe Mathieu-Daudé wrote: These individual contributors have a number of contributions, add them to the 'individual' group map. Cc: Ahmed Karaman Cc: Aleksandar Markovic Cc: Alistair Francis Cc: Artyom Tarasenko Cc: David Carlier

Re: [PATCH 0/3] Add ability to choose MDIO phy number to i.MX processors

This patch set is to be applied on top of the patch serie recently accepted by Peter on his tree. I guess I will have to wait a bit that his pull request is accepted in mainline before resubmitting my patch. JC Le 03/07/2020 à 22:44, no-re...@patchew.org a écrit : Patchew URL:

[PATCH 1/3] Add the ability to change the FEC PHY MDIO device number on i.MX25 processor

Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx25.c | 7 +++ include/hw/arm/fsl-imx25.h | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 7ab5c98fbe1..35874aac00b 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c

[PATCH 0/3] Add ability to choose MDIO phy number to i.MX processors

This patch set adds the ability to select the Ethernet PHY device number for the i.MX25 processor, the i.MX6 processor and the i.MX7 processor. Note: the i.MX6UL processor was addressed in a previous patch. Jean-Christophe Dubois (3): Add the ability to change the FEC PHY MDIO device number

[PATCH 3/3] Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor

Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 9 + include/hw/arm/fsl-imx7.h | 1 + 2 files changed, 10 insertions(+) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index b49d895a412..5dbf0e500aa 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c

[PATCH 2/3] Add the ability to change the FEC PHY MDIO device number on i.MX6 processor

Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6.c | 7 +++ include/hw/arm/fsl-imx6.h | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 4ae3c3efc28..0721f333497 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -402,6

Re: [PATCH] hw/misc/pca9552: Add missing TypeInfo::class_size field

x8453A4: object_class_get_list (object.c:1095) ==77479==by 0x556194: select_machine (vl.c:2416) ==77479==by 0x556194: qemu_init (vl.c:3828) ==77479==by 0x40AF9C: main (main.c:48) Fixes: 736132e455 ("hw/misc/pca9552: Add generic PCA955xClass") Reported-by: Jean-Christo

[PATCH 3/3] Select MDIO device 2 and 1 as PHY devices for i.MX6UL EVK board.

The i.MX6UL EVK 14x14 board uses: - PHY 2 for FEC 1 - PHY 1 for FEC 2 Signed-off-by: Jean-Christophe Dubois --- hw/arm/mcimx6ul-evk.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index 2f845cedfce..9033d3f8f38 100644 --- a/hw/arm/mcimx6ul

[PATCH 2/3] Add the ability to select a different PHY for each i.MX6UL FEC interface

Add properties to the i.MX6UL processor to be able to select a particular PHY on the MDIO bus for each FEC device. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx6ul.c | 10 ++ include/hw/arm/fsl-imx6ul.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/hw/arm

[PATCH 1/3] Add a phy-num property to the i.MX FEC emulator

We need a solution to use an Ethernet PHY that is not the first device on the MDIO bus (device 0 on MDIO bus). As an example with the i.MX6UL the NXP SOC has 2 Ethernet devices but only one MDIO bus on which the 2 related PHY are connected but at unique addresses. Signed-off-by: Jean-Christophe

[PATCH 0/3] Allow to specify the PHY number to use with a specific i.MX FEC/ENET Ethernet device

The PHY device associated to a specific i.MX Ethernet device is not necessarily at address 0 on the MDIO bus. This patch series adds the ability to set the PHY number on the MDIO bus for any i.MX6UL based board. Jean-Christophe Dubois (3): Add a phy-num property to the i.MX FEC emulator Add

Re: Crash when running Qemu.

/2020 à 17:57, Jean-Christophe DUBOIS a écrit : When ran from valgrind, qemu does not crash but the following output is returned. valgrind --track-origins=yes ../../qemu/qemu/arm-softmmu/qemu-system-arm -machine mcimx6ul-evk -m 128M -display none -serial stdio -kernel ./OS.elf ==77479== Memcheck

Re: Crash when running Qemu.

== ==77479== For lists of detected and suppressed errors, rerun with: -s ==77479== ERROR SUMMARY: 3 errors from 2 contexts (suppressed: 0 from 0) Le 28/06/2020 à 12:55, Jean-Christophe DUBOIS a écrit : Hi, Since the last pull I did this week end on the qemu git tree (master branch) I am unable

Re: Crash when running Qemu.

and suppressed errors, rerun with: -s ==77479== ERROR SUMMARY: 3 errors from 2 contexts (suppressed: 0 from 0) Le 28/06/2020 à 12:55, Jean-Christophe DUBOIS a écrit : Hi, Since the last pull I did this week end on the qemu git tree (master branch) I am unable to "start" qe

Crash when running Qemu.

Hi, Since the last pull I did this week end on the qemu git tree (master branch) I am unable to "start" qemu anymore (It was working OK from git master previously). Traces are provided bellow. Am I the only one to get this behavior? JC jcd@jcd-UX305CA:~/Projects/µCOS/work$

Re: [PATCH v5 3/3] hw/net/imx_fec: improve PHY implementation.

Le 15/06/2020 à 15:03, Peter Maydell a écrit : On Thu, 4 Jun 2020 at 13:39, Jean-Christophe Dubois wrote: improve the PHY implementation with more generic code. This patch remove a lot of harcoded values to replace them with generic symbols from header files. Signed-off-by: Jean-Christophe

Re: [PATCH v5 2/3] hw/net/imx_fec: Allow phy not to be the first device on the mii bus.

Le 15/06/2020 à 14:23, Peter Maydell a écrit : On Thu, 4 Jun 2020 at 13:39, Jean-Christophe Dubois wrote: Up to now we were allowing only one PHY device and it had to be the first device on the bus. The i.MX6UL has 2 Ethernet devices and can therefore have several PHY devices on the bus

[PATCH v2] hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers

Some bits of the CCM registers are non writable. This was left undone in the initial commit (all bits of registers were writable). This patch adds the required code to protect the non writable bits. Signed-off-by: Jean-Christophe Dubois --- v2: simplify code after feedback on the first patch

[PATCH v5 3/3] hw/net/imx_fec: improve PHY implementation.

improve the PHY implementation with more generic code. This patch remove a lot of harcoded values to replace them with generic symbols from header files. Signed-off-by: Jean-Christophe Dubois --- v2: Not present v3: Not present v4: Not present v5: improve PHY implementation. hw/net

[PATCH v5 2/3] hw/net/imx_fec: Allow phy not to be the first device on the mii bus.

-by: Jean-Christophe Dubois --- v2: Not present v3: Not present v4: Not present v5: Allow phy not to be the first device on the mii bus. hw/net/imx_fec.c| 19 --- hw/net/trace-events | 4 ++-- 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/hw/net/imx_fec.c b

[PATCH v5 0/3] hw/net/imx_fec: improve the imx fec emulator

header symbols instead of hardcoded values. Jean-Christophe Dubois (3): hw/net/imx_fec: Convert debug fprintf() to trace events hw/net/imx_fec: Allow phy not to be the first device on the mii bus. hw/net/imx_fec: improve PHY implementation. hw/net/imx_fec.c | 197

[PATCH v5 1/3] hw/net/imx_fec: Convert debug fprintf() to trace events

Signed-off-by: Jean-Christophe Dubois Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-Id: <20200530102707.195131-1-...@tribudubois.net> [PMD: Fixed 32-bit format string using PRIx32/PRIx64] Signed-off-by: Philippe Mathieu-Daudé --- Based-on: <202005301027

[PATCH v3] hw/net/imx_fec.c: Convert debug fprintf() to trace event

Signed-off-by: Jean-Christophe Dubois --- v2: fix coding style issues. v3: improve tracing code based on feedback * change some tracing function names * remove unnecessary cast * add register index in addition to name hw/net/imx_fec.c| 106

Re: [PATCH] hw/net/imx_fec.c: Convert debug fprintf() to trace event

Le 30/05/2020 à 09:49, Philippe Mathieu-Daudé a écrit : Hi Jean-Christophe, On 5/29/20 8:00 PM, Jean-Christophe Dubois wrote: Signed-off-by: Jean-Christophe Dubois --- hw/net/imx_fec.c| 101 ++-- hw/net/trace-events | 18 2 files

[PATCH v2] hw/net/imx_fec.c: Convert debug fprintf() to trace event

Signed-off-by: Jean-Christophe Dubois --- v2: fix coding style issues. hw/net/imx_fec.c| 101 ++-- hw/net/trace-events | 18 2 files changed, 58 insertions(+), 61 deletions(-) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index

[PATCH] hw/net/imx_fec.c: Convert debug fprintf() to trace event

Signed-off-by: Jean-Christophe Dubois --- hw/net/imx_fec.c| 101 ++-- hw/net/trace-events | 18 2 files changed, 58 insertions(+), 61 deletions(-) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 7adcc9df654..823dac0603b 100644

[PATCH] hw/misc/imx6ul_ccm.c: Implement non writable bits in CCM registers

Some bits of the CCM registers are non writable. This was left undone in the initial commit (all bits of registers were writable). This patch add the required code to protect non writable bits. Signed-off-by: Jean-Christophe Dubois --- hw/misc/imx6ul_ccm.c | 81

[Qemu-devel] [PATCH v3 3/3] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board

Tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board. Signed-off-by: Jean-Christophe Dubois --- Changes in V3: * None Changes in V2: * use object_initialize_child instead of several funcions hw/arm/Makefile.objs | 2 +- hw/arm/mcimx6ul-evk.c | 85

[Qemu-devel] [PATCH v3 2/3] i.MX6UL: Add i.MX6UL SOC

Signed-off-by: Jean-Christophe Dubois --- Changes in V3: * Fix coding style issue with indent. Changes in V2: * use object_initialize_child instead of several funcions * use sysbus_init_child_obj instead for several functions default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs

[Qemu-devel] [PATCH v3 0/3] i.MX: Add the i.MX6UL SOC and a reference board.

This series adds the i.MX6UL SOC from NXP/Freescale and the reference evaluation board. This series was tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board (with the appropriate device tree). Jean-Christophe Dubois (3): i.MX6UL: Add i.MX6UL specific CCM device

[Qemu-devel] [PATCH v3 1/3] i.MX6UL: Add i.MX6UL specific CCM device

Signed-off-by: Jean-Christophe Dubois --- Changes in V3: * None Changes in V2: * move all CCM "debug" to the "trace" framework for i.MX6UL * remove unecessary breaks * prevent g_assert_not_reached triggered by guest. * Add assert to help static analyzer. * us

[Qemu-devel] [PATCH v2 1/3] i.MX6UL: Add i.MX6UL specific CCM device

Signed-off-by: Jean-Christophe Dubois --- Changes in V2: * move all CCM "debug" to the "trace" framework for i.MX6UL * remove unecessary breaks * prevent g_assert_not_reached triggered by guest. * Add assert to help static analyzer. * use FIELD_EX32 from hw/regi

[Qemu-devel] [PATCH v2 0/3] i.MX: Add the i.MX6UL SOC and a reference board.

This series adds the i.MX6UL SOC from NXP/Freescale and the reference evaluation board. This series was tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board (with the appropriate device tree). Jean-Christophe Dubois (3): i.MX6UL: Add i.MX6UL specific CCM device

[Qemu-devel] [PATCH v2 3/3] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board

Tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board. Signed-off-by: Jean-Christophe Dubois --- Changes in V2: * use object_initialize_child instead of several funcions hw/arm/Makefile.objs | 2 +- hw/arm/mcimx6ul-evk.c | 85

[Qemu-devel] [PATCH v2 2/3] i.MX6UL: Add i.MX6UL SOC

Signed-off-by: Jean-Christophe Dubois --- Changes in V2: * use object_initialize_child instead of several funcions * use sysbus_init_child_obj instead for several functions default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs| 1 + hw/arm/fsl-imx6ul.c | 618

Re: [Qemu-devel] [PATCH 0/3] i.MX: Add the i.MX6UL SOC and a reference board.

Le 01/07/2018 à 12:44, Peter Maydell a écrit : On 30 June 2018 at 22:57, Jean-Christophe Dubois wrote: This series adds the i.MX6UL SOC from NXP/Freescale and the reference evaluation board. This series as tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board

Re: [Qemu-devel] [PATCH 0/3] i.mx7d fixes

Le 28/06/2018 à 17:13, Peter Maydell a écrit : On 26 June 2018 at 22:59, Jean-Christophe Dubois wrote: Small fixes in the i.mx7d code. Jean-Christophe Dubois (3): i.mx7d: Remove unused header files i.mx7d: Change SRC unimpleted device name from sdma to src i.mx7d: Change IRQ number

[Qemu-devel] [PATCH 3/3] i.MX6UL: Add Freescale i.MX6 UltraLite 14x14 EVK Board

Tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board. Signed-off-by: Jean-Christophe Dubois --- hw/arm/Makefile.objs | 2 +- hw/arm/mcimx6ul-evk.c | 86 +++ 2 files changed, 87 insertions(+), 1 deletion(-) create mode

[Qemu-devel] [PATCH 2/3] i.MX6UL: Add i.MX6UL SOC

Signed-off-by: Jean-Christophe Dubois --- default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs| 1 + hw/arm/fsl-imx6ul.c | 649 include/hw/arm/fsl-imx6ul.h | 339 + 4 files changed, 990 insertions(+) create

[Qemu-devel] [PATCH 0/3] i.MX: Add the i.MX6UL SOC and a reference board.

This series adds the i.MX6UL SOC from NXP/Freescale and the reference evaluation board. This series as tested by booting linux 4.18 (built using imx_v6_v7_defconfig) on the emulated board (with the appropriate device tree). Jean-Christophe Dubois (3): i.MX6UL: Add i.MX6UL specific CCM device

[Qemu-devel] [PATCH 1/3] i.MX6UL: Add i.MX6UL specific CCM device

Signed-off-by: Jean-Christophe Dubois --- hw/misc/Makefile.objs| 1 + hw/misc/imx6ul_ccm.c | 887 +++ include/hw/misc/imx6ul_ccm.h | 228 + 3 files changed, 1116 insertions(+) create mode 100644 hw/misc/imx6ul_ccm.c create mode 100644

[Qemu-devel] [PATCH 1/3] i.mx7d: Remove unused header files

Signed-off-by: Jean-Christophe Dubois --- hw/arm/mcimx7d-sabre.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 95fb409d9c..9c5f0e70c3 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -18,10 +18,8 @@ #include "h

[Qemu-devel] [PATCH 3/3] i.mx7d: Change IRQ number type from hwaddr to int

The qdev_get_gpio_in() function accept an int as second parameter. Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index e15aadb587..44fde03cbe 100644 --- a/hw/arm/fsl

[Qemu-devel] [PATCH 2/3] i.mx7d: Change SRC unimpleted device name from sdma to src

Signed-off-by: Jean-Christophe Dubois --- hw/arm/fsl-imx7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 26c1d27f7c..e15aadb587 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -459,7 +459,7 @@ static void

[Qemu-devel] [PATCH 0/3] i.mx7d fixes

Small fixes in the i.mx7d code. Jean-Christophe Dubois (3): i.mx7d: Remove unused header files i.mx7d: Change SRC unimpleted device name from sdma to src i.mx7d: Change IRQ number type from hwaddr to int hw/arm/fsl-imx7.c | 8 hw/arm/mcimx7d-sabre.c | 2 -- 2 files changed

Re: [Qemu-devel] [PATCH v2] i.MX: Fix FEC/ENET receive funtions

eter Maydell a écrit : On 22 January 2018 at 14:54, Andrey Smirnov <andrew.smir...@gmail.com> wrote: On Mon, Jan 22, 2018 at 3:48 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: On 13 January 2018 at 11:34, Jean-Christophe Dubois <j...@tribudubois.net> wrote: The actual

Re: [Qemu-devel] [PATCH] LEON3 IRQMP: Fix IRQ software ack

Le 2018-01-15 14:45, Jean-Christophe Dubois a écrit : Le 2018-01-15 12:09, Fabien Chouteau a écrit : On 12/01/2018 15:10, Jean-Christophe Dubois wrote: Le 2018-01-12 11:55, Fabien Chouteau a écrit : On 11/01/2018 13:35, Jean-Christophe Dubois wrote: Thanks Fabien, Now, as a side question

Re: [Qemu-devel] [PATCH] LEON3 IRQMP: Fix IRQ software ack

Le 2018-01-15 12:09, Fabien Chouteau a écrit : On 12/01/2018 15:10, Jean-Christophe Dubois wrote: Le 2018-01-12 11:55, Fabien Chouteau a écrit : On 11/01/2018 13:35, Jean-Christophe Dubois wrote: Thanks Fabien, Now, as a side question, could you tell me which reference LEON3 platform

[Qemu-devel] [PATCH v2] i.MX: Fix FEC/ENET receive funtions

unning. Reported-by: Fyleo <fyle...@gmail.com> Tested-by: Fyleo <fyle...@gmail.com> Signed-off-by: Jean-Christophe Dubois <j...@tribudubois.net> --- Change since v1: 1. Rebase the patch on the updated master branch hw/net/imx_fec.c | 8 ++-- 1 file changed, 2 insertions(

Re: [Qemu-devel] [PATCH] i.MX: Fix FEC/ENET receive funtions

Le 2018-01-12 18:08, Peter Maydell a écrit : On 10 January 2018 at 20:38, Jean-Christophe Dubois <j...@tribudubois.net> wrote: The actual imx_eth_enable_rx() function is buggy. It updates s->regs[ENET_RDAR] after calling qemu_flush_queued_packets(). qemu_flush_queued_packets()

Re: [Qemu-devel] [PATCH] LEON3 IRQMP: Fix IRQ software ack

Le 2018-01-12 11:55, Fabien Chouteau a écrit : On 11/01/2018 13:35, Jean-Christophe Dubois wrote: Thanks Fabien, Now, as a side question, could you tell me which reference LEON3 platform is implemented by Qemu in leon3_generic? I think it was the based on the FPGA version of Leon3 I

Re: [Qemu-devel] [PATCH] LEON3 IRQMP: Fix IRQ software ack

Thanks Fabien, Now, as a side question, could you tell me which reference LEON3 platform is implemented by Qemu in leon3_generic? It doesn't seem to match the one emulated by tsim. Thanks. JC Le 2018-01-11 12:48, Fabien Chouteau a écrit : On 10/01/2018 21:43, Jean-Christophe Dubois wrote

[Qemu-devel] [PATCH] LEON3 IRQMP: Fix IRQ software ack

-off-by: Jean-Christophe Dubois <j...@tribudubois.net> --- hw/intc/grlib_irqmp.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 94659ee256..d6f9cb3692 100644 --- a/hw/intc/grlib_irqmp.c +++ b/h

[Qemu-devel] [PATCH] i.MX: Fix FEC/ENET receive funtions

unning. Reported-by: Fyleo <fyle...@gmail.com> Tested-by: Fyleo <fyle...@gmail.com> Signed-off-by: Jean-Christophe Dubois <j...@tribudubois.net> --- hw/net/imx_fec.c | 10 +++--- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/hw/net/imx_fec.c b/hw/net/im

Re: [Qemu-devel] [SPARC] question on LEON IRQMP interrupt controller.

Le 08/01/2018 à 20:56, Mark Cave-Ayland a écrit : Thanks for the patch! I'm afraid I don't really have any experience with LEON as my focus is sun4m/sun4u, however I'm happy to take patches Acked/Reviewed by Fabien as the current LEON maintainer I am waiting for Fabien feedback after my

Re: [Qemu-devel] [SPARC] question on LEON IRQMP interrupt controller.

, Jean-Christophe DUBOIS wrote: I am wondering if the IRQMP code in hw/intc/grlib_irqmp.c is correct when it comes to acknowledging interrupts. With the actual code an interrupt can be lowered/acked only by an "ack" from the processor which means that the trap handler related to thi

[Qemu-devel] [SPARC] question on LEON IRQMP interrupt controller.

Hi Mark, Artyom, I am wondering if the IRQMP code in hw/intc/grlib_irqmp.c is correct when it comes to acknowledging interrupts. With the actual code an interrupt can be lowered/acked only by an "ack" from the processor which means that the trap handler related to this external interrupt

Re: [Qemu-devel] [PATCH] Remove MemoryRegionSection check code from sparc_cpu_get_phys_page_debug()

Le 04/12/2017 à 21:45, Mark Cave-Ayland a écrit : On 27/11/17 20:19, Jean-Christophe DUBOIS wrote: Hello Mark, Did you get any second opinion on this? Also do you need me to resend the patch with the SPARC keyword in the patch subject line? Hi Jean-Christophe, Apologies for the delay

Re: [Qemu-devel] [SPARC] Accessing devices through MMU mapped memory region

Surprisingly the GCC compiler transformed my 32 bits access into 4 x 8 bits access in my application code. So this is not a Qemu issue but I need to find why the compiler is not generating the code I was expecting. Sorry for the noise. JC Le 27/11/2017 à 21:16, Jean-Christophe DUBOIS

Re: [Qemu-devel] [PATCH] Remove MemoryRegionSection check code from sparc_cpu_get_phys_page_debug()

Hello Mark, Did you get any second opinion on this? Also do you need me to resend the patch with the SPARC keyword in the patch subject line? Regards JC Le 23/11/2017 à 20:49, Mark Cave-Ayland a écrit : On 22/11/17 06:32, Jean-Christophe Dubois wrote: This code is preventing the MMU

[Qemu-devel] [SPARC] Accessing devices through MMU mapped memory region

Hi, I am using Qemu to emulate a Leon3 based board. In the software I am running on top of Qemu, I am mapping devices to a virtual address using MMU table. Now I am experimenting some issues when I am trying to access some device (here the UART port at 0x8100) through the MMU mapping

[Qemu-devel] [PATCH] Remove MemoryRegionSection check code from sparc_cpu_get_phys_page_debug()

physical adresse is displayed. Signed-off-by: Jean-Christophe Dubois <j...@tribudubois.net> --- target/sparc/mmu_helper.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index d5b6c1e48c..f2d2250e7a 100644 --- a/target/sparc/mmu_he

[Qemu-devel] [SPARC] Qemu failed to display MMU mapping for non memory area.

Hello, I am using Qemu to emulate a Leon3 based board. In the software I am running on Qemu, I configured the virtual memory through MMU programming. In particular, I mapped the built-in UART to a 4K page. To check that my MMU table was OK I switched on (at compile time) the DEBUG_MMU

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