Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 59 ++-
1 file changed, 48 insertions(+), 11 deletions(-)
diff --git a/target/i386/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c |9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index d015ea73fa
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 142 +++
1 file changed, 70 insertions(+), 72 deletions(-)
diff --git a/target/i386/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
Needed to implement a target-agnostic gen_intermediate_code() in the
future.
Signed-off-by: Lluís Vilanova
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
---
accel/tcg/translate-all.c |2 +-
include/exec/exec-all.h |2 +-
target/alpha/translate.c | 11
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/target/i386/translate.c b/target/i386
Used later. An enum makes expected values explicit and bounds the value space of
switches.
Signed-off-by: Lluís Vilanova
---
include/exec/exec-all.h |6 --
include/exec/translator.h | 38 ++
target/arm/translate.h| 26
Signed-off-by: Lluís Vilanova
---
accel/tcg/Makefile.objs |1
accel/tcg/translator.c| 153 +
include/exec/gen-icount.h |2 -
include/exec/translator.h | 104 +++
4 files changed, 259 insertions(+), 1
Signed-off-by: Lluís Vilanova
---
include/exec/gen-icount.h |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 62d462e494..3fb17d435a 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
this series gets merged.
Signed-off-by: Lluís Vilanova
---
Changes in v11
==
* Convert gen_intermediate_code_a64 [Emilio G. Cota].
* Replace "cpu_env" argument in icount functions with "tcg_ctx.cpu_env"
[Emilio G. Cota].
* Drop QTAILQ_FOREACH_CONTINUE and cpu_break
Richard Henderson writes:
> On 06/25/2017 03:08 AM, Lluís Vilanova wrote:
>> +static void arm_trblock_insn_start(DisasContextBase *db, CPUState *cpu)
>> +{
>> +DisasContext *dc = container_of(db, DisasContext, base);
>> +
>> +dc-&
Emilio G Cota writes:
> On Sun, Jun 25, 2017 at 12:07:57 +0300, Lluís Vilanova wrote:
>> Incrementally paves the way towards using the generic instruction translation
>> loop.
>>
>> Signed-off-by: Lluís Vilanova
> Just a minor nit: the commit titles are a little
Emilio G Cota writes:
> On Tue, Jun 27, 2017 at 12:52:00 +0300, Lluís Vilanova wrote:
>> Changes in v9
>> =
>>
>> * Rebase on 931892e8a6.
>> * Undo renaming of tb->trace_vcpu_dstate to the shorter tb->trace_ds.
>> * Add measurements to com
Richard Henderson writes:
> On 06/25/2017 01:59 AM, Lluís Vilanova wrote:
[...]
>> +
>> +/* Early exit before breakpoint checks */
>> +if (unlikely(db->is_jmp != DJ_NEXT)) {
>> +break;
>> +}
> This must be done at the e
Eric Blake writes:
> On 06/25/2017 03:43 AM, Lluís Vilanova wrote:
>> This series proposes a generic (target-agnostic) instruction translation
>> framework.
>>
>> It basically provides a generic main loop for instruction disassembly, which
>> calls target-specif
Emilio G Cota writes:
> On Sun, Jun 25, 2017 at 11:59:54 +0300, Lluís Vilanova wrote:
>> Signed-off-by: Lluís Vilanova
>> ---
>> Makefile.target|1
>> include/exec/gen-icount.h |2
>> include/exec/translate-block.h | 125 +
,110s
user0m31,176s
sys 0m0,156s
Signed-off-by: Lluís Vilanova
---
trace-events |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/trace-events b/trace-events
index bae63fdb1d..f9dbd7f509 100644
--- a/trace-events
+++ b/trace-events
@@ -106,7 +106,7 @@ vcpu guest_cpu_
Last patch removed a nesting level in generated code. Re-align all code
generated by backends to be 4-column aligned.
Signed-off-by: Lluís Vilanova
---
scripts/tracetool/backend/dtrace.py |4 ++--
scripts/tracetool/backend/ftrace.py | 20 ++--
scripts/tracetool/backend
code (since otherwise
TCG would simply not call it).
Signed-off-by: Lluís Vilanova
---
scripts/tracetool/__init__.py|3 ++-
scripts/tracetool/format/h.py| 26 +++---
scripts/tracetool/format/tcg_h.py| 21 +
scripts
ed by
address), and fall back to the physical TB cache (which now contains the
vCPU's dynamic tracing state as part of the hashing function).
Signed-off-by: Lluís Vilanova
Reviewed-by: Richard Henderson
---
accel/tcg/cpu-exec.c |8 ++--
accel/tcg/translate-all.c | 11 +++
This keeps consistency across all decisions taken during translation
when the dynamic state of a vCPU is changed in the middle of translating
some guest code.
Signed-off-by: Lluís Vilanova
Reviewed-by: Richard Henderson
---
include/qom/cpu.h |3 +++
trace/control-target.c | 20
ly capture cpu->trace_dstate.
This change also increases performance by saving a dereference and
improving locality--note that this is important since upcoming work
makes reading this bitmap fairly common.
Signed-off-by: Emilio G. Cota
Reviewed-by: Lluís Vilanova
---
include/qom/cpu.h |9 +
The function is reused in later patches.
Signed-off-by: Lluís Vilanova
Reviewed-by: Richard Henderson
---
accel/tcg/cputlb.c|2 +-
accel/tcg/translate-all.c | 15 ++-
include/exec/exec-all.h |6 ++
3 files changed, 17 insertions(+), 6 deletions(-)
diff
l code to either a cold path (making tracing performance
worse), or leave it inlined (making non-tracing performance worse).
* Eliding TCG code only when *zero* vCPUs are tracing an event, since enabling
it on a single vCPU will impact the performance of all other vCPUs that ar
Richard Henderson writes:
> On 06/26/2017 05:33 AM, Lluís Vilanova wrote:
>> Richard Henderson writes:
>>
>>> On 06/12/2017 07:54 AM, Lluís Vilanova wrote:
>>>> Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
>>>> tra
Richard Henderson writes:
> On 06/25/2017 02:12 AM, Lluís Vilanova wrote:
>> +DisasContext *dc = container_of(db, DisasContext, base);
>> CPUX86State *env = cpu->env_ptr;
>> -DisasContext dc1, *dc = &dc1;
>> -DisasContextBase *db =
Lluís Vilanova writes:
> Daniel P Berrange writes:
>> On Thu, Jun 08, 2017 at 10:25:22PM -0400, Emilio G. Cota wrote:
>>> From: Lluís Vilanova
>>>
>>> The optimizations of this series makes it feasible to have them
>>> available on all builds.
>
Alex Bennée writes:
> Lluís Vilanova writes:
>> This series proposes a generic (target-agnostic) instruction translation
>> framework.
>>
>> It basically provides a generic main loop for instruction disassembly, which
>> calls target-specific functions when nec
Alex Bennée writes:
> Lluís Vilanova writes:
>> Signed-off-by: Lluís Vilanova
>> ---
>> Makefile.target|1
>> include/exec/gen-icount.h |2
>> include/exec/translate-block.h | 125 +++
>>
Alex Bennée writes:
> ---
> target/hppa/translate.c | 5 ++---
> target/nios2/translate.c| 5 ++---
> target/openrisc/translate.c | 3 +--
> 3 files changed, 5 insertions(+), 8 deletions(-)
I rebased the patches and forgot to test the compilation of other
architectures. Sorry about that.
Richard Henderson writes:
> On 06/12/2017 07:54 AM, Lluís Vilanova wrote:
>> Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
>> traversal.
>>
>> Signed-off-by: Lluís Vilanova
>> ---
>> include/qemu/queue.h | 12
>> 1 fil
Peter Maydell writes:
> On 26 June 2017 at 10:26, Lluís Vilanova wrote:
>> There's two places where memory access tracing is triggered:
>>
>> * tcg_gen_qemu_ld/st_...
>> * ld/st templates (both softmmu and user)
>>
>> AFAIK, helpers use the ld/st
Alex Bennée writes:
> Lluís Vilanova writes:
>> Alex Bennée writes:
>>
>>> Peter Maydell writes:
>>
>>>> On 20 June 2017 at 12:02, Lluís Vilanova wrote:
>>>>> Jayanto Minocha writes:
>>>>>> But that is only used to
Daniel P Berrange writes:
> On Thu, Jun 08, 2017 at 10:25:22PM -0400, Emilio G. Cota wrote:
>> From: Lluís Vilanova
>>
>> The optimizations of this series makes it feasible to have them
>> available on all builds.
> I'm not saying you're wrong, but wher
Alex Bennée writes:
> Peter Maydell writes:
>> On 20 June 2017 at 12:02, Lluís Vilanova wrote:
>>> Jayanto Minocha writes:
>>>> But that is only used to instrument the cpu_ld/cpu_st macros, which is only
>>>> called in the case of a tlb miss.
>>&
Lluís Vilanova writes:
> Jayanto Minocha writes:
>> Lluis,
>> My modifications were almost the same as those done by Emilio. There were
>> no memory trace events in the trace file.
> I'll take a look at it after I finish revamping the generic translation loop
> s
Events with the "vcpu" property need to be set globally (i.e., as if they didn't
have that property) while we have not yet created any vCPU.
Signed-off-by: Lluís Vilanova
---
trace/control-target.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 110 ++-
target/arm/translate.c | 112 +++-
target/arm/translate.h |6 +-
3 files changed, 36 insertions(+), 192 deletions(-)
diff --git a
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 10 +-
target/arm/translate.c | 10 +-
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 121 +++--
target/arm/translate.c | 185
2 files changed, 164 insertions
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 73 ++
target/arm/translate.c | 144 +---
target/arm/translate.h |4 +
3
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 59 ++-
target/arm/translate.c | 66 +---
2 files changed, 82
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 11 +--
target/arm/translate.c | 36 +---
2 files changed, 30 insertions(+), 17 deletions(-)
diff
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate.c | 82 ++--
1 file changed, 44 insertions(+), 38 deletions(-)
diff --git a/target/arm/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 51 +++---
target/arm/translate.c | 87
2 files changed, 78 insertions
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 113 ++--
target/arm/translate.c | 154
target/arm/translate.h
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/arm/translate-a64.c | 58 ++--
target/arm/translate.c | 90 ++--
target/arm/translate.h | 24
Lluís Vilanova writes:
> Emilio G Cota writes:
>> There's little point in dynamically allocating the bitmap if we
>> know at compile-time the max number of events we want to support.
>> Thus, make room in the struct for the bitmap, which will make things
>> easi
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 72 +++
1 file changed, 47 insertions(+), 25 deletions(-)
diff --git a/target/i386/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 48 +++
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index f0d12a3d13
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/target/i386/translate.c b/target/i386
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 164 ++-
1 file changed, 92 insertions(+), 72 deletions(-)
diff --git a/target/i386/translate.c b/target
Temporarily redefine DISAS_* values based on DJ_TARGET. They should
disappear as targets get ported to the generic framework.
Signed-off-by: Lluís Vilanova
Acked-by: David Gibson (ppc)
Acked-by: Eduardo Habkost
Reviewed-by: Eduardo Habkost (i386)
Acked-by: Laurent Vivier (m68k)
Reviewed-by
Signed-off-by: Lluís Vilanova
---
Makefile.target|1
include/exec/gen-icount.h |2
include/exec/translate-block.h | 125 +++
include/qom/cpu.h | 22 +
translate-block.c | 185
Signed-off-by: Lluís Vilanova
---
include/exec/gen-icount.h |6 +++--
target/alpha/translate.c | 14 ++--
target/arm/translate-a64.c| 10 -
target/arm/translate.c| 10 -
target/cris/translate.c |6 +++--
target/hppa/translate.c
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 35292c3155..eb2bf9cb1c 100644
--- a/include/qemu
Needed to implement a target-agnostic gen_intermediate_code() in the
future.
Signed-off-by: Lluís Vilanova
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
---
include/exec/exec-all.h |2 +-
target/alpha/translate.c | 11 +--
target/arm/translate.c
this series gets merged.
Signed-off-by: Lluís Vilanova
---
Changes in v9
=
* Further increase inter-mail sleep time during sending.
Changes in v8
=
* Increase inter-mail sleep time during sending (list keeps refusing some emails
due to an excessive send rate).
Changes
Please ignore, I'm having problems with my mail server and there's patches being
dropeed.
Thanks,
Lluis
Lluís Vilanova writes:
> This series proposes a generic (target-agnostic) instruction translation
> framework.
> It basically provides a generic main loop for inst
Please ignore, I'm having problems with my mail server and there's patches being
dropeed.
Thanks,
Lluis
Lluís Vilanova writes:
> This series proposes a generic (target-agnostic) instruction translation
> framework.
> It basically provides a generic main loop for inst
Please ignore, I'm having problems with my mail server and there's patches being
dropeed.
Thanks,
Lluis
Lluís Vilanova writes:
> This series proposes a generic (target-agnostic) instruction translation
> framework.
> It basically provides a generic main loop for inst
Please ignore, I'm having problems with my mail server and there's patches being
dropeed.
Thanks,
Lluis
Lluís Vilanova writes:
> This series proposes a generic (target-agnostic) instruction translation
> framework.
> It basically provides a generic main loop for inst
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 35292c3155..eb2bf9cb1c 100644
--- a/include/qemu
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
this series gets merged.
Signed-off-by: Lluís Vilanova
---
Changes in v8
=
* Increase inter-mail sleep time during sending (list keeps refusing some emails
due to an excessive send rate).
Changes in v7
=
* Change BreakpointHitType (BH_*) for BreakpointCheckType (BC_*).
*
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 48 +++
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 72 +++
1 file changed, 47 insertions(+), 25 deletions(-)
diff --git a/target/i386/translate.c b/target
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c |8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index f0d12a3d13
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/target/i386/translate.c b/target/i386
Signed-off-by: Lluís Vilanova
---
include/exec/gen-icount.h |6 +++--
target/alpha/translate.c | 14 ++--
target/arm/translate-a64.c| 10 -
target/arm/translate.c| 10 -
target/cris/translate.c |6 +++--
target/hppa/translate.c
Signed-off-by: Lluís Vilanova
---
Makefile.target|1
include/exec/gen-icount.h |2
include/exec/translate-block.h | 125 +++
include/qom/cpu.h | 22 +
translate-block.c | 185
this series gets merged.
Signed-off-by: Lluís Vilanova
---
Changes in v7
=
* Change BreakpointHitType (BH_*) for BreakpointCheckType (BC_*).
* Move target-specific translation functions to a struct (TranslatorOps).
* Split target-specific changes into multiple patches.
* Rebase on edf8b
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 35292c3155..eb2bf9cb1c 100644
--- a/include/qemu
Signed-off-by: Lluís Vilanova
---
Makefile.target|1
include/exec/gen-icount.h |2
include/exec/translate-block.h | 125 +++
include/qom/cpu.h | 22 +
translate-block.c | 185
Needed to implement a target-agnostic gen_intermediate_code() in the
future.
Signed-off-by: Lluís Vilanova
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
---
include/exec/exec-all.h |2 +-
target/alpha/translate.c | 11 +--
target/arm/translate.c
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 35292c3155..eb2bf9cb1c 100644
--- a/include/qemu
this series gets merged.
Signed-off-by: Lluís Vilanova
---
Changes in v7
=
* Change BreakpointHitType (BH_*) for BreakpointCheckType (BC_*).
* Move target-specific translation functions to a struct (TranslatorOps).
* Split target-specific changes into multiple patches.
* Rebase on edf8b
Signed-off-by: Lluís Vilanova
---
include/exec/gen-icount.h |6 +++--
target/alpha/translate.c | 14 ++--
target/arm/translate-a64.c| 10 -
target/arm/translate.c| 10 -
target/cris/translate.c |6 +++--
target/hppa/translate.c
Needed to implement a target-agnostic gen_intermediate_code() in the
future.
Signed-off-by: Lluís Vilanova
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
---
include/exec/exec-all.h |2 +-
target/alpha/translate.c | 11 +--
target/arm/translate.c
Signed-off-by: Lluís Vilanova
---
Makefile.target|1
include/exec/gen-icount.h |2
include/exec/translate-block.h | 125 +++
include/qom/cpu.h | 22 +
translate-block.c | 185
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova
---
target/i386/translate.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
this series gets merged.
Signed-off-by: Lluís Vilanova
---
Changes in v7
=
* Change BreakpointHitType (BH_*) for BreakpointCheckType (BC_*).
* Move target-specific translation functions to a struct (TranslatorOps).
* Split target-specific changes into multiple patches.
* Rebase on edf8b
Adds macro QTAILQ_FOREACH_CONTINUE to support incremental list
traversal.
Signed-off-by: Lluís Vilanova
---
include/qemu/queue.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/qemu/queue.h b/include/qemu/queue.h
index 35292c3155..eb2bf9cb1c 100644
--- a/include/qemu
-J
> On Tue, Jun 20, 2017 at 10:20 AM, Emilio G. Cota wrote:
>> On Tue, Jun 20, 2017 at 14:02:02 +0300, Lluís Vilanova wrote:
>> > Jayanto Minocha writes:
>> >
>> > > Hi,
>> > > I think there have been a few threads on the mailing list re
Jayanto Minocha writes:
> Hi,
> I think there have been a few threads on the mailing list regarding tracing
> guest virtual addresses for load and store instructions, but I have been
> unable to get it to work. I am trying this for an AArch64 machine, and am
> using the softmmu.
> The tracing inf
Emilio G Cota writes:
> On Mon, Jun 19, 2017 at 00:54:05 +0300, Lluís Vilanova wrote:
>> Aha, just checked your proposed patches more closely and it totally makes
>> sense
>> to keep "is_jmp" to simplify the diffs, so I'll go for that one.
> Also I think i
Lluís Vilanova writes:
> Lluís Vilanova writes:
>> Emilio G Cota writes:
>>> On Thu, Jun 15, 2017 at 18:19:11 -0400, Emilio G. Cota wrote:
>>>> (snip)
>>>> > +/**
>>>> > + * DisasContextBase:
>>>> > + * @tb: Translati
Lluís Vilanova writes:
> Emilio G Cota writes:
>> On Thu, Jun 15, 2017 at 18:19:11 -0400, Emilio G. Cota wrote:
>>> (snip)
>>> > +/**
>>> > + * DisasContextBase:
>>> > + * @tb: Translation block for this disassembly.
>>>
Emilio G Cota writes:
> On Mon, Jun 12, 2017 at 17:53:47 +0300, Lluís Vilanova wrote:
>> This series proposes a generic (target-agnostic) instruction translation
>> framework.
>>
>> It basically provides a generic main loop for instruction disassembly, which
>>
Emilio G Cota writes:
> Some minor nits below.
> On Mon, Jun 12, 2017 at 17:54:09 +0300, Lluís Vilanova wrote:
>> Signed-off-by: Lluís Vilanova
>> ---
>> +/**
>> + * BreakpointHitType:
>> + * @BH_MISS: No hit
>> + * @BH_HIT_INSN: Hit, but continue tran
Emilio G Cota writes:
> On Thu, Jun 15, 2017 at 19:25:07 -0400, Emilio G. Cota wrote:
>> Also, consider keeping the @is_jmp name instead of renaming it to
>> @jmp_type. (@jmp would be shorter but it would be confusing though,
>> e.g. cris has both dc->jmp and dc->is_jmp.)
> It turns out that keep
Emilio G Cota writes:
> On Mon, Jun 12, 2017 at 17:54:30 +0300, Lluís Vilanova wrote:
>> Signed-off-by: Lluís Vilanova
>> ---
>> target/arm/translate-a64.c | 346 ++---
>> target/arm/translate.c | 720
>> ++---
Emilio G Cota writes:
> On Thu, Jun 15, 2017 at 18:19:11 -0400, Emilio G. Cota wrote:
>> (snip)
>> > +/**
>> > + * DisasContextBase:
>> > + * @tb: Translation block for this disassembly.
>> > + * @pc_first: Address of first guest instruction in this TB.
>> > + * @pc_next: Address of next guest ins
301 - 400 of 1848 matches
Mail list logo