On 11/22/18 2:13 PM, Yuval Shaia wrote:
The control over the RDMA device's GID table is done by updating the
device's Ethernet function addresses.
Usually the first GID entry is determined by the MAC address, the second
by the first IPv6 address and the third by the IPv4 address. Other
ma_dev_properties[] = {
DEFINE_PROP_INT32("dev-caps-max-qp-init-rd-atom", PVRDMADev,
dev_attr.max_qp_init_rd_atom, MAX_QP_INIT_RD_ATOM),
DEFINE_PROP_INT32("dev-caps-max-ah", PVRDMADev, dev_attr.max_ah, MAX_AH),
+DEFINE_PROP_CHR("mad-chardev", PVRDMADev, mad_chr),
DEFINE_PROP_END_OF_LIST(),
};
@@ -613,7 +614,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
rc = rdma_backend_init(>backend_dev, pdev, >rdma_dev_res,
dev->backend_device_name, dev->backend_port_num,
- dev->backend_gid_idx, >dev_attr, errp);
+ dev->backend_gid_idx, >dev_attr, >mad_chr,
+ errp);
if (rc) {
goto out;
}
I only have a few minor comments, but it looks OK to me anyway.
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 11/13/18 9:13 AM, Yuval Shaia wrote:
The control over the RDMA device's GID table is done by updating the
device's Ethernet function addresses.
Usually the first GID entry is determine by the MAC address, the second
s/determine/determined
by the first IPv6 address and the third by the
On 11/13/18 9:13 AM, Yuval Shaia wrote:
Interface with the device is changed with the addition of support for
MAD packets.
Adjust documentation accordingly.
While there fix a minor mistake which may lead to think that there is a
relation between using RXE on host and the compatibility with
*backend_dev,
{
int rc;
+if (!dev_res->port.gid_tbl[gid_idx].gid.global.interface_id) {
+return 0;
+}
+
rc = rdma_backend_del_gid(backend_dev, ifname,
_res->port.gid_tbl[gid_idx].gid);
if (rc < 0) {
Reviewed-b
(tbl->bitmap);
}
static inline void *res_tbl_get(RdmaRmResTbl *tbl, uint32_t handle)
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
,6 +632,9 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
goto out;
}
+dev->shutdown_notifier.notify = pvrdma_shutdown_notifier;
+qemu_register_shutdown_notifier(>shutdown_notifier);
+
out:
if (rc) {
error_append_hint(errp, "Device fail to load\n");
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
MAX_PORT_GIDS
#define MAX_PORT_PKEYS1
@@ -97,7 +97,7 @@ typedef struct RdmaRmPort {
} RdmaRmPort;
typedef struct RdmaDeviceResources {
-RdmaRmPort ports[MAX_PORTS];
+RdmaRmPort port;
RdmaRmResTbl pd_tbl;
RdmaRmResTbl mr_tbl;
RdmaRmResTbl uc_tbl;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 11/13/18 9:13 AM, Yuval Shaia wrote:
Driver checks error code let's set it.
Signed-off-by: Yuval Shaia
---
hw/rdma/vmw/pvrdma_cmd.c | 67
1 file changed, 48 insertions(+), 19 deletions(-)
diff --git a/hw/rdma/vmw/pvrdma_cmd.c
*ctx, struct ibv_wc *wc)
{
CompHandlerCtx *comp_ctx = (CompHandlerCtx *)ctx;
-pr_dbg("cq_handle=%d\n", comp_ctx->cq_handle);
-pr_dbg("wr_id=%" PRIx64 "\n", comp_ctx->cqe.wr_id);
-pr_dbg("status=%d\n", status);
-pr_dbg("vendor_err=0x%x\n", vendor_err);
-comp_ctx->cqe.status = status;
-comp_ctx->cqe.vendor_err = vendor_err;
-pvrdma_post_cqe(comp_ctx->dev, comp_ctx->cq_handle, _ctx->cqe);
+pvrdma_post_cqe(comp_ctx->dev, comp_ctx->cq_handle, _ctx->cqe, wc);
+
g_free(ctx);
}
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
esp->attrs.active_mtu = attrs.active_mtu;
resp->attrs.phys_state = attrs.phys_state;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
((unsigned char *)>node_guid,
+(const char *)>func0->conf.macaddr.a);
+
memdev_root = object_resolve_path("/objects", NULL);
if (memdev_root) {
object_child_foreach(memdev_root, pvrdma_check_ram_shared,
_shared);
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
ge[0],
wqe->hdr.num_sge,
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
Hi Yuval,
On 11/13/18 9:12 AM, Yuval Shaia wrote:
MAD (Management Datagram) packets are widely used by various modules
Please add a link to Spec, I sent it in the V1 mail-thread
Please add it also as a comment in the code. I know MADs
are a complicated matter, but if somebody wants to have a
p ? qp->ibqp->qp_num : 1;
}
static inline uint32_t rdma_backend_mr_lkey(const RdmaBackendMR *mr)
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 11/11/18 9:45 AM, Yuval Shaia wrote:
On Sat, Nov 10, 2018 at 08:27:44PM +0200, Marcel Apfelbaum wrote:
On 11/8/18 6:08 PM, Yuval Shaia wrote:
Guest driver enforces it, we should also.
Signed-off-by: Yuval Shaia
---
hw/rdma/vmw/pvrdma.h | 2 ++
hw/rdma/vmw/pvrdma_main.c | 3
Hi Yuval,
On 11/11/18 12:31 PM, Yuval Shaia wrote:
On Sat, Nov 10, 2018 at 08:15:27PM +0200, Marcel Apfelbaum wrote:
Hi Yuval
On 11/8/18 6:08 PM, Yuval Shaia wrote:
MAD (Management Datagram) packets are widely used by various modules
both in kernel and in user space for example the rdma_
Hi Yuval,
On 11/8/18 6:07 PM, Yuval Shaia wrote:
Device is not supporting QP0, only QP1.
Signed-off-by: Yuval Shaia
---
hw/rdma/rdma_backend.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/rdma/rdma_backend.h b/hw/rdma/rdma_backend.h
index 86e8fe8ab6..3ccc9a2494
) {
-cq->notify = false;
+if (cq->notify != CNT_CLEAR) {
+if (cq->notify == CNT_ARM) {
+cq->notify = CNT_CLEAR;
+}
post_interrupt(dev, INTR_VEC_CMD_COMPLETION_Q);
}
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
id_idx, dgid);
+if (!wr.wr.ud.ah) {
+comp_handler(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx);
+goto out_dealloc_cqe_ctx;
+}
wr.wr.ud.remote_qpn = dqpn;
wr.wr.ud.remote_qkey = dqkey;
}
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 11/8/18 6:08 PM, Yuval Shaia wrote:
Guest driver enforces it, we should also.
Signed-off-by: Yuval Shaia
---
hw/rdma/vmw/pvrdma.h | 2 ++
hw/rdma/vmw/pvrdma_main.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h
index
: 'str',
+'gid-status': 'bool',
'git-status' naming as of indication if we add or remove a gid
is a little odd, but I can't come up with something better.
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
+'subnet-prefix' : 'uint64',
+'interface-id' : 'uint64' } }
On 11/8/18 6:08 PM, Yuval Shaia wrote:
opcode for WC should be set by the device and not taken from work
element.
Signed-off-by: Yuval Shaia
---
hw/rdma/vmw/pvrdma_qp_ops.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c
Hi Yuval
On 11/8/18 6:08 PM, Yuval Shaia wrote:
MAD (Management Datagram) packets are widely used by various modules
both in kernel and in user space for example the rdma_* API which is
used to create and maintain "connection" layer on top of RDMA uses
several types of MAD packets.
Can you
("Device reset complete\n");
-
-return 0;
static uint64_t regs_read(void *opaque, hwaddr addr, unsigned size)
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
efaults */
-#define PVRDMA_PKEY 0x7FFF
+#define PVRDMA_PKEY 0x
typedef struct DSRInfo {
dma_addr_t dma;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
above chunk is needed.
+comp_ctx->cqe.opcode = IBV_WC_RECV;
Anyway
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
rdma_backend_post_recv(>backend_dev, >rdma_dev_res,
>backend_qp, qp->qp_type,
t_virt,
cmd->access_flags, >mr_handle,
>lkey, >rkey);
-if (host_virt && !resp->hdr.err) {
+if (resp->hdr.err && host_virt) {
munmap(host_virt, cmd->length);
}
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 10/18/18 5:48 PM, Peter Maydell wrote:
On 18 October 2018 at 15:45, Marcel Apfelbaum
wrote:
PCIe machines support PCI devices while PCI machines do not support
PCIe devices.
I think users of the PCI machines would benefit from having a clear list of
supported devices, rather than have
On 10/18/18 5:41 PM, Peter Maydell wrote:
On 18 October 2018 at 15:38, Daniel P. Berrangé wrote:
On Thu, Oct 18, 2018 at 03:15:31PM +0100, Peter Maydell wrote:
On 18 October 2018 at 15:11, Marcel Apfelbaum
wrote:
Maybe would be a step toward a clean "socket-device" modeling
Hi Eduardo,
On 10/17/18 6:56 PM, Eduardo Habkost wrote:
(CCing Marcel, in case he has extra details on the complex
Conventional/Express bus/device plugging rules)
On Wed, Oct 17, 2018 at 07:57:39AM +0200, Markus Armbruster wrote:
Laine Stump writes:
[...]
In the end, having a device that
/piix.c
index 0e608347c1..56a42055f1 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -40,7 +40,7 @@
/*
* I440FX chipset data sheet.
- * http://download.intel.com/design/chipsets/datashts/29054901.pdf
+ * https://wiki.qemu.org/File:29054901.pdf
*/
Reviewed-by: Marcel Apfelbaum
Hi Philippe, Peter
On 10/2/18 10:59 PM, Philippe Mathieu-Daudé wrote:
On 10/2/18 3:13 PM, Peter Maydell wrote:
On 1 October 2018 at 23:09, Philippe Mathieu-Daudé wrote:
Move from the legacy SysBusDevice::init method to using DeviceState::realize.
Comment says DeviceState::realize but the
offmann
Cc: Igor Mammedov
Cc: Marcel Apfelbaum
Signed-off-by: Laszlo Ersek
---
Notes:
v2:
- new patch
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ce7c351afa40..f17dbdeb1045 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -,6 +1
BFFF, // Range Maximum
0x, // Translation Offset
0x0007C000, // Length
,, , AddressRangeMemory, TypeStatic)
Cc: "Michael S. Tsirkin"
Cc: Alex Williamson
Cc: Gerd Hoffmann
Cc: Igor Mammedov
Cc: Marcel Apfelbaum
Signed-off-by: Laszlo Ersek
---
No
1c7f20b243f6
100644
GIT binary patch
delta 43
mcmezD`q`DsCD
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
efore
the patch. After the patch, we add the 32GB extension to the
firmware-programmed base, namely 32GB.)
Cc: "Michael S. Tsirkin"
Cc: Alex Williamson
Cc: Marcel Apfelbaum
Link:
a56b3710-9c2d-9ad0-5590-efe30b6d7bd9@redhat.com">http://mid.mail-archive
On 9/25/18 1:13 AM, Laszlo Ersek wrote:
Expose the calculated "hole64 start" GPAs as plain uint64_t values,
extracting the internals of the current property getters.
This patch doesn't change behavior.
Cc: "Michael S. Tsirkin"
Cc: Alex Williamson
Cc: Marcel A
Hi Yoni, Cornelia,
On 09/20/2018 04:59 PM, Cornelia Huck wrote:
On Wed, 5 Sep 2018 12:38:00 +0300
Yoni Bettan wrote:
The main goal is to add 2 example devices to be used as templates or guideline
for contributors when they wish to create a new device, the first is a PCI
device and the
Hi Laszlo, Michael
On 09/21/2018 08:41 PM, Laszlo Ersek wrote:
On 09/21/18 19:20, Michael S. Tsirkin wrote:
On Fri, Sep 21, 2018 at 06:01:30PM +0300, Marcel Apfelbaum wrote:
On 09/20/2018 05:49 PM, Laszlo Ersek wrote:
Now, there's another complication, obviously -- machine type compat
Hi Laszlo,
On 09/21/2018 08:34 PM, Laszlo Ersek wrote:
On 09/21/18 17:01, Marcel Apfelbaum wrote:
On 09/20/2018 05:49 PM, Laszlo Ersek wrote:
I had to read this mail a few times...
Sorry :)
Now consider the following scenario:
- the firmware programs some BARs with 64-bit addresses
On 9/6/2018 10:16 AM, Liu, Jing2 wrote:
Hi Marcle,
On 9/6/2018 12:36 AM, Marcel Apfelbaum wrote:
On 09/05/2018 05:08 AM, Liu, Jing2 wrote:
Hi Marcel and Michael,
Got no response so I would like to ask if I need do something more for
this serial? :)
Hi Jing,
Maybe Michael is PTO, let's
On 09/20/2018 05:49 PM, Laszlo Ersek wrote:
Hi Marcel,
Hi Laszlo,
I had to read this mail a few times...
this email should actually be an RFC patch. But RFC patches tend to turn
into real PATCHes (if the submitter is lucky, that is), and I can't
really promise sending multiple versions
Hi Zihan, Gerd
On 09/20/2018 09:09 AM, Gerd Hoffmann wrote:
As for the management, will some checks when adding mcfg be enough for
management? Or I can maintain a variable to indicate how many space
have been consumed and warn the user if they exceed the threshold?
The latter allows us to do
Hi Zihan,
On 09/18/2018 04:41 PM, Michael S. Tsirkin wrote:
Cc Laine, Eric for an opinion about the management interface.
On Mon, Sep 17, 2018 at 10:57:31PM +0800, Zihan Yang wrote:
Hi all
Here is a minimal working version of supporting multiple pci domains.
The next a few paragraphs will
,
Marcel
Thanks,
Jing
On 8/30/2018 10:58 AM, Liu, Jing2 wrote:
Ping Michael :)
Thanks,
Jing
On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote:
On 08/21/2018 06:18 AM, Jing Liu wrote:
Add hint to firmware (e.g. SeaBIOS) to reserve addtional
BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add
ids.h
@@ -255,7 +255,7 @@
#define PCI_DEVICE_ID_INTEL_82801I_EHCI2 0x293c
#define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed
-#define PCI_DEVICE_ID_INTEL_Q35_MCH 0x29c0
+#define PCI_DEVICE_ID_INTEL_P35_MCH 0x29c0
#define PCI_VENDOR_ID_XEN0x5853
#define PCI_DEVICE_ID_XEN_PLATFORM
Hi Kevin,
On 08/28/2018 08:02 PM, Kevin O'Connor wrote:
On Tue, Aug 28, 2018 at 12:14:58PM +0200, Gerd Hoffmann wrote:
Hi,
Where is the pxb-pcie device? :$somewhere? Or $domain:00:00.0?
:$somewhere (On PCI domain 0)
Cool, so we don't have an chicken-and-egg issue.
If we
Hi Gerd,
On 08/28/2018 09:07 AM, Gerd Hoffmann wrote:
Hi,
Since we will not use all 256 buses of an extra PCI domain,
I think this space will allow us to support more PCI domains.
Depends on the use case I guess. If you just need many pcie devices
this probably doesn't help. If you want
Hi Gerd
On 08/28/2018 07:12 AM, Zihan Yang wrote:
Gerd Hoffmann 于2018年8月27日周一 上午7:04写道：
Hi,
However, QEMU only binds port 0xcf8 and 0xcfc to
bus pcie.0. To avoid bus confliction, we should use other port pairs for
busses under new domains.
I would skip support for IO based
Hi Zihan,
On 08/19/2018 04:51 AM, Zihan Yang wrote:
Hi Marcel,
Marcel Apfelbaum 于2018年8月18日周六 上午1:14写道：
Hi Zihan,
On 08/09/2018 09:33 AM, Zihan Yang wrote:
The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
change it to a new type TYPE_PXB_PCIE_HOST to better
On 08/19/2018 05:00 AM, Zihan Yang wrote:
Marcel Apfelbaum 于2018年8月18日周六 上午1:49写道：
On 08/09/2018 09:34 AM, Zihan Yang wrote:
Describe new pci segments of host bridges in AML as new pci devices,
with _SEG and _BBN to let them be in DSDT.
Besides, bus_nr indicates the bus number of pxb
Hi Roger,
On 08/24/2018 06:58 PM, Roger Pau Monné wrote:
Hello,
The usage of mremap in the pvrdma code breaks the build on FreeBSD:
/root/src/xen/tools/qemu-xen-dir/hw/rdma/vmw/pvrdma_cmd.c:60:17: warning:
implicit declaration of
function 'mremap' is invalid in C99
Hi Jing,
On 08/24/2018 05:27 AM, Liu, Jing2 wrote:
Hi Marcel,
On 8/22/2018 2:58 PM, Marcel Apfelbaum wrote:
Hi Jing,
On 08/22/2018 04:53 AM, Liu, Jing2 wrote:
Hi Marcel,
On 8/21/2018 5:59 PM, Marcel Apfelbaum wrote:
On 08/21/2018 06:18 AM, Jing Liu wrote:
Add hint to firmware (e.g
DEC_DPRINTF(fmt, ...)
-#endif
-
#define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154)
typedef struct DECState {
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
Hi Jing,
On 08/22/2018 04:53 AM, Liu, Jing2 wrote:
Hi Marcel,
On 8/21/2018 5:59 PM, Marcel Apfelbaum wrote:
On 08/21/2018 06:18 AM, Jing Liu wrote:
Add hint to firmware (e.g. SeaBIOS) to reserve addtional
BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the
resource reserve
NE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
+ res_reserve.mem_pref_64, -1),
+
DEFINE_PROP_END_OF_LIST(),
};
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
nit(PCIDevice *dev, int cap_offset,
- uint32_t bus_reserve, uint64_t io_reserve,
- uint64_t mem_non_pref_reserve,
- uint64_t mem_pref_32_reserve,
- uint64_t mem_pref_64_reserve,
- Error **errp);
+ PCIResReserve res_reserve, Error **errp);
#endif /* QEMU_PCI_BRIDGE_H */
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
Hi Jing,
On 08/20/2018 05:58 AM, Liu, Jing2 wrote:
Hi Marcel,
On 8/18/2018 12:10 AM, Marcel Apfelbaum wrote:
Hi Jing,
On 08/16/2018 12:28 PM, Jing Liu wrote:
Clean up the PCI config space of resource reserve capability.
Signed-off-by: Jing Liu
---
hw/pci/pci_bridge.c | 9
From: Yuval Shaia
To ease maintenance of struct comp_thread move all related code to
dedicated function.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-11-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_backend.
In some BSD systems RDMA migration is possible while
the pvrdma device can't be used because the mremap system call
is missing.
Reported-by: Rebecca Cran
Signed-off-by: Marcel Apfelbaum
Message-Id: <20180816151637.24553-1-marcel.apfelb...@gmail.com>
Reviewed-by: Thomas Huth
---
con
the offset of the virtual address in mr->virt.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-13-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_rm.c| 2 ++
hw/rdma/vmw/pvrdma_cmd.c | 1 +
2 files changed, 3 insertions
From: Yuval Shaia
To be consistent with other prints throughout the code fix places that
print it as decimal number.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-12-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdm
From: Yuval Shaia
There is no use in the memory allocated for non-dma MR.
Delete the code that allocates it.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-8-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_rm.
From: Yuval Shaia
The field backend_dev->dev is not initialized, fix it.
Signed-off-by: Yuval Shaia
Message-Id: <20180805153518.2983-14-yuval.sh...@oracle.com>
Reviewed-by: Marcel Apfelbaum
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_backend.c| 6 +-
hw/rdma/rdma_
From: Yuval Shaia
Next CQE is fetched from CQ ring, clean it before usage as it still
carries old CQE values.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-5-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma_qp
From: Yuval Shaia
To be consistence with allocation do the reverse order in deallocation
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-9-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_rm.c | 3 ++-
1 file chan
No need to include linux/types.h, is empty anyway.
Suggested-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
Message-Id: <20180811171534.11917-1-marcel.apfelb...@gmail.com>
Reviewed-by: Yuval Shaia
---
hw/rdma/vmw/pvrdma_cmd.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/rd
From: Yuval Shaia
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-10-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/rd
From: Yuval Shaia
- Add line counter to ease navigation in log
- Print rdma instead of pvrdma
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-4-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_utils.c | 4
h
tage is the creation of a CQ
completion handler thread.
Driver expects such distinction - implement it.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-2-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma
From: Yuval Shaia
0x7FFF is not the default pkey - fix it.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
Message-Id: <20180805153518.2983-6-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma.h | 3 +++
hw/rdma/vmw/pvrdma_cmd.c | 2 +-
2
From: Yuval Shaia
The structure RdmaRmUserMR has no benefits, remove it an move all its
fields to struct RdmaRmMR.
Reviewed-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
Message-Id: <20180805153518.2983-7-yuval.sh...@oracle.com>
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/rdma_bac
com>
Reviewed-by: Marcel Apfelbaum
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma_cmd.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c
index 14255d609f..e7d6589cdc 100644
--- a/hw/rdma/vmw/pvrdma_cmd.c
+++ b/h
Marcel Apfelbaum (2):
hw/pvrdma: remove not needed include
config: split PVRDMA from RDMA
Yuval Shaia (13):
hw/rdma: Make distinction between device init and start modes
hw/pvrdma: Bugfix - provide the correct attr_mask to query_qp
hw/rdma: Modify debug macros
hw
Hi Yuval,
On 08/14/2018 01:00 PM, Yuval Shaia wrote:
Function create_ah might return NULL, let's exit with an error.
Signed-off-by: Yuval Shaia
---
hw/rdma/rdma_backend.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
index
On 08/09/2018 09:35 AM, Zihan Yang wrote:
The bus_nr indicates the bus number of pxb-pcie under pcie.0, but since pxb
host can be put into different pci domain, the start bus should always be 0
I am not sure about this limitation. Do you know where is coming from?
Why do we must start a
On 08/09/2018 09:35 AM, Zihan Yang wrote:
This enables seabios to read config file in pxb host bus other than sysbus
Signed-off-by: Zihan Yang
---
hw/pci-bridge/pci_expander_bridge.c | 15 +++
include/hw/pci-bridge/pci_expander_bridge.h | 3 +++
2 files changed, 18
On 08/09/2018 09:34 AM, Zihan Yang wrote:
Describe new pci segments of host bridges in AML as new pci devices,
with _SEG and _BBN to let them be in DSDT.
Besides, bus_nr indicates the bus number of pxb-pcie under pcie.0 bus,
but since we put it into separate domain, it should be zero,
Why
Hi Zihan,
On 08/09/2018 09:33 AM, Zihan Yang wrote:
Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve
corresponding MCFG space for them. This allows user-defined pxb-pcie
host bridges to be placed in different pci domain than q35 host.
The pci_host_bridges list is
Hi Zihan,
On 08/09/2018 09:33 AM, Zihan Yang wrote:
The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe
Signed-off-by: Zihan Yang
---
hw/pci-bridge/pci_expander_bridge.c | 127
Hi Jing,
On 08/16/2018 12:28 PM, Jing Liu wrote:
This patch serial is about PCI resource reserve capability.
First patch refactors the resource reserve fields in GenPCIERoorPort
structure out to another new structure, called "PCIResReserve". Modify
the parameter list of
Hi Jing,
On 08/16/2018 12:28 PM, Jing Liu wrote:
Add hint to firmware (e.g. SeaBIOS) to reserve addtional
BUS/IO/MEM/PREF resource for legacy pci-pci bridge.
Signed-off-by: Jing Liu
---
hw/pci-bridge/pci_bridge_dev.c | 25 +
1 file changed, 25 insertions(+)
diff
On 08/14/2018 12:15 PM, Liu, Jing2 wrote:
Hi Marcel,
On 8/12/2018 3:11 PM, Marcel Apfelbaum wrote:
Hi Laszlo,
[...]
hw/pci-bridge/pci_bridge_dev.c | 20
1 file changed, 20 insertions(+)
+cap_error:
+ msi_uninit(dev);
(4) This error handler doesn't look
Hi Jing,
On 08/16/2018 12:28 PM, Jing Liu wrote:
Clean up the PCI config space of resource reserve capability.
Signed-off-by: Jing Liu
---
hw/pci/pci_bridge.c | 9 +
include/hw/pci/pci_bridge.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/hw/pci/pci_bridge.c
Hi Jing,
On 08/16/2018 12:28 PM, Jing Liu wrote:
Factor "bus_reserve", "io_reserve", "mem_reserve", "pref32_reserve"
and "pref64_reserve" fields of the "GenPCIERootPort" structure out
to "PCIResReserve" structure, so that other PCI bridges can
reuse it to add resource reserve capability.
On 08/14/2018 12:32 PM, Liu, Jing2 wrote:
On 8/12/2018 3:11 PM, Marcel Apfelbaum wrote:
[...]
I don't know what to suggest for the new capability's
teardown, in pci_bridge_dev_exitfn() -- should we just ignore it (as
suggested by this patch)?
No, we should remove it properly.
I think
Hi Thomas,
On 08/16/2018 06:48 PM, Thomas Huth wrote:
On 08/16/2018 05:16 PM, Marcel Apfelbaum wrote:
In some BSD systems RDMA migration is possible while
the pvrdma device can't be used because the mremap system call
is missing.
Signed-off-by: Marcel Apfelbaum
---
configure
Hi
On 08/16/2018 06:16 PM, Marcel Apfelbaum wrote:
In some BSD systems RDMA migration is possible while
the pvrdma device can't be used because the mremap system call
is missing.
Signed-off-by: Marcel Apfelbaum
---
v1->v2:
- Test pvrdma support against mremap instead of BSD syst
In some BSD systems RDMA migration is possible while
the pvrdma device can't be used because the mremap system call
is missing.
Signed-off-by: Marcel Apfelbaum
---
configure | 55 ++-
hw/rdma/Makefile.objs | 2 +-
2 files changed, 55
On 08/16/2018 12:02 PM, Thomas Huth wrote:
On 08/16/2018 10:55 AM, Marcel Apfelbaum wrote:
On 08/15/2018 04:37 PM, Kamil Rytarowski wrote:
On 06.08.2018 10:51, Thomas Huth wrote:
On 07/28/2018 05:50 AM, Rebecca Cran wrote:
On 7/25/18 5:14 AM, Thomas Huth wrote:
Note that the error has
In some BSD systems RDMA migration is possible while
the pvrdma device can't be compiled because the mremap
system call is missing.
Reported-by: Rebecca Cran
Signed-off-by: Marcel Apfelbaum
---
configure | 41 -
hw/rdma/Makefile.objs | 2
ecause it depends on a series that was not
yet merged.
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 08/15/2018 04:37 PM, Kamil Rytarowski wrote:
On 06.08.2018 10:51, Thomas Huth wrote:
On 07/28/2018 05:50 AM, Rebecca Cran wrote:
On 7/25/18 5:14 AM, Thomas Huth wrote:
Note that the error has been reported to happen on FreeBSD - so I doubt
that this header should be here.
Anyway, our
On 08/12/2018 11:39 AM, Yuval Shaia wrote:
On Sat, Aug 11, 2018 at 07:47:49PM +0300, Marcel Apfelbaum wrote:
Hi,
On 08/06/2018 11:51 AM, Thomas Huth wrote:
On 07/28/2018 05:50 AM, Rebecca Cran wrote:
On 7/25/18 5:14 AM, Thomas Huth wrote:
Note that the error has been reported to happen
Hi Laszlo,
On 08/07/2018 06:59 PM, Laszlo Ersek wrote:
On 08/07/18 14:19, Laszlo Ersek wrote:
On 08/07/18 09:04, Jing Liu wrote:
Add hint to firmware (e.g. SeaBIOS) to reserve addtional
IO/MEM/PREF spaces for legacy pci-pci bridge, to enable
some pci devices hotplugging whose IO/MEM/PREF
No need to include linux/types.h, is empty anyway.
Suggested-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma_cmd.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c
index 14255d609f..3f697c8db7 100644
--- a/hw/rdma/vmw
Hi,
On 08/07/2018 03:19 PM, Laszlo Ersek wrote:
On 08/07/18 09:04, Jing Liu wrote:
Add hint to firmware (e.g. SeaBIOS) to reserve addtional
IO/MEM/PREF spaces for legacy pci-pci bridge, to enable
some pci devices hotplugging whose IO/MEM/PREF spaces
requests are larger than the ones in pci-pci
Hi,
On 08/06/2018 11:51 AM, Thomas Huth wrote:
On 07/28/2018 05:50 AM, Rebecca Cran wrote:
On 7/25/18 5:14 AM, Thomas Huth wrote:
Note that the error has been reported to happen on FreeBSD - so I doubt
that this header should be here.
Anyway, our include/standard-headers/linux/types.h is
On 08/02/2018 05:45 AM, Zihan Yang wrote:
The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default,
change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe
After an offline conversation we decided to not review this version
and wait for the next one, that
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