Re: [Qemu-devel] [PATCH v2 13/13] hw/rdma: Add reference to pci_dev in backend_dev

kend_device_name, dev->backend_port_num, dev->backend_gid_idx, >dev_attr, errp); if (rc) { Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH v2 07/13] hw/rdma: Do not allocate memory for non-dma MR

y_mr(>backend_mr); -munmap(mr->virt, mr->length); +pr_dbg("start=0x%" PRIx64 "\n", mr->start); +if (mr->start) { +munmap(mr->virt, mr->length); +} res_tbl_dealloc(_res->mr_tbl, mr_handle); } } Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH v2 06/13] hw/rdma: Delete useless structure RdmaRmUserMR

h @@ -55,16 +55,12 @@ typedef struct RdmaRmCQ { bool notify; } RdmaRmCQ; -typedef struct RdmaRmUserMR { -void *host_virt; -uint64_t guest_start; -size_t length; -} RdmaRmUserMR; - /* MR (DMA region) */ typedef struct RdmaRmMR { RdmaBackendMR backend_mr; -RdmaRm

Re: [Qemu-devel] [virtio-dev] [PATCH v3 3/3] Add "Group Identifier" support to Red Hat PCI Express bridge.

On 07/31/2018 07:03 PM, Michael S. Tsirkin wrote: On Tue, Jul 31, 2018 at 10:58:37AM -0500, Venu Busireddy wrote: On 2018-07-07 15:14:11 +0300, Marcel Apfelbaum wrote: Hi Venu, On 06/30/2018 01:19 AM, Venu Busireddy wrote: Add a new bridge device "pcie-downstream" with a

Re: [Qemu-devel] Question: SRIOV support over Win Hyper-V VM running in QEMU process on Linux host

On 07/26/2018 07:42 PM, Knut Omang wrote: On Thu, 2018-07-26 at 19:41 +0300, Michael S. Tsirkin wrote: On Thu, Jul 26, 2018 at 06:38:32PM +0200, Knut Omang wrote: On Thu, 2018-07-26 at 18:51 +0300, Marcel Apfelbaum wrote: Hi On 07/26/2018 05:52 PM, Stefan Hajnoczi wrote: On Thu, Jul 12

Re: [Qemu-devel] Question: SRIOV support over Win Hyper-V VM running in QEMU process on Linux host

On 07/26/2018 07:14 PM, Michael S. Tsirkin wrote: On Thu, Jul 26, 2018 at 06:51:13PM +0300, Marcel Apfelbaum wrote: Hi On 07/26/2018 05:52 PM, Stefan Hajnoczi wrote: On Thu, Jul 12, 2018 at 07:33:14AM +, Elijah Shakkour wrote: Hey, Our team is adding a NIC functional emulation

Re: [Qemu-devel] RDMA wrongly detected as being supported on FreeBSD

On 07/25/2018 01:59 PM, Dr. David Alan Gilbert wrote: * Marcel Apfelbaum (marcel.apfelb...@gmail.com) wrote: Hi, On 07/25/2018 10:32 AM, Thomas Huth wrote: On 25.07.2018 06:47, Rebecca Cran wrote: In commit 18a398f6a39df4b08ff86ac0d38384193ca5f4cc, ./configure on FreeBSD incorrectly

Re: [Qemu-devel] Question: SRIOV support over Win Hyper-V VM running in QEMU process on Linux host

need at least a device with SR-IOV support to justify the addition. Contact your system vendor for further information. " I'm not sure what the status of emulated SR-IOV is so I have CCed Michael Tsirkin and Marcel Apfelbaum, the PCI maintainers in QEMU. Thanks, Marcel Could you ple

Re: [Qemu-devel] RDMA wrongly detected as being supported on FreeBSD

Hi, On 07/25/2018 10:32 AM, Thomas Huth wrote: On 25.07.2018 06:47, Rebecca Cran wrote: In commit 18a398f6a39df4b08ff86ac0d38384193ca5f4cc, ./configure on FreeBSD incorrectly detects RDMA support, configure is looking for the rdma related libraries,  if they are there, the rdma code will be

Re: [Qemu-devel] [PATCH 01/13] hw/rdma: Make distinction between device init and start modes

On 07/24/2018 10:29 PM, Yuval Shaia wrote: On Tue, Jul 24, 2018 at 03:08:10PM +0300, Marcel Apfelbaum wrote: Hi Yuval, On 07/16/2018 10:40 AM, Yuval Shaia wrote: There are certain operations that are well considered as part of device configuration while others are needed only when "

Re: [Qemu-devel] [PATCH 12/13] hw/rdma: Bugfix: Support non-aligned buffers

rt = mremap(curr_page, 0, length, MREMAP_MAYMOVE); +pr_dbg("mremap %p -> %p\n", curr_page, host_virt); if (host_virt == MAP_FAILED) { host_virt = NULL; error_report("PVRDMA: Failed to remap memory for host_virt"); Nice catch! Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 07/13] hw/rdma: Do not allocate memory for non-dma MR

Hi Yuval, On 07/16/2018 10:40 AM, Yuval Shaia wrote: There is no use in the memory allocated for non-dma MR (one with host_virt equals to NULL). No need for the (one with...) Delete the code that allocates it. Signed-off-by: Yuval Shaia --- hw/rdma/rdma_rm.c | 52

Re: [Qemu-devel] [PATCH 03/13] hw/rdma: Modify debug macros

577,6 +577,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp) Object *memdev_root; bool ram_shared = false; +init_pr_dbg(); + pr_dbg("Initializing device %s %x.%x\n", pdev->name, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 01/13] hw/rdma: Make distinction between device init and start modes

636,7 @@ out: static void pvrdma_exit(PCIDevice *pdev) { -PVRDMADev *dev = PVRDMA_DEV(pdev); - -pr_dbg("Closing device %s %x.%x\n", pdev->name, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn)); - -pvrdma_qp_ops_fini(); - -rdma_rm_fini(>rdma_dev_res); - -rdma_backend_fini(>backend_dev); - -free_dsr(dev); - -if (msix_enabled(pdev)) { -uninit_msix(pdev, RDMA_MAX_INTRS); -} +pvrdma_fini(pdev); } static void pvrdma_class_init(ObjectClass *klass, void *data) Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 13/13] hw/rdma: Save pci dev in backend_dev

On 07/16/2018 10:40 AM, Yuval Shaia wrote: This field is not initialized - fix it. What field ? Please use a more readable message. Regarding the subject, maybe you can use "cache pci_dev" or "add a reference to pci_dev " instead of "save". Thanks, Marcel Signed-off-by: Yuval

Re: [Qemu-devel] [PATCH 10/13] hw/rdma: Cosmetic change - move to generic function

backend_thread(_dev->comp_thread); } void rdma_backend_fini(RdmaBackendDev *backend_dev) Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 08/13] hw/rdma: Reorder resource cleanup

bl_free(_res->mr_tbl); +res_tbl_free(_res->cq_tbl); res_tbl_free(_res->pd_tbl); + g_hash_table_destroy(dev_res->qp_hash); } Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 11/13] hw/rdma: Print backend QP number in hex format

qp_handle); if (unlikely(!qp)) { @@ -174,7 +174,7 @@ int pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle) PvrdmaRqWqe *wqe; PvrdmaRing *ring; -pr_dbg("qp_handle=%d\n", qp_handle); +pr_dbg("qp_handle=0x%x\n", qp_handle); qp = rdma_rm_

Re: [Qemu-devel] [PATCH 09/13] hw/pvrdma: Cosmetic change - indent right

efault: break; } Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 06/13] hw/rdma: Get rid of unneeded structure

On 07/16/2018 10:40 AM, Yuval Shaia wrote: This structure make no sense - removing it.    What structure? I would explicitly name it in both subject and message. Thanks, Marcel Signed-off-by: Yuval Shaia --- hw/rdma/rdma_backend.c | 3 +-- hw/rdma/rdma_rm.c | 16

Re: [Qemu-devel] [PATCH 05/13] hw/pvrdma: Make default pkey 0xFFFF

pr_dbg("pkey=0x%x\n", resp->pkey); return 0; A MACRO will be more readable. It doesn't worth a re-spin though. Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 04/13] hw/pvrdma: Clean CQE before use

cqe->wr_id; cqe1->qp = cqe->qp; cqe1->opcode = cqe->opcode; Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH 02/13] hw/pvrdma: Bugfix - provide the correct attr_mask to query_qp

-1, -_attr); +(struct ibv_qp_attr *)>attrs, +cmd->attr_mask, _attr); pr_dbg("ret=%d\n", rsp->hdr.err); return rsp->hdr.err; Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [RFC 2/3] qdev: Document ownership rules of qbus_create*()

he + * reference that was transferred to us. + */ object_unref(OBJECT(bus)); } else if (bus != sysbus_get_default()) { /* TODO: once all bus devices are qdevified, Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [RFC 3/3] pci: Document ownership rules of pci_root_bus_new*()

*address_space_io, uint8_t devfn_min, const char *typename); + void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, int nirq); int pci_bus_get_irq_level(PCIBus *bus, int irq_num); Reviewed-by: Marcel Apfelbaum

Re: [Qemu-devel] [virtio-dev] [PATCH v3 3/3] Add "Group Identifier" support to Red Hat PCI Express bridge.

Hi Venu, On 06/30/2018 01:19 AM, Venu Busireddy wrote: Add a new bridge device "pcie-downstream" with a Vendor ID of PCI_VENDOR_ID_REDHAT and a Device ID of PCI_DEVICE_ID_REDHAT_DOWNPORT_FAILOVER. Can't we use the current pcie-pci-bridge device (see hw/pci-bridge/pcie_pci_bridge.c) by adding

Re: [Qemu-devel] [RFC v2 3/3] acpi-build: describe new pci domain in AML

On 06/21/2018 07:52 PM, Zihan Yang wrote: Marcel Apfelbaum 于2018年6月20日周三 下午3:46写道： On 06/12/2018 12:13 PM, Zihan Yang wrote: Describe new pci segments of host bridges in AML. The host bridge list is replaced by QTAILQ to let q35 host be processed first in every traverse Signed-off

Re: [Qemu-devel] [RFC v2 2/3] acpi-build: allocate mcfg for pxb-pcie host bridges

On 06/21/2018 07:49 PM, Zihan Yang wrote: Thanks for your review. Marcel Apfelbaum 于2018年6月20日周三 下午3:41写道： On 06/12/2018 12:13 PM, Zihan Yang wrote: Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve corresponding MCFG space for them. This allows user-defined pxb

Re: [Qemu-devel] [RFC v2 3/3] acpi-build: describe new pci domain in AML

On 06/12/2018 12:13 PM, Zihan Yang wrote: Describe new pci segments of host bridges in AML. The host bridge list is replaced by QTAILQ to let q35 host be processed first in every traverse Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c | 69

Re: [Qemu-devel] [RFC v2 2/3] acpi-build: allocate mcfg for pxb-pcie host bridges

On 06/12/2018 12:13 PM, Zihan Yang wrote: Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve corresponding MCFG space for them. This allows user-defined pxb-pcie host bridges to be placed in different pci domain than q35 host Signed-off-by: Zihan Yang ---

Re: [Qemu-devel] [RFC v2 1/3] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

On 06/12/2018 12:13 PM, Zihan Yang wrote: The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 118

Re: [Qemu-devel] [RFC v2 1/3] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

On 06/13/2018 11:23 AM, Zihan Yang wrote: Michael S. Tsirkin 于2018年6月12日周二 下午9:43写道： On Tue, Jun 12, 2018 at 05:13:22PM +0800, Zihan Yang wrote: The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe

Re: [Qemu-devel] [PATCH] pc: Remove PC_COMPAT_2_12 from 3.0 machine-types

NE(v3_0, "pc-q35-3.0", NULL, Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH] hw/pvrdma: Bugfix - provide the correct attr_mask to query_qp

-1, -_attr); +(struct ibv_qp_attr *)>attrs, +cmd->attr_mask, _attr); pr_dbg("ret=%d\n", rsp->hdr.err); return rsp->hdr.err; Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH RFC] hw/pc: set q35 as the default x86 machine

On 06/05/2018 04:29 PM, Daniel P. Berrangé wrote: On Tue, Jun 05, 2018 at 04:20:46PM +0300, Marcel Apfelbaum wrote: On 06/05/2018 11:43 AM, Daniel P. Berrangé wrote: On Tue, Jun 05, 2018 at 09:27:46AM +0200, Gerd Hoffmann wrote: Hi, Add to that shortcuts like -cdrom stop working

Re: [Qemu-devel] [PATCH RFC] hw/pc: set q35 as the default x86 machine

On 06/05/2018 11:43 AM, Daniel P. Berrangé wrote: On Tue, Jun 05, 2018 at 09:27:46AM +0200, Gerd Hoffmann wrote: Hi, Add to that shortcuts like -cdrom stop working, Maybe is fixable. Already fixed for ages. I see marking Q35 as the default machine a first step. Maybe the better

Re: [Qemu-devel] [PATCH RFC] hw/pc: set q35 as the default x86 machine

+0300, Michael S. Tsirkin wrote: On Sun, Jun 03, 2018 at 12:27:49PM +0300, Marcel Apfelbaum wrote: Moving to QEMU 3.0 seems like a good opportunity for such a change. I440FX is really old and does not support modern features like IOMMU. Q35's SATA emulation is faster than pc's IDE, native PCI express

Re: [Qemu-devel] [PATCH RFC] hw/pc: set q35 as the default x86 machine

Hi Michael, On 06/04/2018 04:38 AM, Michael S. Tsirkin wrote: On Sun, Jun 03, 2018 at 12:27:49PM +0300, Marcel Apfelbaum wrote: Moving to QEMU 3.0 seems like a good opportunity for such a change. I440FX is really old and does not support modern features like IOMMU. Q35's SATA emulation

[Qemu-devel] [PATCH RFC] hw/pc: set q35 as the default x86 machine

-by: Marcel Apfelbaum --- hw/i386/pc_piix.c | 2 -- hw/i386/pc_q35.c | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index b4c5b03274..16dd65198f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -429,7 +429,6 @@ static void

Re: [Qemu-devel] [PATCH v4 19/21] hw/i386/pc: Remove unused include

@@ #include "hw/acpi/acpi.h" #include "hw/acpi/cpu_hotplug.h" #include "hw/boards.h" -#include "hw/pci/pci_host.h" #include "acpi-build.h" #include "hw/mem/pc-dimm.h" #include "qapi/error.h" Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH v4 10/21] hw: Do not include "exec/ioport.h" if it is not necessary

703455b7..6404af5f33 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -28,7 +28,6 @@ #include "sysemu/sysemu.h" #include "qapi/error.h" #include "qemu/range.h" -#include "exec/ioport.h" #include "hw/nvram/fw_cfg.h" #include "exec/address-spaces.h" #include "hw/acpi/piix4.h" Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] [PATCH v4 17/21] hw/misc/sga: Use the correct ISA include

97fd63f176..4a22a52a60 100644 --- a/hw/misc/sga.c +++ b/hw/misc/sga.c @@ -25,7 +25,7 @@ * */ #include "qemu/osdep.h" -#include "hw/pci/pci.h" +#include "hw/isa/isa.h" #include "hw/loader.h" #include "sysemu/sysemu.h" Reviewed-by: Marcel Apfelbaum Thanks, Marcel

Re: [Qemu-devel] QEMU: Multiple PCI domains for x86 PCI Express Machine (Q35)

Hi Aaron On 05/24/2018 12:31 PM, Wei, Aaron wrote: Hi,  Marcel It's my pleasure to write to you on behalf of a team who is developing the Intel VMD virtualization base on QEMU in Dell EMC. From https://www.outreachy.org. we find that you are working on the Multiple PCI domain feature

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

On 05/23/2018 02:11 PM, Zihan Yang wrote: Hi all, Thanks for all your comments and suggestions, I wasn't expecting so many professional reviewers. Some of the things you mentioned are beyond my knowledge right now. Please correct me if I'm wrong below. The original purpose was just to

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

On 05/23/2018 03:28 PM, Laszlo Ersek wrote: On 05/23/18 13:11, Zihan Yang wrote: Hi all, The original purpose was just to support multiple segments in Intel Q35 archtecure for PCIe topology, which makes bus number a less scarce resource. The patches are very primitive and many things are left

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

On 05/23/2018 10:32 AM, Laszlo Ersek wrote: On 05/23/18 01:40, Michael S. Tsirkin wrote: On Wed, May 23, 2018 at 12:42:09AM +0200, Laszlo Ersek wrote: Hold on, On 05/22/18 21:51, Laszlo Ersek wrote: It had taken years until the edk2 core gained a universal PciHostBridgeDxe driver with a

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

Hi Alex, On 05/23/2018 12:17 AM, Alex Williamson wrote: On Tue, 22 May 2018 21:51:47 +0200 Laszlo Ersek <ler...@redhat.com> wrote: On 05/22/18 21:01, Marcel Apfelbaum wrote: Hi Laszlo, On 05/22/2018 12:52 PM, Laszlo Ersek wrote: On 05/21/18 13:53, Marcel Apfelbaum wrote: On 05/20/2

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

On 05/23/2018 05:25 PM, Michael S. Tsirkin wrote: On Tue, May 22, 2018 at 10:28:56PM -0600, Alex Williamson wrote: On Wed, 23 May 2018 02:38:52 +0300 "Michael S. Tsirkin" wrote: On Tue, May 22, 2018 at 03:47:41PM -0600, Alex Williamson wrote: On Wed, 23 May 2018 00:44:22

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

Hi Laszlo, On 05/22/2018 12:52 PM, Laszlo Ersek wrote: On 05/21/18 13:53, Marcel Apfelbaum wrote: On 05/20/2018 10:28 AM, Zihan Yang wrote: Currently only q35 host bridge us allocated space in MCFG table. To put pxb host into sepratate pci domain, each of them should have its own

Re: [Qemu-devel] [RFC 1/3] pci_expander_bridge: reserve enough mcfg space for pxb host

On 05/22/2018 08:59 AM, Zihan Yang wrote: Hi Marcel, Thanks a lot for your feedback. > I don't think we should try to place the MMCFGs before 4G even if there > is enough room. Is better to place them always after 4G. > > "above_4g_mem" PCI hole it is reserved for PCI devices hotplug. We

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

On 05/22/2018 09:03 AM, Zihan Yang wrote: > An interesting point is if we want to limit the MMFCG size for PXBs, as we may not be > interested to use all the buses in a specific domain. OK, perhaps providing an option for the user to specify the desired bus numbers? Right, specifying

Re: [Qemu-devel] [RFC 2/3] pci: Link pci_host_bridges with QTAILQ

Hi Zihan, On 05/22/2018 08:59 AM, Zihan Yang wrote: >  have no objection here, we'll see later how the modification helps. The purpose is to place the q35 host at the start of queue. In the original QLIST, when a new pxb host is added, q35 host will be bumped to the end end list. By

Re: [Qemu-devel] [RFC 0/3] pci_expander_brdige: Put pxb host bridge into separate pci domain

Hi Zihan On 05/20/2018 10:28 AM, Zihan Yang wrote: You do have patch 0, sorry for not seeing it, please disregard my prev comment. Currently only q35 host bridge is allocated an item in MCFG table, all pxb host bridges stay within pci domain 0. This series of patches put each pxb host

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

On 05/20/2018 10:28 AM, Zihan Yang wrote: Currently only q35 host bridge us allocated space in MCFG table. To put pxb host into sepratate pci domain, each of them should have its own configuration space int MCFG table Signed-off-by: Zihan Yang ---

Re: [Qemu-devel] [RFC 2/3] pci: Link pci_host_bridges with QTAILQ

On 05/20/2018 10:28 AM, Zihan Yang wrote: QLIST will place the original q35 host bridge at the end of list because it is added first. Replace it with QTAILQ to make q35 at the first of queue, which makes it convinient and compatible when there are pxb hosts other than q35 hosts I have no

Re: [Qemu-devel] [RFC 1/3] pci_expander_bridge: reserve enough mcfg space for pxb host

Hi Zihan, On 05/20/2018 10:28 AM, Zihan Yang wrote: Thank you for posting the patches! For the next version please add a cover letter so we can discuss cross patchesideas. To put each pxb into separate pci domain, we need to reserve enough MCFG space for each pxb host in the main memory.

Re: [Qemu-devel] [PATCH v4 02/11] machine: make MemoryHotplugState accessible via the machine

tplug memory address space */ if (machine->ram_size < machine->maxram_size) { Reviewed-by: Marcel Apfelbaum<marcel.apfelb...@gmail.com> Thanks, Marcel

Re: [Qemu-devel] [PATCH 57/67] kvm: use include "kvm_i386.h" consistently

+#include "kvm_i386.h" static inline void kvm_apic_set_reg(struct kvm_lapic_state *kapic, int reg_id, uint32_t val) Reviewed-by: Marcel Apfelbaum<marcel.apfelb...@gmail.com> Thanks, Marcel

Re: [Qemu-devel] [PATCH 42/67] tcg: use include "tcg.h" consistently

.c @@ -25,7 +25,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" #include "exec/cpu-common.h" -#include "tcg/tcg.h" +#include "tcg.h" #if defined(CONFIG_TCG_INTERPRETER) uintptr_t tci_tb_ptr; diff --git a/tcg/tci.c b/tcg/tci.c index 33edca1..2d11dc6 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -28,7 +28,7 @@ #endif #include "qemu-common.h" -#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */ +#include "tcg.h" /* MAX_OPC_PARAM_IARGS */ #include "exec/cpu_ldst.h" #include "tcg-op.h" Reviewed-by: Marcel Apfelbaum<marcel.apfelb...@gmail.com> Thanks, Marcel

[Qemu-devel] [PULL 3/8] hw/rdma: Delete port's pkey table

From: Yuval Shaia <yuval.sh...@oracle.com> Support for PKEY is not yet implemented. Removing the unneeded table until a support will be added. Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Message-Id: <

[Qemu-devel] [PULL 6/8] hw/rdma: Delete duplicate definition of MAX_RM_TBL_NAME

From: Yuval Shaia <yuval.sh...@oracle.com> By a mistake this constant was defined twice - remove the duplication. Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Message-Id: <20180430200223.4119-7-marcel.apfelb.

[Qemu-devel] [PULL 2/8] hw/rdma: Fix possible usage of a NULL pointer

Coverity CID 1390586; The cq handle is provided by the guest and cannot be trusted to be previuosly allocated. Fix it by exiting the completion flow. Reported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Reviewed-by:

[Qemu-devel] [PULL 8/8] MAINTAINERS: update Marcel Apfelbaum email

From: Marcel Apfelbaum <mar...@redhat.com> Use my gmail account for maintainer tasks. Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> Message-Id: <20180426084523.10565-1-mar...@redhat.com> Reviewed-by: Yuval Shaia <yuval.sh...@oracle.com> --- MAINTAINERS | 8 +++

[Qemu-devel] [PULL 7/8] hw/rdma: Fix possible out of bounds access to port GID index

Make sure the backend GID index is less then port's gid table length. Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Reviewed-by: Yuval Shaia <yuval.sh...@oracle.com> Message-Id: <20180430200223.4119-8-marcel.apfelb...@gmail.com> --- hw/rdma/rdma_backend.c | 2 +-

[Qemu-devel] [PULL 4/8] hw/rdma: Fix possible out of bounds access to GID table

From: Yuval Shaia <yuval.sh...@oracle.com> Array size is MAX_PORT_GIDS, let's make sure the given index is in range. While there limit device table size to 1. Reported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by

[Qemu-devel] [PULL 1/8] hw/rdma: Fix possible munmap call on a NULL pointer

Coverity CID 1390620: we call munmap() on a NULL pointer. Reported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Reviewed-by: Yuval Shaia <yuval.sh...@oracle.com> Message-Id: <20180430200223.4119-2-marcel.apfelb.

[Qemu-devel] [PULL 5/8] hw/rdma: Fix possible out of bounds access to regs array

ported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Message-Id: <20180430200223.4119-6-marcel.apfelb...@gmail.com> --- hw/rdma/vmw/pvrdma.h | 6 +++--- hw/rdma/vmw/p

[Qemu-devel] [PULL 0/8] RDMA queue

to fetch changes up to fe355cbda28b5e3dfc6a70b902343b84c466aa17: MAINTAINERS: update Marcel Apfelbaum email (2018-05-03 20:52:29 +0300) * fix PVRDMA coverity errors * update MAINTAINERS file

Re: [Qemu-devel] [PATCH 7/7] hw/rdma: Fix possible out of bounds access to port GID index

On 05/01/2018 12:14 AM, Eric Blake wrote: On 04/30/2018 03:02 PM, Marcel Apfelbaum wrote: Make sure the backend GID index is less then port's git table length. s/git/gid/ Thanks, I will fix in the pull request Marcel Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.

[Qemu-devel] [PATCH 7/7] hw/rdma: Fix possible out of bounds access to port GID index

Make sure the backend GID index is less then port's git table length. Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Reviewed-by: Yuval Shaia <yuval.sh...@oracle.com> --- hw/rdma/rdma_backend.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --g

[Qemu-devel] [PATCH 6/7] hw/rdma: Delete duplicate definition of MAX_RM_TBL_NAME

From: Yuval Shaia <yuval.sh...@oracle.com> By a mistake this constant was defined twice - remove the duplication. Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> --- hw/rdma/rdma_rm.c | 2 -- hw/rdma/rdma_rm_

[Qemu-devel] [PATCH 2/7] hw/rdma: Fix possible usage of a NULL pointer

Coverity CID 1390586; The cq handle is provided by the guest and cannot be trusted to be previuosly allocated. Fix it by exiting the completion flow. Reported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Reviewed-by:

[Qemu-devel] [PATCH 5/7] hw/rdma: Fix possible out of bounds access to regs array

ported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> --- hw/rdma/vmw/pvrdma.h | 6 +++--- hw/rdma/vmw/pvrdma_main.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(

[Qemu-devel] [PATCH 0/7] hw/rdma: coverity fixes

From: Marcel Apfelbaum <mar...@redhat.com> Various fixes that were found by coverity. (run by Peter, thanks!) Thanks, Marcel Marcel Apfelbaum (3): hw/rdma: Fix possible munmap call on a NULL pointer hw/rdma: Fix possible usage of a NULL pointer hw/rdma: Fix possible out of bounds

[Qemu-devel] [PATCH 4/7] hw/rdma: Fix possible out of bounds access to GID table

From: Yuval Shaia <yuval.sh...@oracle.com> Array size is MAX_PORT_GIDS, let's make sure the given index is in range. While there limit device table size to 1. Reported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by

[Qemu-devel] [PATCH 1/7] hw/rdma: Fix possible munmap call on a NULL pointer

Coverity CID 1390620: we call munmap() on a NULL pointer. Reported-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Reviewed-by: Yuval Shaia <yuval.sh...@oracle.com> --- hw/rdma/vmw/pvrdma_cmd.c | 2 +- 1 file changed,

[Qemu-devel] [PATCH 3/7] hw/rdma: Delete port's pkey table

From: Yuval Shaia <yuval.sh...@oracle.com> Support for PKEY is not yet implemented. Removing the unneeded table until a support will be added. Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelb...@gmail.com> --- hw/rdma/rdma

Re: [Qemu-devel] [PATCH PULL v2 09/10] hw/rdma: Implementation of PVRDMA device

On 27/04/2018 17:55, Peter Maydell wrote: > On 19 February 2018 at 11:43, Marcel Apfelbaum <mar...@redhat.com> wrote: >> From: Yuval Shaia <yuval.sh...@oracle.com> >> >> PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA device. >>

Re: [Qemu-devel] [PATCH PULL v2 09/10] hw/rdma: Implementation of PVRDMA device

On 27/04/2018 17:49, Peter Maydell wrote: > On 19 February 2018 at 11:43, Marcel Apfelbaum <mar...@redhat.com> wrote: >> From: Yuval Shaia <yuval.sh...@oracle.com> >> >> PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA device. >>

Re: [Qemu-devel] [PATCH PULL v2 08/10] hw/rdma: PVRDMA commands and data-path ops

On 27/04/2018 18:01, Peter Maydell wrote: > On 19 February 2018 at 11:43, Marcel Apfelbaum <mar...@redhat.com> wrote: >> From: Yuval Shaia <yuval.sh...@oracle.com> >> >> First PVRDMA sub-module - implementation of the PVRDMA device. >> - PVRDMA commands suc

Re: [Qemu-devel] [PATCH PULL v2 08/10] hw/rdma: PVRDMA commands and data-path ops

On 27/04/2018 17:58, Peter Maydell wrote: > On 19 February 2018 at 11:43, Marcel Apfelbaum <mar...@redhat.com> wrote: >> From: Yuval Shaia <yuval.sh...@oracle.com> >> >> First PVRDMA sub-module - implementation of the PVRDMA device. >> - PVRDMA commands suc

Re: [Qemu-devel] [PATCH PULL v2 08/10] hw/rdma: PVRDMA commands and data-path ops

On 27/04/2018 17:43, Peter Maydell wrote: > On 19 February 2018 at 11:43, Marcel Apfelbaum <mar...@redhat.com> wrote: >> From: Yuval Shaia <yuval.sh...@oracle.com> >> >> First PVRDMA sub-module - implementation of the PVRDMA device. >> - PVRDMA commands suc

Re: [Qemu-devel] [PATCH PULL v2 08/10] hw/rdma: PVRDMA commands and data-path ops

Hi Peter, On 27/04/2018 17:31, Peter Maydell wrote: > On 19 February 2018 at 11:43, Marcel Apfelbaum <mar...@redhat.com> wrote: >> From: Yuval Shaia <yuval.sh...@oracle.com> >> >> First PVRDMA sub-module - implementation of the PVRDMA device. >> - PVRDMA c

Re: [Qemu-devel] [PATCH v2] pc-dimm: fix error messages if no slots were defined

e allocated, please specify " > + "the 'slots' option"); > +return slot; > +} > + > +bitmap = bitmap_new(max_slots); > object_child_foreach(qdev_get_machine(), pc_dimm_slot2bitmap, bitmap); > > /* check if requested slot is not occupied */ > Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Thanks, Marcel

Re: [Qemu-devel] [PATCH v1] pc-dimm: fix error messages if no slots were defined

Hi David, On 26/04/2018 13:34, David Hildenbrand wrote: > If not slots were defined we try to allocate an empty bitmap, which not -> no > fails. > > Signed-off-by: David Hildenbrand > --- > > This fixes the queued patch "exec: Allow memory regions with size 0" > >

[Qemu-devel] [PATCH] MAINTAINERS: update Marcel Apfelbaum email

Use my gmail account for maintainer tasks. Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> --- MAINTAINERS | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 24b70169bc..459e3594e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@

Re: [Qemu-devel] [PATCH v3 41/41] cutils: Do not include "qemu/units.h" directly

/machine.c > @@ -19,7 +19,7 @@ > #include "sysemu/sysemu.h" > #include "sysemu/numa.h" > #include "qemu/error-report.h" > -#include "qemu/cutils.h" > +#include "qemu/units.h" > #include "sysemu/qtest.h" > > static char *machine_get_accel(Object *obj, Error **errp) > Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Thanks, Marcel

Re: [Qemu-devel] [PATCH v3 32/41] hw/i386: Use the BYTE-based definitions

if (lowmem & ((1 * G_BYTE) - 1)) { Hi Philippe, You stripped the parentheses from other places, but not from here ... > warn_report("Large machine and max_ram_below_4g " > "(%" PRIu64 ") not a mul

Re: [Qemu-devel] [PATCH v3 38/41] hw/rdma: Use the BYTE-based definitions

RDMA_REG_BAR_IDX 1 > #define RDMA_UAR_BAR_IDX 2 > -#define RDMA_BAR0_MSIX_SIZE (16 * 1024) > +#define RDMA_BAR0_MSIX_SIZE (16 * K_BYTE) > #define RDMA_BAR1_REGS_SIZE 256 > #define RDMA_BAR2_UAR_SIZE (0x1000 * MAX_UCS) /* each uc gets page */ > > Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Thanks, Marcel

Re: [Qemu-devel] [PATCH for-2.13 5/5] hw/dma/i8257: Rename i8257_dma_init(false) -> i8257_dma_init_pc_at()

98,7 @@ void mips_malta_init(MachineState *machine) > smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, > isa_get_irq(NULL, 9), NULL, 0, NULL); > pit = i8254_pit_init(isa_bus, 0x40, 0, NULL); > -i8257_dma_init(isa_bus, 0); > +i8257_dma_init_pc_at(isa_bus); > mc146818_rtc_init(isa_bus, 2000, NULL); > > /* generate SPD EEPROM data */ > Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Thanks, Marcel

[Qemu-devel] [PATCH PULL 5/8] hw/rdma: fix clang compilation errors

Fix some enum castings and extra parentheses. Reported-by: Michael S. Tsirkin <m...@redhat.com> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> Message-Id: <20180321140316.96045-1-mar...@redhat.com> Reviewed-by: Yuval Shaia <yuval.sh...@oracle.com> --- hw/rdma/vmw/pvr

[Qemu-devel] [PATCH PULL 2/8] hw/rdma: Add support for Query QP verb to pvrdma device

From: Yuval Shaia <yuval.sh...@oracle.com> This IB verb is needed by some applications - implement it. Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> --- hw/rd

[Qemu-devel] [PATCH PULL 8/8] hw/rdma: Fix 32-bit compilation

Reviewed-by: Eric Blake <ebl...@redhat.com> Tested-by: Eric Blake <ebl...@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> Message-Id: <20180322095220.9976-4-yuval.sh...@oracle.com> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> --- hw/rdma/rdma_back

[Qemu-devel] [PATCH PULL 7/8] hw/rdma: Use correct print format in CHK_ATTR macro

..@redhat.com> Tested-by: Eric Blake <ebl...@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> Message-Id: <20180322095220.9976-3-yuval.sh...@oracle.com> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> --- hw/rdma/rdma_backend.c | 4 ++-- 1 file chan

[Qemu-devel] [PATCH PULL 1/8] hw/rdma: Add Query QP operation

From: Yuval Shaia <yuval.sh...@oracle.com> This operation is needed by rdma devices - implement it. Signed-off-by: Yuval Shaia <yuval.sh...@oracle.com> Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> --- hw/

[Qemu-devel] [PATCH PULL 4/8] make: switch from -I to -iquote

ed-by: Stefan Weil <s...@weilnetz.de> Signed-off-by: Michael S. Tsirkin <m...@redhat.com> Reviewed-by: Daniel P. Berrangé <berra...@redhat.com> Reviewed-by: Stefan Hajnoczi <stefa...@redhat.com> Reviewed-by: Marcel Apfelbaum <mar...@redhat.com> Signed-off-by:

[Qemu-devel] [PATCH PULL 6/8] hw/rdma: Change host_virt to void *

org> Message-Id: <20180322095220.9976-2-yuval.sh...@oracle.com> Signed-off-by: Marcel Apfelbaum <mar...@redhat.com> --- hw/rdma/rdma_backend.c | 8 hw/rdma/rdma_backend.h | 2 +- hw/rdma/rdma_rm.c | 10 +- hw/rdma/rdma_rm_defs.h | 2 +- 4 files changed, 1

[Qemu-devel] [PATCH PULL 3/8] rdma: fix up include directives

From: "Michael S. Tsirkin" <m...@redhat.com> Our rule right now is to use <> for external headers only. RDMA code violates that, fix it up. Signed-off-by: Michael S. Tsirkin <m...@redhat.com> Reviewed-by: Daniel P. Berrangé <berra...@redhat.com> Reviewed-by: M

[Qemu-devel] [PATCH PULL 0/8] RDMA queue

- switch from -I to -iquote Marcel Apfelbaum (1): hw/rdma: fix clang compilation errors Michael S. Tsirkin (2): rdma: fix up include directives make: switch from -I to -iquote Yuval Shaia (5): hw/rdma: Add

Re: [Qemu-devel] [PATCH 0/3] hw/rdma: Fix 32-bit compilation

Hi Yuval, - Original Message - > From: no-re...@patchew.org > To: "yuval shaia" > Cc: f...@redhat.com, "yuval shaia" , > mar...@redhat.com, ebl...@redhat.com, > qemu-devel@nongnu.org, qemu-triv...@nongnu.org > Sent: Thursday, March 22,

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