ned-off-by: Marcel Apfelbaum
---
hw/pci-bridge/gen_pcie_root_port.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/pci-bridge/gen_pcie_root_port.c
b/hw/pci-bridge/gen_pcie_root_port.c
index ad4e6aa7ff..0e2f2e8bf1 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/
On 09/01/2018 14:51, Cornelia Huck wrote:
On Tue, 9 Jan 2018 13:08:33 +0200
Yuval Shaia wrote:
On Tue, Jan 09, 2018 at 11:39:11AM +0100, Cornelia Huck wrote:
On Sun, 7 Jan 2018 14:32:23 +0200
Marcel Apfelbaum wrote:
diff --git a/hw/rdma/vmw/pvrdma_dev_api.h b/hw/rdma/vmw
Hi Cornelia,
On 09/01/2018 12:39, Cornelia Huck wrote:
On Sun, 7 Jan 2018 14:32:23 +0200
Marcel Apfelbaum wrote:
From: Yuval Shaia
PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA device.
It works with its Linux Kernel driver AS IS, no need for any special
Hi Laszlo,
On 09/01/2018 14:51, Laszlo Ersek wrote:
On 01/08/18 22:50, Marcel Apfelbaum wrote:
When all the fw_cfg slots are used, a write is made outside the
bounds of the fw_cfg files array as part of the sort algorithm.
Fix it by avoiding an unnecessary array element move.
Fix also an
On 09/01/2018 15:36, Laszlo Ersek wrote:
On 01/09/18 14:35, Laszlo Ersek wrote:
On 01/09/18 14:33, Laszlo Ersek wrote:
On 01/09/18 14:18, Marcel Apfelbaum wrote:
On 09/01/2018 15:09, Laszlo Ersek wrote:
Hi Laszlo,
I'll respond first to this mail' I'll take my time with the
On 09/01/2018 15:09, Laszlo Ersek wrote:
Hi Laszlo,
I'll respond first to this mail' I'll take my time with the rest :)
On 01/08/18 22:50, Marcel Apfelbaum wrote:
When all the fw_cfg slots are used, a write is made outside the
bounds of the fw_cfg files array as part of the
On 09/01/2018 13:15, Marc-André Lureau wrote:
Hi
Hi Marc-André,
On Mon, Jan 8, 2018 at 10:50 PM, Marcel Apfelbaum wrote:
When all the fw_cfg slots are used, a write is made outside the
bounds of the fw_cfg files array as part of the sort algorithm.
Fix it by avoiding an unnecessary array
On 09/01/2018 11:17, Cornelia Huck wrote:
On Sun, 7 Jan 2018 14:32:22 +0200
Marcel Apfelbaum wrote:
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
Reviewed-by: Shamir Rabinovitch
---
docs/pvrdma.txt | 254
1 file
When all the fw_cfg slots are used, a write is made outside the
bounds of the fw_cfg files array as part of the sort algorithm.
Fix it by avoiding an unnecessary array element move.
Fix also an assert while at it.
Signed-off-by: Marcel Apfelbaum
---
hw/nvram/fw_cfg.c | 6 --
1 file changed
On 08/01/2018 18:05, Cornelia Huck wrote:
On Sun, 7 Jan 2018 14:32:21 +0200
Marcel Apfelbaum wrote:
Looking at the churn below...
Hi Cornelia,
Thanks for looking at the patch.
diff --git a/exec.c b/exec.c
index 4722e521d4..247f8bd0c0 100644
--- a/exec.c
+++ b/exec.c
@@ -1278,7 +1278,7
((__aligned__(4)));
+} QEMU_PACKED QEMU_ALIGNED(4);
static struct e820_table e820_reserve;
static struct e820_entry *e820_table;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 07/01/2018 15:47, Philippe Mathieu-Daudé wrote:
Hi Marcel,
Hi Philippe,
On 01/07/2018 09:32 AM, Marcel Apfelbaum wrote:
From: Yuval Shaia
This function should be declared in generic header file so we can
utilize it.
Signed-off-by: Yuval Shaia
Signed-off-by: Marcel Apfelbaum
hared_nomigrate.
There are no functional changes if the new flag is not used.
Signed-off-by: Marcel Apfelbaum
---
backends/hostmem-file.c | 25 +
backends/hostmem-ram.c | 4 ++--
backends/hostmem.c | 21 +
exec.c | 26 +
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
Reviewed-by: Shamir Rabinovitch
---
docs/pvrdma.txt | 254
1 file changed, 254 insertions(+)
create mode 100644 docs/pvrdma.txt
diff --git a/docs/pvrdma.txt b/docs/pvrdma.txt
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 73a735..256a284753 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1979,6 +1979,14 @@ F: block/replication.c
F: tests/test
From: Yuval Shaia
This function should be declared in generic header file so we can
utilize it.
Signed-off-by: Yuval Shaia
Signed-off-by: Marcel Apfelbaum
---
hw/pci/shpc.c | 13 ++---
include/qemu/host-utils.h | 10 ++
2 files changed, 12 insertions(+), 11
nce achieved with ConnectX HCAs and buffer size
bigger than 1MB which was the line rate ~ 50Gb/s.
The conclusion is that using the PVRDMA device there are no
actual performance penalties compared to bare metal for big enough
buffers (which is quite common when using RDMA), while allowing
memory overc
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 73a735..256a284753 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1979,6 +1979,14 @@ F: block/replication.c
F: tests/test
VRDMA device there are no
actual performance penalties compared to bare metal for big enough
buffers (which is quite common when using RDMA), while allowing
memory overcommit.
Marcel Apfelbaum (3):
mem: add share parameter to memory-backend-ram
docs: add pvrdma device documentation.
MAINTAINE
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
Reviewed-by: Shamir Rabinovitch
---
docs/pvrdma.txt | 254
1 file changed, 254 insertions(+)
create mode 100644 docs/pvrdma.txt
diff --git a/docs/pvrdma.txt b/docs/pvrdma.txt
hared_nomigrate.
There are no functional changes if the new flag is not used.
Signed-off-by: Marcel Apfelbaum
---
backends/hostmem-file.c | 25 +
backends/hostmem-ram.c | 4 ++--
backends/hostmem.c | 21 +
exec.c | 26 +
From: Yuval Shaia
This function should be declared in generic header file so we can
utilize it.
Signed-off-by: Yuval Shaia
Signed-off-by: Marcel Apfelbaum
---
hw/pci/shpc.c | 13 ++---
include/qemu/host-utils.h | 10 ++
2 files changed, 12 insertions(+), 11
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 73a735..256a284753 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1979,6 +1979,14 @@ F: block/replication.c
F: tests/test
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
Reviewed-by: Shamir Rabinovitch
---
docs/pvrdma.txt | 254
1 file changed, 254 insertions(+)
create mode 100644 docs/pvrdma.txt
diff --git a/docs/pvrdma.txt b/docs/pvrdma.txt
hared_nomigrate.
There are no functional changes if the new flag is not used.
Signed-off-by: Marcel Apfelbaum
---
backends/hostmem-file.c | 25 +
backends/hostmem-ram.c | 4 ++--
backends/hostmem.c | 21 +
exec.c | 26 +
From: Yuval Shaia
This function should be declared in generic header file so we can
utilize it.
Signed-off-by: Yuval Shaia
Signed-off-by: Marcel Apfelbaum
---
hw/pci/shpc.c | 13 ++---
include/qemu/host-utils.h | 10 ++
2 files changed, 12 insertions(+), 11
to bare metal for big enough
buffers (which is quite common when using RDMA), while allowing
memory overcommit.
Marcel Apfelbaum (3):
mem: add share parameter to memory-backend-ram
docs: add pvrdma device documentation.
MAINTAINERS: add entry for hw/rdma
Yuval Shaia (2):
pci/shpc: Move fu
On 29/12/2017 16:29, Hervé Poussineau wrote:
The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset.
Signed-off-by: Hervé Poussineau
---
hw/isa/piix4.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
On 29/12/2017 16:29, Hervé Poussineau wrote:
PIIX4 structure is now 's'
PCI device is now 'pci'
Please don't use 'pci'. Use pci_dev', the former is too wide,
Thanks,
Marcel
DeviceState is now 'dev'
Signed-off-by: Hervé Poussineau
---
hw/isa/piix4.c | 13 +++--
1 file changed, 7
On 29/12/2017 16:29, Hervé Poussineau wrote:
We are not required anymore to use rtc_init() function.
Signed-off-by: Hervé Poussineau
---
hw/timer/mc146818rtc.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
in
On 29/12/2017 16:29, Hervé Poussineau wrote:
We are now able to embed floppy controllers in another object.
Hi Hervé,
Are you sure we need to move all the struct definitions to the header file?
I looked at patch 11/16 and it seems only FDCtrlISABus definition is needed.
And also only the typ
Signed-off-by: Marcel Apfelbaum
---
Hi,
Getting CC-ed will help me be more responsive.
Thanks,
Marcel
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 73a735..0b319573c3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -845,6 +845,7 @@ X86
On 03/01/2018 15:41, Michael S. Tsirkin wrote:
On Wed, Jan 03, 2018 at 12:29:10PM +0200, Marcel Apfelbaum wrote:
diff --git a/hw/rdma/vmw/pvrdma_types.h b/hw/rdma/vmw/pvrdma_types.h
new file mode 100644
index 00..6cd2c81019
--- /dev/null
+++ b/hw/rdma/vmw/pvrdma_types.h
@@ -0,0 +1,38
On 03/01/2018 12:29, Marcel Apfelbaum wrote:
V2 -> V3:
- Addressed Michael S. Tsirkin and Philippe Mathieu-Daudé comments:
- Moved the device to hw/rdma
- Addressed Michael S. Tsirkin comments:
- Split the code into generic (hw/rdma) and VMWare
specific (hw/rdma/
best performance achieved with ConnectX HCAs and buffer size
bigger than 1MB which was the line rate ~ 50Gb/s.
The conclusion is that using the PVRDMA device there are no
actual performance penalties compared to bare metal for big enough
buffers (which is quite common when using RDMA), while allowing
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 73a735..256a284753 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1979,6 +1979,14 @@ F: block/replication.c
F: tests/test
From: Yuval Shaia
This function should be declared in generic header file so we can
utilize it.
Signed-off-by: Yuval Shaia
Signed-off-by: Marcel Apfelbaum
---
hw/pci/shpc.c | 13 ++---
include/qemu/host-utils.h | 10 ++
2 files changed, 12 insertions(+), 11
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
Reviewed-by: Shamir Rabinovitch
---
docs/pvrdma.txt | 145
1 file changed, 145 insertions(+)
create mode 100644 docs/pvrdma.txt
diff --git a/docs/pvrdma.txt b/docs/pvrdma.txt
hared_nomigrate.
There are no functional changes if the new flag is not used.
Signed-off-by: Marcel Apfelbaum
---
backends/hostmem-file.c | 25 +
backends/hostmem-ram.c | 4 ++--
backends/hostmem.c | 21 +
exec.c | 26 +
On 22/12/2017 0:30, Yuval Shaia wrote:
On Thu, Dec 21, 2017 at 10:46:35PM +0200, Michael S. Tsirkin wrote:
On Thu, Dec 21, 2017 at 05:59:38PM +0200, Marcel Apfelbaum wrote:
On 21/12/2017 16:22, Michael S. Tsirkin wrote:
On Thu, Dec 21, 2017 at 09:27:51AM +0200, Yuval Shaia wrote:
What
On 21/12/2017 17:08, Marcel Apfelbaum wrote:
On 21/12/2017 16:01, Michael S. Tsirkin wrote:
On Fri, Dec 08, 2017 at 09:09:06AM -0500, Marcel Apfelbaum wrote:
- Original Message -
From: "Ladi Prosek"
To: qemu-devel@nongnu.org
Cc: mar...@redhat.com, ge...@hostfiss
On 21/12/2017 16:22, Michael S. Tsirkin wrote:
On Thu, Dec 21, 2017 at 09:27:51AM +0200, Yuval Shaia wrote:
What happens if guest attempts to register all its memory?
Then we loose, is not different from bare metal, reg_mr will pin all the RAM.
We need to find a way to communicate to gues
On 21/12/2017 16:01, Michael S. Tsirkin wrote:
On Fri, Dec 08, 2017 at 09:09:06AM -0500, Marcel Apfelbaum wrote:
- Original Message -
From: "Ladi Prosek"
To: qemu-devel@nongnu.org
Cc: mar...@redhat.com, ge...@hostfission.com, m...@redhat.com, "alex williamson&
On 19/12/2017 20:05, Michael S. Tsirkin wrote:
On Sun, Dec 17, 2017 at 02:54:52PM +0200, Marcel Apfelbaum wrote:
RFC -> V2:
- Full implementation of the pvrdma device
- Backend is an ibdevice interface, no need for the KDBR module
General description
===
PVRDMA is the Q
On 20/12/2017 6:08, Michael S. Tsirkin wrote:
On Tue, Dec 19, 2017 at 04:13:18PM -0300, Philippe Mathieu-Daudé wrote:
Hi Marcel, Yuval,
On Sun, Dec 17, 2017 at 9:54 AM, Marcel Apfelbaum wrote:
From: Yuval Shaia
PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA devic
On 19/12/2017 19:47, Michael S. Tsirkin wrote:
On Sun, Dec 17, 2017 at 02:54:55PM +0200, Marcel Apfelbaum wrote:
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
docs/pvrdma.txt | 145
1 file changed, 145 insertions
On 19/12/2017 18:12, Michael S. Tsirkin wrote:
On Sun, Dec 17, 2017 at 02:54:56PM +0200, Marcel Apfelbaum wrote:
@@ -2847,15 +2847,16 @@ if test "$rdma" != "no" ; then
#include
int main(void) { return 0; }
EOF
- rdma_libs="-lrdmacm -libverbs"
+ rdma_lib
CIE_DEVICE },
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 8d02a0a383..a27be85111 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -236,9 +236,6 @@ typedef struct PCIDeviceClass {
*/
int is_bridge;
-/* pcie stuff */
-int is_express; /* is this device pci express? */
-
/* rom bar */
const char *romfile;
} PCIDeviceClass;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
_root_init;
+k->realize = xilinx_pcie_root_realize;
k->exit = pci_bridge_exitfn;
dc->reset = pci_bridge_reset;
k->config_read = xilinx_pcie_root_config_read;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
*klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
-k->init = igd_pt_i440fx_initfn;
+ k->realize = igd_pt_i440fx_realize;
dc->desc = "IGD Passthrough Host bridge";
}
>
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 17/12/2017 22:49, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/xilinx-pcie.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 7659253090..756db39fd5 10
pc->realize = pci_default_realize;
}
static void pci_device_class_base_init(ObjectClass *klass, void *data)
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
Hi Philippe,
Thanks for the patch.
On 17/12/2017 22:49, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-host/piix.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
in
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ffd77b461c..d24401a4d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1960,6 +1960,13 @@ F: block/replication.c
F: tests/test
le allowing
memory overcommit.
Marcel Apfelbaum (3):
mem: add share parameter to memory-backend-ram
docs: add pvrdma device documentation.
MAINTAINERS: add entry for hw/net/pvrdma
Yuval Shaia (2):
pci/shpc: Move function to generic header file
pvrdma: initial implementa
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Yuval Shaia
---
docs/pvrdma.txt | 145
1 file changed, 145 insertions(+)
create mode 100644 docs/pvrdma.txt
diff --git a/docs/pvrdma.txt b/docs/pvrdma.txt
new file mode 100644
index
From: Yuval Shaia
This function should be declared in generic header file so we can
utilize it.
Signed-off-by: Yuval Shaia
Signed-off-by: Marcel Apfelbaum
---
hw/pci/shpc.c | 11 +--
include/qemu/cutils.h | 10 ++
2 files changed, 11 insertions(+), 10 deletions
hared_nomigrate.
There are no functional changes if the new flag is not used.
Signed-off-by: Marcel Apfelbaum
---
backends/hostmem-file.c | 25 +
backends/hostmem-ram.c | 4 ++--
backends/hostmem.c | 21 +
exec.c | 26 +
static const TypeInfo vfio_pci_dev_info = {
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 8d02a0a383..a27be85111 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -236,9 +236,6 @@ typedef struct PCIDeviceClass {
*/
int is_bridge;
-/* pcie stuff */
-int is_express; /* is this device pci express? */
-
/* rom bar */
const char *romfile;
} PCIDeviceClass;
No changes in the code, my review stands.
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
NTRY_SIZE);
> memset(dev->msix_pba, 0, QEMU_ALIGN_UP(dev->msix_entries_nr, 64) / 8);
> -msix_mask_all(dev, dev->msix_entries_nr);
> +dev->msix_function_masked = true;
> }
>
> /* PCI spec suggests that devices make it possible for software to configure
> --
> 2.13.6
>
>
Thanks Ladi!
Reviewed-by: Marcel Apfelbaum
/pci/pci.h
@@ -236,9 +236,6 @@ typedef struct PCIDeviceClass {
*/
int is_bridge;
-/* pcie stuff */
-int is_express; /* is this device pci express? */
-
/* rom bar */
const char *romfile;
} PCIDeviceClass;
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 04/12/2017 21:46, Philippe Mathieu-Daudé wrote:
Hi Yoni, Eduardo, Markus,
On 12/04/2017 07:18 AM, Yoni Bettan wrote:
* according to Eduardo Habkost's commit
fd3b02c8896d597dd8b9e053dec579cf0386aee1
* since all PCIEs now implement INTERFACE_PCIE_DEVICE we
Hi Yoni,
Thanks for the patch.
On 04/12/2017 12:18, Yoni Bettan wrote:
* according to Eduardo Habkost's commit
fd3b02c8896d597dd8b9e053dec579cf0386aee1
* since all PCIEs now implement INTERFACE_PCIE_DEVICE we
don't need this field anymore
* Dev
On 30/11/2017 6:02, David Gibson wrote:
On Wed, Nov 29, 2017 at 12:38:00PM +0200, Marcel Apfelbaum wrote:
On 29/11/2017 10:46, David Gibson wrote:
include/hw/pci/pci_bus.h is now very small and can only safely be included
after hw/pci/pci.h. So, just fold it into pci.h.
I don't ge
On 29/11/2017 13:41, Eduardo Habkost wrote:
On Wed, Nov 29, 2017 at 12:54:04PM +0200, Marcel Apfelbaum wrote:
On 29/11/2017 10:46, David Gibson wrote:
The bus pointer in PCIDevice is basically redundant with QOM information.
It's always initialized to the qdev_get_parent_bus(), the
On 29/11/2017 15:12, David Gibson wrote:
On Wed, Nov 29, 2017 at 12:45:28PM +0200, Marcel Apfelbaum wrote:
On 29/11/2017 10:46, David Gibson wrote:
pci_bus_is_root() currently relies on a method in the PCIBusClass.
But it's always known if a PCI bus is a root bus when we create it, so
us
*pci_device_root_bus(const PCIDevice *d);
const char *pci_root_bus_path(PCIDevice *dev);
PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn);
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 29/11/2017 10:46, David Gibson wrote:
The bus pointer in PCIDevice is basically redundant with QOM information.
It's always initialized to the qdev_get_parent_bus(), the only difference
is the type.
Therefore this patch eliminates the field, instead creating a pci_get_bus()
helper to do the t
PCI_SLOT(pci_dev->devfn),
PCI_FUNC(pci_dev->devfn));
xendevicemodel_unmap_pcidev_from_ioreq_server(xen_dmod, dom, ioservid, 0,
- pci_bus_num(pci_dev->bus),
+ pci_dev_bus_num(pci_dev),
PCI_SLOT(pci_dev->devfn),
PCI_FUNC(pci_dev->devfn));
}
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
On 29/11/2017 10:46, David Gibson wrote:
pci_bus_is_root() currently relies on a method in the PCIBusClass.
But it's always known if a PCI bus is a root bus when we create it, so
using a dynamic method is overkill.
This replaces it with an IS_ROOT bit in a new flags field, which is set on
root b
On 29/11/2017 10:46, David Gibson wrote:
include/hw/pci/pci_bus.h is now very small and can only safely be included
after hw/pci/pci.h. So, just fold it into pci.h.
I don't get the benefit from merging the header files.
I would go the other way around and find stuff specific
to pci_bus and ad
ions as its address spaces.
- * The regions are as large as the entire address space -
- * they don't take into account any windows.
- */
-MemoryRegion address_space_mem;
-MemoryRegion address_space_io;
-
-PCIBridgeWindows *windows;
-
-pci_map_irq_fn map_irq;
-const char *bus_name;
-};
-
#endif /* QEMU_PCI_BUS_H */
Reviewed-by: Marcel Apfelbaum
Thanks,
Marcel
ridge - are instead
created with a direct qbus_create_inplace() (see pci_bridge_initfn()).
This patch renames the functions to make it clear they're only used for
a root bus.
Agreed.
pci_bus_init calls pci_host_bus_register so is a root bus for sure.
Reviewed-by: Marcel Apfelbaum
Than
only for the type, maybe we should have a header only
with the type names, anyway out of the scope of this series.
Another question, what about I440FX?
I think the AMD vIOMMU can theoretically work with the
conventional PCI machines, I am not sure if it was tested
or intended to work with it.
keep exactly the same behavior as before, the existing
has_dynamic_sysbus=true assignments are replaced with a
TYPE_SYS_BUS_DEVICE entry on the allowed list. Other patches
will replace the TYPE_SYS_BUS_DEVICE entries with more specific
lists of devices.
Cc: Peter Maydell
Cc: Marcel Apfelbaum
Cc
On 22/11/2017 14:32, Ladi Prosek wrote:
On Wed, Nov 22, 2017 at 11:46 AM, Marcel Apfelbaum wrote:
Hi Ladi,
On 20/11/2017 16:22, Ladi Prosek wrote:
msix_mask_all() is supposed to invoke the release vector notifier if the
state of the
respective vector changed from unmasked or masked.
You
Hi Ladi,
On 20/11/2017 16:22, Ladi Prosek wrote:
msix_mask_all() is supposed to invoke the release vector notifier if the state
of the
respective vector changed from unmasked or masked.
You mean from unmasked "to" masked right?
The way it's currently called from
msix_reset(), though, may r
On 15/11/2017 4:16, Michael S. Tsirkin wrote:
On Mon, Nov 13, 2017 at 03:07:45PM +0200, Marcel Apfelbaum wrote:
On 11/11/2017 17:25, Marcel Apfelbaum wrote:
Currently there is no MMIO range over 4G
reserved for PCI hotplug. Since the 32bit PCI hole
depends on the number of cold-plugged PCI
On 11/11/2017 17:25, Marcel Apfelbaum wrote:
Currently there is no MMIO range over 4G
reserved for PCI hotplug. Since the 32bit PCI hole
depends on the number of cold-plugged PCI devices
and other factors, it is very possible is too small
to hotplug PCI devices with large BARs.
Fix it by
e reserved for 64bit PCI hotplug.
Reviewed-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Signed-off-by: Marcel Apfelbaum
---
V4 -> V5:
- Renamed a local variable (Laszlo)
- Added a comment to q35 props (Eduardo)
V3 -> V4:
- Addressed Laszlo's comments:
- Added defines for pc
On 10/11/2017 11:26, Laszlo Ersek wrote:
Hi Marcel,
On 11/09/17 18:27, Marcel Apfelbaum wrote:
Currently there is no MMIO range over 4G
reserved for PCI hotplug. Since the 32bit PCI hole
depends on the number of cold-plugged PCI devices
and other factors, it is very possible is too small
to
e reserved for 64bit PCI hotplug.
Reviewed-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Signed-off-by: Marcel Apfelbaum
---
V3 -> V4:
- Addressed Laszlo's comments:
- Added defines for pci-hole64 default size props.
- Rounded the hole64_end to 1G
- Moved some info
The PCIE-PCI bridge is specific to "pure" PCIe systems
(on QEMU we have X86 and ARM), it does not make sense to
have it in other archs.
Reported-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
V4 -> V5
- Since all other tries failed, conditioned the
device on the PCIe R
On 09/11/2017 16:37, Fam Zheng wrote:
On Thu, 11/09 16:08, Marcel Apfelbaum wrote:
make[1]: *** No rule to make target `../hw/pci-bridge/pcie_pci_bridge.o',
needed by `qemu-system-aarch64'. Stop.
make[1]: *** Waiting for unfinished
jobs/tmp/qemu-test/src/target/arm/translate
On 09/11/2017 16:29, Philippe Mathieu-Daudé wrote:
Hi Marcel,
On 11/09/2017 11:10 AM, Marcel Apfelbaum wrote:
On 09/11/2017 16:03, Thomas Huth wrote:
On 09.11.2017 14:04, no-re...@patchew.org wrote:
Hi,
This series failed automatic build test. Please find the testing
commands and
their
On 09/11/2017 13:02, Laszlo Ersek wrote:
On 11/08/17 15:48, Marcel Apfelbaum wrote:
Currently there is no MMIO range over 4G
reserved for PCI hotplug. Since the 32bit PCI hole
depends on the number of cold-plugged PCI devices
and other factors, it is very possible is too small
to hotplug PCI
On 09/11/2017 16:03, Thomas Huth wrote:
On 09.11.2017 14:04, no-re...@patchew.org wrote:
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
[...]
CC aarch64-softmmu/
On 09/11/2017 15:04, no-re...@patchew.org wrote:
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCH V4] hw/pcie-pci-bridge: restrict to X86 and AR
The PCIE-PCI bridge is specific to "pure" PCIe systems
(on QEMU we have X86 and ARM), it does not make sense to
have it in other archs.
Reported-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
V3 -> V4:
- Move the config line to pci.mak (Thomas)
V2 -> V3:
- Another tw
On 09/11/2017 14:46, Thomas Huth wrote:
On 09.11.2017 13:43, Marcel Apfelbaum wrote:
The PCIE-PCI bridge is specific to "pure" PCIe systems
(on QEMU we have X86 and ARM), it does not make sense to
have if in other archs.
Reported-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
The PCIE-PCI bridge is specific to "pure" PCIe systems
(on QEMU we have X86 and ARM), it does not make sense to
have it in other archs.
Reported-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
V2 -> V3:
- Another tweak in subject s/if/it (Cornelia)
V1 -> V2:
Addr
The PCIE-PCI bridge is specific to "pure" PCIe systems
(on QEMU we have X86 and ARM), it does not make sense to
have if in other archs.
Reported-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
V1 -> V2:
Addressed Thomas and Cornelia comments:
- Conditioned the pcie-pci-bridg
On 08/11/2017 18:52, Thomas Huth wrote:
On 08.11.2017 16:20, Marcel Apfelbaum wrote:
The PCIE-PCI bridge is specific to "pure" PCI systems
Hi Thomas,
s/PCI/PCIe/ ?
In this context maybe it doesn't really matter,
but if I'll send a v2 I'll make the change, sur
The PCIE-PCI bridge is specific to "pure" PCI systems
(on QEMU we have X86 and ARM), it does not make sense to
have if in other archs.
Reported-by: Thomas Huth
Signed-off-by: Marcel Apfelbaum
---
default-configs/arm-softmmu.mak| 1 +
default-configs/i386-softmmu.mak | 1
with older Win32 Guest OSes
and 32G for Q35 chipset.
Note this is a regression since prev QEMU versions had
some range reserved for 64bit PCI hotplug.
Signed-off-by: Marcel Apfelbaum
---
V2 -> V3:
- Addressed Gerd's and others comments and re-enabled the pci-hole64-size
property defau
5?:
Yes, as long as we check all sysbus devices that can't be created
with '-device' have their "cannot_be_insta...yet" flag set.
If Eduardo's series achieves the above is OK.
Thanks,
Marcel
commit bf8d492405feaee2c1685b3b9d5e03228ed3e47f
Author: Marcel Apfelbaum
On 02/11/2017 16:19, Thomas Huth wrote:
Hi,
Hi Thomas,
seems like there's a new way to crash QEMU with the pcie-pci-bridge
device (using QEMU master branch of today):
> $ s390x-softmmu/qemu-system-s390x -nographic -S
QEMU 2.10.50 monitor - type 'help' for more information
(qemu) device_ad
On 23/10/2017 12:16, Gerd Hoffmann wrote:
On Mon, 2017-10-23 at 11:46 +0300, Marcel Apfelbaum wrote:
On 23/10/2017 8:45, Gerd Hoffmann wrote:
Hi,
The guest will still run with 40 bits physical!
(judging the code anyway, I hope I am wrong)
Then, the stakes are not so big, the Guest
On 23/10/2017 8:45, Gerd Hoffmann wrote:
Hi,
The guest will still run with 40 bits physical!
(judging the code anyway, I hope I am wrong)
Then, the stakes are not so big, the Guest kernel will disregard
the 64bit hole since is not CPU addressable and go on.
But then there is no working 64
On 20/10/2017 13:59, Gerd Hoffmann wrote:
On Fri, 2017-10-20 at 11:32 +0200, Laszlo Ersek wrote:
On 10/20/17 08:55, Gerd Hoffmann wrote:
Hi,
commit message says:
It turns out that some 32 bit windows guests crash
if 64 bit PCI hole size is >2G.
Why this suddenly isn't a pro
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