Re: [PATCH] m25p80: Add the is25wp256 SFPD table

Am 2023-01-02 19:49, schrieb Guenter Roeck: On Mon, Jan 02, 2023 at 06:42:03PM +0100, Michael Walle wrote: Am 2023-01-02 17:23, schrieb Guenter Roeck: > On Mon, Jan 02, 2023 at 04:43:49PM +0100, Michael Walle wrote: > > Am 2023-01-02 14:53, schrieb Cédric Le Goater: > > >

Re: [PATCH] m25p80: Add the is25wp256 SFPD table

Am 2023-01-02 17:23, schrieb Guenter Roeck: On Mon, Jan 02, 2023 at 04:43:49PM +0100, Michael Walle wrote: Am 2023-01-02 14:53, schrieb Cédric Le Goater: > On 12/27/22 07:31, Tudor Ambarus wrote: > > > > > > On 25.12.2022 14:18, Ben Dooks wrote: > > > On Wed, De

Re: [PATCH] m25p80: Add the is25wp256 SFPD table

and then padding with 0xff to fill out a power-of-2: xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp Cc: Michael Walle Cc: Tudor Ambarus Signed-off-by: Guenter Roeck Reviewed-by: Cédric Le Goater If SFDP is a standard, couldn't we have an function to generate it from the flash parameters

Re: [PATCH v3 4/8] m25p80: Add the mx25l25635f SFPD table

Am 2022-10-10 08:23, schrieb Cédric Le Goater: On 10/7/22 16:44, Francisco Iglesias wrote: --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -234,6 +234,8 @@ static const FlashPartInfo known_devices[] = { { INFO("mx25l12855e", 0xc22618, 0, 64 << 10, 256, 0) }, {

Re: [PATCH] hw/block: m25p80: Add support for w25q01jvq

Am 2022-03-04 20:30, schrieb Philippe Mathieu-Daudé: On 4/3/22 19:09, Patrick Williams wrote: The w25q01jvq is a 128MB part. Support is being added to the kernel[1] and the two have been tested together. 1. https://lore.kernel.org/lkml/2022022209.23108-1-potin@quantatw.com/

Re: [PATCH 00/16] fdt: Make OF_BOARD a boolean option

Hi, > On Thu, 28 Oct 2021 at 05:51, Simon Glass wrote: > > On Tue, 26 Oct 2021 at 00:46, Ilias Apalodimas > > wrote: .. > > Linux actually doesn't care if the U-Boot properties are in the tree, > > so long as we have proper bindings. My point here is we only need > > either: > > > > a. one

Re: [PATCH 1/2] Drop the deprecated lm32 target

Am 2021-05-03 10:40, schrieb Markus Armbruster: Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale. Some of its code lives on in device models derived from milkymist ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c. yaay ;) Cc: Michael Walle Signed-off

Re: Deprecation of the LM32 target

Hi, Am 2020-12-26 10:06, schrieb John Paul Adrian Glaubitz: Hello! On 12/26/20 9:39 AM, Thomas Huth wrote: the problem is not that the target CPU is old, but rather that according to the (former?) maintainer, there are no users left:

Re: [PATCH] Deprecate lm32 port

Am 27. August 2020 13:32:59 MESZ schrieb Peter Maydell : >Deprecate our lm32 target support. Michael Walle (former lm32 >maintainer) >suggested that we do this in 2019: > https://www.mail-archive.com/qemu-devel@nongnu.org/msg605024.html >because the only public user of t

Re: [PATCH-for-5.1] hw/misc/milkymist-pfpu: Fix pFPU region size

aybe (MICROCODE_WORDS * 2)? With that fixed: Reviewed-by: Michael Walle -michael sysbus_init_mmio(sbd, >regs_region); }

Re: [PATCH 2/4] hw/lm32/milkymist: Comment to remember some IRQs lines are left unwired

Am 2020-07-07 18:30, schrieb Peter Maydell: On Sun, 5 Jul 2020 at 22:10, Philippe Mathieu-Daudé wrote: The 'card is readonly' and 'card inserted' IRQs are not wired. Add a comment in case someone know where to wire them. Signed-off-by: Philippe Mathieu-Daudé --- hw/lm32/milkymist.c | 1 +

Re: [PATCH] MAINTAINERS: Mark the LatticeMico32 target as orphan

Am 2020-03-16 13:26, schrieb Philippe Mathieu-Daudé: Michael Walle expressed his desire to orphan the lm32 target [*]: I guess it is time to pull the plug. Mainly, because I have no time for this anymore. I've always worked on this on my spare time and life changed. And secondly, I guess

Re: [PATCH] MAINTAINERS: Mark the LatticeMico32 target as orphan

Hi, Am 2020-03-16 13:26, schrieb Philippe Mathieu-Daudé: Michael Walle expressed his desire to orphan the lm32 target [*]: I guess it is time to pull the plug. Mainly, because I have no time for this anymore. I've always worked on this on my spare time and life changed. And secondly, I

Re: [Qemu-devel] Maintainers, please tell us how to boot your machines!

[resend because my mobile client messed up the message and gmail rejected it] Am 2019-03-18 09:15, schrieb Markus Armbruster: Michael Walle writes: Am 2019-03-12 18:36, schrieb Markus Armbruster: = hw/lm32/lm32_boards.c = Michael Walle (maintainer:LM32) = hw/lm32/milkymist.c

Re: [Qemu-devel] Maintainers, please tell us how to boot your machines!

Am 2019-03-12 18:36, schrieb Markus Armbruster: = hw/lm32/lm32_boards.c = Michael Walle (maintainer:LM32) = hw/lm32/milkymist.c = Michael Walle (maintainer:milkymist) Hi folks, I guess it is time to pull the plug. Mainly, because I have no time for this anymore. I've

Re: [Qemu-devel] [RFC PATCH 2/3] tests/tcg: also pass AS and LD variables

Am 1. Februar 2019 18:31:46 MEZ schrieb "Alex Bennée" : > >Michael Walle writes: > >> The lm32 architecture doesn't need the complete compiler. In fact, >only >> the building of GCC is skipped to make building the docker image >faster. >> >> S

[Qemu-devel] [RFC PATCH 0/3] lm32: convert to new common tcg infrastructure

with the native host cross toolchain - unless we'll probe for the assembler and linker, too. Any ideas? Michael Walle (3): tests/docker: add debian-lm32-cross image tests/tcg: also pass AS and LD variables tests/tcg/lm32: enable system tests tests/docker/Makefile.include | 5

[Qemu-devel] [RFC PATCH 2/3] tests/tcg: also pass AS and LD variables

The lm32 architecture doesn't need the complete compiler. In fact, only the building of GCC is skipped to make building the docker image faster. Signed-off-by: Michael Walle --- tests/tcg/Makefile.include | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/tests

[Qemu-devel] [RFC PATCH 3/3] tests/tcg/lm32: enable system tests

Convert the existing to the new common cross build infrastructure. Signed-off-by: Michael Walle --- tests/tcg/lm32/Makefile| 106 - tests/tcg/lm32/Makefile.include| 8 +++ tests/tcg/lm32/Makefile.softmmu-target | 33 ++ 3 files

[Qemu-devel] [RFC PATCH 1/3] tests/docker: add debian-lm32-cross image

Unfortunately, there is no debian package for the lm32 toolchain. To keep the build times short, only build the binutils from scratch. Signed-off-by: Michael Walle --- tests/docker/Makefile.include | 5 ++-- tests/docker/dockerfiles/debian-lm32-cross.docker | 31

Re: [Qemu-devel] [PATCH 2/3] qtest: new functions for pulsed IRQs

Am 2018-10-31 11:19, schrieb Paolo Bonzini: On 18/07/2018 12:48, Michael Walle wrote: /** + * get_irq_latched: + * @num: Interrupt to observe. + * + * Returns: The latched level of the @num interrupt. + */ +static inline bool get_irq_latched(int num) +{ +return qtest_get_irq_latched

Re: [Qemu-devel] [PATCH 2/3] qtest: new functions for pulsed IRQs

Am 2018-07-18 12:48, schrieb Michael Walle: It is only possible to retrieve the current state of an interrupt line. But there are devices which just pulses the interrupt line. Introduce a latch which is set by qtest and which can be cleared by the test case. Signed-off-by: Michael Walle Cc

Re: [Qemu-devel] [PATCH for-3.1] milkymist: Check for failure trying to load BIOS image

Am 2018-10-30 18:00, schrieb Peter Maydell: Check the return value from load_image_targphys(), which tells us whether our attempt to load the BIOS image into RAM failed. (Spotted by Coverity, CID 1190305.) Signed-off-by: Peter Maydell Acked-by: Michael Walle Will you put it in your queue

Re: [Qemu-devel] [PATCH v2 05/11] net: milkymist_minimac2: convert SysBus init method to a realize method

Am 2018-10-01 08:37, schrieb Cédric Le Goater: Cc: Michael Walle Signed-off-by: Cédric Le Goater Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/net/milkymist-minimac2.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/net/milkymist

Re: [Qemu-devel] [PATCH 15/35] target/lm32: access cpu->interrupt_request with atomics

Am 2018-09-17 18:30, schrieb Emilio G. Cota: From: Paolo Bonzini Cc: Michael Walle Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota --- target/lm32/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index b7499cb627

[Qemu-devel] [PATCH 3/3] milkymist-pfpu: add qtests

Add initial tests which check basic computations and error cases on the PFPU. Signed-off-by: Michael Walle --- MAINTAINERS | 1 + hw/lm32/lm32.h | 2 + tests/Makefile.include | 4 + tests/milkymist-pfpu-test.c | 193

[Qemu-devel] [PATCH 2/3] qtest: new functions for pulsed IRQs

It is only possible to retrieve the current state of an interrupt line. But there are devices which just pulses the interrupt line. Introduce a latch which is set by qtest and which can be cleared by the test case. Signed-off-by: Michael Walle Cc: Paolo Bonzini Cc: Andreas Färber --- tests

[Qemu-devel] [PATCH 1/3] milkymist-pfpu: more accurate emulation

Emulate write collisions, stray writes and microcode which has no VECTOUT opcode. Although the latter was supported before, the emulation was incorrect. Signed-off-by: Michael Walle --- hw/misc/milkymist-pfpu.c | 105 +-- 1 file changed, 75 insertions

Re: [Qemu-devel] [PATCH v2] milkymist-minimac2: Use qemu_log_mask(GUEST_ERROR) instead of error_report

Acked-by: Michael Walle Will this go through the qemu-trivial queue? -michael

Re: [Qemu-devel] [PULL 0/1] target/lm32 BQL patch

Am 2018-05-22 12:01, schrieb Peter Maydell: On 21 May 2018 at 16:49, Michael Walle <mich...@walle.cc> wrote: The following changes since commit 81e9cbd0ca1131012b058df6804b1f626a6b730c: lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200) are available in t

[Qemu-devel] [PULL 1/1] lm32: take BQL before writing IP/IM register

Writing to these registers may raise an interrupt request. Actually, this prevents the milkymist board from starting. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> Tested-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alex Bennée <alex.be

[Qemu-devel] [PULL 0/1] target/lm32 BQL patch

to 81e9cbd0ca1131012b058df6804b1f626a6b730c: lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200) Michael Walle (1): lm32: take BQL before writing IP/IM register target/lm32/op_helper.c | 4 1 file changed, 4

Re: [Qemu-devel] [PATCH v2 2/2] target/lm32: hold BQL in gdbstub

Am 2018-05-21 14:25, schrieb Peter Maydell: On 21 May 2018 at 13:21, Michael Walle <mich...@walle.cc> wrote: Changing the IP/IM registers may cause interrupts, so hold the BQL. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> --- target/lm32/gdbstub.c

Re: [Qemu-devel] [PATCH v2 13/14] sdcard: Add a "validate-crc" property

: "Code block is unreachable because of the syntactic structure of the code (CWE-561)" and fixes the following issue: - CID1005332 (hw/sd/sd.c::sd_req_crc_validate) Structurally dead code Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Tested-by: Michael Walle &

[Qemu-devel] [PATCH v2 0/2] BQL patches for the lm32 target

Whoops, forget the include patch chunk for the second patch. I'll send a pull request next week if there are no comments on the patches. since v1: add missing #include Michael Walle (2): lm32: take BQL before writing IP/IM register target/lm32: hold BQL in gdbstub target/lm32/gdbstub.c

[Qemu-devel] [PATCH v2 2/2] target/lm32: hold BQL in gdbstub

Changing the IP/IM registers may cause interrupts, so hold the BQL. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> --- target/lm32/gdbstub.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c index cf92

[Qemu-devel] [PATCH v2 1/2] lm32: take BQL before writing IP/IM register

Writing to these registers may raise an interrupt request. Actually, this prevents the milkymist board from starting. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> Tested-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alex Bennée <alex.be

[Qemu-devel] [PATCH 1/2] lm32: take BQL before writing IP/IM register

Writing to these registers may raise an interrupt request. Actually, this prevents the milkymist board from starting. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> Tested-by: Philippe Mathieu-Daudé <f4...@amsat.org> Reviewed-by: Alex Bennée <alex.be

[Qemu-devel] [PATCH 0/2] BQL patches for the lm32 target

I'll send a pull request next week if there are no comments on the patches. Michael Walle (2): lm32: take BQL before writing IP/IM register target/lm32: hold BQL in gdbstub target/lm32/gdbstub.c | 4 target/lm32/op_helper.c | 4 2 files changed, 8 insertions(+) -- 2.11.0

[Qemu-devel] [PATCH 2/2] target/lm32: hold BQL in gdbstub

Changing the IP/IM registers may cause interrupts, so hold the BQL. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> --- target/lm32/gdbstub.c | 4 1 file changed, 4 insertions(+) diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c index cf92

Re: [Qemu-devel] lm32: tcg_handle_interrupt: assertion failed: (qemu_mutex_iothread_locked())

Hi, Am 2018-05-09 13:51, schrieb Paolo Bonzini: On 08/05/2018 03:49, Philippe Mathieu-Daudé wrote: #2 0x7fe17d5eefa5 in g_assertion_message () at /usr/lib/x86_64-linux-gnu/libglib-2.0.so.0 #3 0x7fe17d5ef00a in g_assertion_message_expr () at /usr/lib/x86_64-linux-gnu/libglib-2.0.so.0

Re: [Qemu-devel] [PATCH v3 27/41] hw/lm32: Use the BYTE-based definitions

Am 2018-04-16 01:42, schrieb Philippe Mathieu-Daudé: It eases code review, unit is explicit. Patch generated using: $ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/ and modified manually. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>

Re: [Qemu-devel] [PATCH 03/10] target/lm32: avoid integer overflow in next_page PC check

Am 2018-04-10 18:19, schrieb Emilio G. Cota: If the PC is in the last page of the address space, next_page_start overflows to 0. Fix it. Cc: Michael Walle <mich...@walle.cc> Signed-off-by: Emilio G. Cota <c...@braap.org> Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] [PATCH] lm32: take BQL before writing IP/IM register

Hi Peter, do you apply this patch? Or do I have to send a pull request? -michael Am 2018-01-09 18:01, schrieb Michael Walle: Writing to these registers may raise an interrupt request. Actually, this prevents the milkymist board from starting. Cc: qemu-sta...@nongnu.org Signed-off

Re: [Qemu-devel] [PATCH v2 2/6] hw/sd/milkymist-memcard: split realize() out of SysBusDevice init()

Am 2018-01-23 04:58, schrieb Philippe Mathieu-Daudé: Create the SDCard in the realize() function. Suggested-by: Michael Walle <mich...@walle.cc> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Michael Walle <mich...@walle.cc> --- hw/sd/milkym

Re: [Qemu-devel] [PATCH v2 3/6] hw/sd/milkymist-memcard: expose a SDBus and connect the SDCard to it

Am 2018-01-23 04:58, schrieb Philippe Mathieu-Daudé: using the sdbus_*() API. Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Michael Walle <mich...@walle.cc> --- hw/sd/milkymist-memcard.c | 38 +- 1 file changed, 21 inser

Re: [Qemu-devel] [PATCH v2 1/6] hw/sd/milkymist-memcard: use qemu_log_mask()

Am 2018-01-23 04:58, schrieb Philippe Mathieu-Daudé: Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Michael Walle <mich...@walle.cc> --- hw/sd/milkymist-memcard.c | 17 ++--- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/hw/

Re: [Qemu-devel] [PATCH 2/6] hw/sd/milkymist-memcard: split realize() out of SysBusDevice init()

Hi Philippe, Am 2018-01-09 19:16, schrieb Philippe Mathieu-Daudé: Hi Michael, Am 2018-01-03 17:23, schrieb Philippe Mathieu-Daudé: Create the SDCard in the realize() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/milkymist-memcard.c | 24

[Qemu-devel] [PATCH] lm32: take BQL before writing IP/IM register

Writing to these registers may raise an interrupt request. Actually, this prevents the milkymist board from starting. Cc: qemu-sta...@nongnu.org Signed-off-by: Michael Walle <mich...@walle.cc> --- target/lm32/op_helper.c | 4 1 file changed, 4 insertions(+) diff --git a/targe

Re: [Qemu-devel] New documentation for the LatticeMicro32 target

Am 2018-01-09 12:58, schrieb Peter Maydell: I just fell over this, it looks like this fix never made it into master. Michael, could you submit this as a full patch with a commit message and signed-off-by, please? cc: qemu-sta...@nongnu.org as well, since it fixes a "breaks the board

Re: [Qemu-devel] [PATCH 2/6] hw/sd/milkymist-memcard: split realize() out of SysBusDevice init()

Hey Philippe, Am 2018-01-03 17:23, schrieb Philippe Mathieu-Daudé: Create the SDCard in the realize() function. Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/milkymist-memcard.c | 24 +++- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git

Re: [Qemu-devel] [PATCH v5 13/29] hw/lm32: Replace fprintf(stderr, "*\n" with error_report()

rr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N; {s|fprintf(stderr, "\(.*\)\\n&q

Re: [Qemu-devel] [PATCH 07/38] lm32: milkymist: use generic cpu_model parsing

Am 2017-10-02 11:07, schrieb Igor Mammedov: Signed-off-by: Igor Mammedov <imamm...@redhat.com> --- CC: mich...@walle.cc --- hw/lm32/milkymist.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] [PATCH 08/38] lm32: lm32_boards: use generic cpu_model parsing

Am 2017-10-02 11:07, schrieb Igor Mammedov: Signed-off-by: Igor Mammedov <imamm...@redhat.com> --- CC: mich...@walle.cc --- hw/lm32/lm32_boards.c | 14 -- 1 file changed, 4 insertions(+), 10 deletions(-) Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] [PATCH 06/38] lm32: cleanup cpu type name composition

target/lm32/cpu.h | 3 +++ target/lm32/cpu.c | 74 +-- 2 files changed, 25 insertions(+), 52 deletions(-) Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] New documentation for the LatticeMicro32 target

Am 2017-07-17 17:18, schrieb Programmingkid: On Jul 17, 2017, at 10:56 AM, Programmingkid <programmingk...@gmail.com> wrote: On Jul 17, 2017, at 1:40 AM, Michael Walle <mich...@walle.cc> wrote: Am 2017-07-09 17:39, schrieb Programmingkid: I just made a docume

Re: [Qemu-devel] [PATCH 16/29] lm32: use QEMU_IS_ALIGNED macro

Am 2017-07-18 08:09, schrieb Philippe Mathieu-Daudé: Applied using the Coccinelle semantic patch scripts/coccinelle/use_osdep.cocci Signed-off-by: Philippe Mathieu-Daudé QEMU_IS_ALIGNED() sounds like it is used to check if a memory access is aligned. Although it does the

Re: [Qemu-devel] New documentation for the LatticeMicro32 target

Am 2017-07-09 17:39, schrieb Programmingkid: I just made a documentation page for the LatticeMicro32 target. I need to know its current status, how much of this system is implemented, what software runs on it. If anyone could supply more information that would be appreciated. Pictures of this

Re: [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() with cpu_generic_init()

Am 2017-07-14 15:52, schrieb Igor Mammedov: it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov <imamm...@redhat.com> Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] [Qemu-trivial] [PATCH] lm32: milkymist-tmu2: fix a third integer overflow

, in a similar way, and is the final third of the fix for coverity CID 1167561 (hopefully!). Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> Acked-by: Michael Walle <mich...@walle.cc> --- Third time

Re: [Qemu-devel] [PATCH] lm32: milkymist-tmu2: fix another integer overflow

way, and is the other half of the fix for >coverity CID 1167561. > >Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> Acked-by: Michael Walle <mich...@walle.cc> >--- > hw/display/milkymist-tmu2.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >

Re: [Qemu-devel] [PATCH 13/20] lm32: Move CPU files to target/ folder

et-lm32 => target/lm32}/op_helper.c (100%) rename {target-lm32 => target/lm32}/translate.c (100%) Acked-by: Michael Walle <mich...@walle.cc>

[Qemu-devel] [PATCH] milkymist-pfpu: fix potential integer overflow

Since the lm32 is a 32 bit architecture, just return a 32 bit value which is then converted to a 64 bit value. Spotted by coverity, CID 1005506. Signed-off-by: Michael Walle <mich...@walle.cc> --- hw/misc/milkymist-pfpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --gi

[Qemu-devel] [PATCH 2/4] target-lm32: disable asm logging via LOG_DIS()

turned off. Signed-off-by: Michael Walle <mich...@walle.cc> --- target-lm32/translate.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target-lm32/translate.c b/target-lm32/translate.c index fa8416a..792637f 100644 --- a/target-lm32/translate.c +++ b/target-

[Qemu-devel] [PATCH 4/4] target-lm32: rewrite gen_compare()

Drop the rX, rY and rZ stuff and use dc->r{0,1,2} directly. This should also fix the false positive in coverity CID 1005720. Signed-off-by: Michael Walle <mich...@walle.cc> --- target-lm32/translate.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/ta

[Qemu-devel] [PATCH 3/4] lm32: milkymist-tmu2: fix integer overflow

Don't truncate the multiplication and do a 64 bit one instead because because the result is stored in a 64 bit variable. Spotted by coverity, CID 1167561. Signed-off-by: Michael Walle <mich...@walle.cc> --- hw/display/milkymist-tmu2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Qemu-devel] [PATCH 1/4] target-lm32: swap operand of wcsr in LOG_DIS()

Be consistent with the reference manual. Signed-off-by: Michael Walle <mich...@walle.cc> --- target-lm32/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-lm32/translate.c b/target-lm32/translate.c index dc64cc6..fa8416a 100644 --- a/target-lm32/trans

[Qemu-devel] [PATCH] target-lm32: fix LOG_DIS operand order

The order of most opcodes with immediates was wrong (according to the reference manual) in the (debug) logging. Additionally, one operand for the andhi instruction was completly wrong. Fix these. Signed-off-by: Michael Walle <mich...@walle.cc> --- target-lm32/translate.

Re: [Qemu-devel] [PATCH] target-lm32: fix style issue

Am 2016-10-12 18:35, schrieb Peter Maydell: On 12 October 2016 at 17:23, Michael Walle <mich...@walle.cc> wrote: Both branches of the ternary operator have the same expressions. Drop the operator. This fixes: https://bugs.launchpad.net/qemu/+bug/1414293 Signed-off-by: Michael Walle

Re: [Qemu-devel] [PATCH] target-lm32: fix style issue

Am 2016-10-12 18:35, schrieb Peter Maydell: but I noticed while doing the review that our LOG_DIS is wrong for the compare-immediates: LOG_DIS("cmpei r%d, r%d, %d\n", dc->r0, dc->r1, sign_extend(dc->imm16, 16)); but the processor reference manual says cmpei's mnemonic

[Qemu-devel] [PATCH] target-lm32: fix style issue

Both branches of the ternary operator have the same expressions. Drop the operator. This fixes: https://bugs.launchpad.net/qemu/+bug/1414293 Signed-off-by: Michael Walle <mich...@walle.cc> --- target-lm32/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/

Re: [Qemu-devel] [PATCH] linux-user: ppc64: set MSR_CM bit for BookE 2.06 MMU

Am 2016-08-16 15:56, schrieb Michael Walle: Am 2016-08-16 15:41, schrieb Riku Voipio: On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote: Am 2016-07-22 17:57, schrieb Alexander Graf: >On 07/22/2016 05:18 PM, Michael Walle wrote: >>64 bit user mode doesn't work for the e

[Qemu-devel] [PATCH v2] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP

. This worked well as long as there was only one bit set in the 'flag' parameter. But as explained before, we have to make sure all bits in the 'flag' parameter are set. Signed-off-by: Michael Walle <mich...@walle.cc> --- v2: - rename flag to flags - use normal indent style in macro (also

Re: [Qemu-devel] [PATCH] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP

Am 2016-09-20 04:23, schrieb David Gibson: On Tue, Aug 16, 2016 at 03:40:50PM +0200, Michael Walle wrote: Only the POWER[789] CPUs should have the ARCH_206 bit set. This is what the linux kernel does. I guess this was also the intention of commit 0e019746. We have to make sure all *206 bits

Re: [Qemu-devel] [PATCH] linux-user: ppc64: set MSR_CM bit for BookE 2.06 MMU

Am 2016-08-16 15:41, schrieb Riku Voipio: On Tue, Aug 16, 2016 at 03:32:56PM +0200, Michael Walle wrote: Am 2016-07-22 17:57, schrieb Alexander Graf: >On 07/22/2016 05:18 PM, Michael Walle wrote: >>64 bit user mode doesn't work for the e5500 core because the MSR_CM bit >>is

[Qemu-devel] [PATCH] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP

Only the POWER[789] CPUs should have the ARCH_206 bit set. This is what the linux kernel does. I guess this was also the intention of commit 0e019746. We have to make sure all *206 bits are set. Signed-off-by: Michael Walle <mich...@walle.cc> --- checkpatch.pl flags one warning, but I

Re: [Qemu-devel] [PATCH] linux-user: ppc64: set MSR_CM bit for BookE 2.06 MMU

Am 2016-07-22 17:57, schrieb Alexander Graf: On 07/22/2016 05:18 PM, Michael Walle wrote: 64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is not set which enables the 64 bit mode for this MMU model. Memory addresses are truncated to 32 bit, which results in "In

[Qemu-devel] [PATCH v2] target-ppc: add PPC_MFTB flag to e500mc and e5500

According to the e500mc and e5500 core reference manual they have support for the mftb instruction. Signed-off-by: Michael Walle <mich...@walle.cc> --- changes v2: - add the flag to e500mc, too target-ppc/translate_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[Qemu-devel] [PATCH] target-ppc: add PPC_MFTB flag to e5500 core

According to the e5500 core reference manual it has support for the mftb instruction. Signed-off-by: Michael Walle <mich...@walle.cc> --- target-ppc/translate_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_

[Qemu-devel] [PATCH] linux-user: ppc64: set MSR_CM bit for BookE 2.06 MMU

l. Signed-off-by: Michael Walle <mich...@walle.cc> --- This is a kind of a v2 patch. The did the fix in the wrong place: http://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg05409.html linux-user/main.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lin

Re: [Qemu-devel] [PATCH] target-ppc: set MSR_CM bit for BookE 2.06 MMU

Am 2016-07-22 15:07, schrieb Alexander Graf: On 22 Jul 2016, at 15:00, Michael Walle <mich...@walle.cc> wrote: 64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is not set which enables the 64 bit mode for this MMU model. Memory addresses are truncated to 32 bit,

[Qemu-devel] [PATCH] target-ppc: set MSR_CM bit for BookE 2.06 MMU

l. Signed-off-by: Michael Walle <mich...@walle.cc> --- target-ppc/translate_init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5ecafc7..1ebb143 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_in

Re: [Qemu-devel] [PATCH] milkymist: fix tmu2.c build failure (missing error.h include)

Am 2016-06-21 12:11, schrieb Gerd Hoffmann: Signed-off-by: Gerd Hoffmann <kra...@redhat.com> Ouch, sorry. Must haved missed the opengl feature yesterday. Acked-by: Michael Walle <mich...@walle.cc> --- hw/display/milkymist-tmu2.c | 1 + 1 file changed, 1 insertion(+) dif

[Qemu-devel] [PULL 6/6] milkymist: update specification URLs

The old milkymist.org domain just forwards to mm-labs.hk nowadays. I've created a mirror of the documents. Signed-off-by: Michael Walle <mich...@walle.cc> --- hw/audio/milkymist-ac97.c| 2 +- hw/char/milkymist-uart.c | 2 +- hw/display/milkymist-tmu2.c | 2 +- hw/display/mil

[Qemu-devel] [PULL 4/6] hw/display: QOM'ify milkymist-vgafb.c

From: xiaoqiang zhao <zxq_yx_...@163.com> * Drop the old SysBus init function and use instance_init * Move graphic_console_init into realize stage Signed-off-by: xiaoqiang zhao <zxq_yx_...@163.com> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Acked-by: Michael Walle

[Qemu-devel] [PULL 2/6] hw/timer: QOM'ify milkymist_sysctl

;zxq_yx_...@163.com> Acked-by: Michael Walle <mich...@walle.cc> Tested-by: Michael Walle <mich...@walle.cc> Signed-off-by: Michael Walle <mich...@walle.cc> --- hw/timer/milkymist-sysctl.c | 21 + 1 file changed, 13 insertions(+), 8 deletions(-) diff --gi

[Qemu-devel] [PULL 1/6] hw/timer: QOM'ify lm32_timer

;zxq_yx_...@163.com> Acked-by: Michael Walle <mich...@walle.cc> Tested-by: Michael Walle <mich...@walle.cc> Signed-off-by: Michael Walle <mich...@walle.cc> --- hw/timer/lm32_timer.c | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/hw/timer/

[Qemu-devel] [PULL 3/6] hw/display: QOM'ify milkymist-tmu2.c

From: xiaoqiang zhao <zxq_yx_...@163.com> * Drop the old SysBus init function and use instance_init * Move tmu2_glx_init into realize stage Signed-off-by: xiaoqiang zhao <zxq_yx_...@163.com> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Acked-by: Michael Walle <mic

[Qemu-devel] [PULL 5/6] hw/intc: QOM'ify lm32_pic.c

From: xiaoqiang zhao <zxq_yx_...@163.com> Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_...@163.com> Acked-by: Michael Walle <mich...@walle.cc> Tested-by: Michael Walle <mich...@walle.cc> Signed-off-by: Michael Walle <mic

[Qemu-devel] [PULL 0/6] lm32/milkymist: some qomifying and a small doc fix

Michael Walle (1): milkymist: update specification URLs xiaoqiang zhao (5): hw/timer: QOM'ify lm32_timer hw/timer: QOM'ify milkymist_sysctl hw/display: QOM'ify milkymist-tmu2.c hw/display: QOM'ify milkymist-vgafb.c hw/intc: QOM'ify lm32_pic.c hw/audio/milkymist

Re: [Qemu-devel] [PATCH 0/9] QOM'ify hw/intc files

hi, im planning to, please bear with me, as i'm on vacation. -michael Am 2. Juni 2016 16:10:40 GMT+06:00, schrieb "赵小强" : > > >At 2016-05-09 17:24:04, mich...@walle.cc wrote: >>Hi Peter, >> >>Am 2016-05-04 16:56, schrieb Peter Maydell: >> >>> SPARC, lm32, CRIS maintainers:

Re: [Qemu-devel] [PATCH v6 0/5] QOM'ify hw/char devices

Am 2016-05-25 08:38, schrieb xiaoqiang zhao: This patch set trys to QOM'ify hw/char files, see commit messages for more details Thanks Paolo for your suggestions. Note: * CRIS axis_dev88 broad related test is passed and looks ok. * lm32 test cases by Michael

Re: [Qemu-devel] [PATCH v6 3/5] hw/char: QOM'ify lm32_juart.c

Am 2016-05-25 08:39, schrieb xiaoqiang zhao: * Drop the old SysBus init function * Call qemu_chr_add_handlers in the realize callback * Use qdev chardev prop instead of qemu_char_get_next_serial Signed-off-by: xiaoqiang zhao <zxq_yx_...@163.com> Tested-by: Michael Walle <mich...

Re: [Qemu-devel] [PATCH v6 5/5] hw/char: QOM'ify milkymist-uart.c

Am 2016-05-25 08:39, schrieb xiaoqiang zhao: drop the qemu_char_get_next_serial and use chardev prop instead Signed-off-by: xiaoqiang zhao <zxq_yx_...@163.com> Tested-by: Michael Walle <mich...@walle.cc> Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] [PATCH v5 3/4] hw/char: QOM'ify lm32_juart.c

Am 2016-05-23 12:24, schrieb xiaoqiang zhao: * Drop the old SysBus init function * Call qemu_chr_add_handlers in the realize callback * Use qdev chardev prop instead of qemu_char_get_next_serial Signed-off-by: xiaoqiang zhao --- hw/char/lm32_juart.c | 17 -

Re: [Qemu-devel] [PATCH v5 4/4] hw/char: QOM'ify lm32_uart.c

-by: xiaoqiang zhao <zxq_yx_...@163.com> Tested-by: Michael Walle <mich...@walle.cc> Acked-by: Michael Walle <mich...@walle.cc>

Re: [Qemu-devel] [PATCH v2 6/7] [RFC] Use DEFINE_MACHINE to register all machines

Am 2015-08-18 23:43, schrieb Eduardo Habkost: I am sending a single patch for all machines to get some feedback, but in the final patch series I will separate them by architecture. Signed-off-by: Eduardo Habkost ehabk...@redhat.com --- (Sending v2 of just patch 6/7 to avoid resending the whole

Re: [Qemu-devel] [PATCH 09/19] lm32: Remove ELF_MACHINE from cpu.h

Am 2015-08-16 01:28, schrieb Peter Crosthwaite: From: Peter Crosthwaite crosthwaitepe...@gmail.com The bootloaders can just pass EM_LATTICEMICO32 directly, as that is architecture specific code. This removes another architecture specific definition from the global namespace. Cc: Michael Walle

Re: [Qemu-devel] [PATCH for-2.4 08/12] milkymist-minimac2: Flush queued packets when link comes up

Am 2015-07-14 13:07, schrieb Fam Zheng: On Tue, 07/14 13:02, Michael Walle wrote: Am 2015-07-14 09:53, schrieb Fam Zheng: Drop .can_receive and move the semantics into minimac2_rx, by returning 0. That is once minimac2_rx returns 0, incoming packets will be queued until the queue is explicitly

Re: [Qemu-devel] [PATCH for-2.4 08/12] milkymist-minimac2: Flush queued packets when link comes up

Am 2015-07-14 09:53, schrieb Fam Zheng: Drop .can_receive and move the semantics into minimac2_rx, by returning 0. That is once minimac2_rx returns 0, incoming packets will be queued until the queue is explicitly flushed. We do this when s-regs[R_STATE0] or s-regs[R_STATE1] is changed in

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