Re: [Qemu-devel] [PATCH V4 1/4] target-i386: introduce coalesced_pio kvm header update

2018-08-28 11:58-0300, Eduardo Habkost: > On Sat, Aug 25, 2018 at 08:19:47PM +0800, Peng Hao wrote: > > add coalesced_pio's struct and KVM_CAP_COALESCED_PIO header. > > > > Signed-off-by: Peng Hao > > What's the status of the corresponding KVM header patch? I got a minor request to improve

Re: [Qemu-devel] [PATCH v2 3/5] target/i386: Add support for CPUID_8000_001E for AMD

2018-02-28 22:18+, Moger, Babu: > > -Original Message- > > From: Radim Krčmář [mailto:rkrc...@redhat.com] > > Sent: Wednesday, February 28, 2018 12:24 PM > > To: Moger, Babu <babu.mo...@amd.com> > > Cc: pbonz...@redhat.com; r...@twiddle.net; ehabk...

Re: [Qemu-devel] [PATCH v2 2/5] target/i386: Populate AMD Processor Cache Information

2018-03-01 15:55+, Moger, Babu: > Radim, Thanks for your comments. I am working on the changes. > But, I need few clarifications on your comments. Please see inline. > > > -Original Message- > > From: Radim Krčmář [mailto:rkrc...@redhat.com] > > Sent: Wedn

Re: [Qemu-devel] [PATCH v2 2/5] target/i386: Populate AMD Processor Cache Information

2018-02-23 21:30-0500, Babu Moger: > From: Stanislav Lanci > > Adds information about cache size and topology from cpuid 0x801D leaf > for different cache types on AMD processors. > > Signed-off-by: Stanislav Lanci > Signed-off-by: Babu Moger

Re: [Qemu-devel] [PATCH v2 3/5] target/i386: Add support for CPUID_8000_001E for AMD

2018-02-23 21:30-0500, Babu Moger: > From: Stanislav Lanci > > Populate threads/core_id/apic_ids/socket_id when CPUID_EXT3_TOPOEXT > feature is supported. This is required to support hyperthreading > feature on AMD CPUS. These are supported via CPUID_8000_001E extended >

Re: [Qemu-devel] [PATCH v2 1/5] target/i386: Fix a minor typo found while reviwing

2018-02-23 21:30-0500, Babu Moger: > Changed KVM_CPUID_FLAG_SIGNIFCANT_INDEX to KVM_CPUID_FLAG_SIGNIFICANT_INDEX > > Signed-off-by: Babu Moger > --- > linux-headers/asm-x86/kvm.h | 2 +- > target/i386/kvm.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-)

Re: [Qemu-devel] [PATCH] kvm: check dev parameter when updating msi route

This should primarily go to the qemu devel list. I've Cc'd it, but reposting would be safer, thanks. 2018-02-02 10:21+0530, P J P: > From: Prasad J Pandit > > When updating message signalled interrupt(MSI) route in routine > kvm_irqchip_update_msi_route, device

Re: [Qemu-devel] [PATCH] kvm: apic: save and restore x2APIC LDR

2017-11-22 18:28-0200, Eduardo Habkost: > On Wed, Nov 22, 2017 at 07:09:08PM +0100, Radim Krčmář wrote: > > QEMU saves only 8 bits of APIC LDR, which means that it does not support > > x2APIC. The correct way of fixing this would be to save and restore the > > full 32 bit

Re: [Qemu-devel] [PATCH] kvm: apic: save and restore x2APIC LDR

2017-11-22 20:26+0100, Paolo Bonzini: > On 22/11/2017 19:09, Radim Krčmář wrote: > > QEMU saves only 8 bits of APIC LDR, which means that it does not support > > x2APIC. The correct way of fixing this would be to save and restore the > > full 32 bit register, but because x2A

[Qemu-devel] [PATCH] kvm: apic: save and restore x2APIC LDR

with patch 5849d75a5c9b ("KVM: lapic: Fixup LDR on load in x2apic"). Reported-by: Dr. David Alan Gilbert <dgilb...@redhat.com> Reported-by: Yiqian Wei <yi...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- I haven't tested that it actually fixes the bug,

Re: [Qemu-devel] [PATCH] x86: Increase max vcpu number to 352

2017-08-10 15:16-0300, Eduardo Habkost: > On Thu, Aug 10, 2017 at 02:41:03PM +0200, Radim Krčmář wrote: > > 2017-08-10 19:02+0800, Lan Tianyu: > > > On 2017年08月10日 18:26, Daniel P. Berrange wrote: > > >> On Thu, Aug 10, 2017 at 06:08:07PM +0800, Lan Tianyu wrot

Re: [Qemu-devel] [PATCH] x86: Increase max vcpu number to 352

2017-08-10 19:02+0800, Lan Tianyu: > On 2017年08月10日 18:26, Daniel P. Berrange wrote: >> On Thu, Aug 10, 2017 at 06:08:07PM +0800, Lan Tianyu wrote: >>> Intel Xeon phi chip will support 352 logical threads. For HPC >>> usage case, it will create a huge VM with vcpus number as same as host >>> cpus.

Re: [Qemu-devel] [PATCH] KVM: Add async pf flag to KVM_GET/SET_VCPU_EVENTS interface

2017-06-20 20:14-0700, Wanpeng Li: > From: Wanpeng Li > > This patch adds async pf flag to KVM_GET/SET_VCPU_EVENTS interface. > > Signed-off-by: Wanpeng Li > --- > diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h > @@ -300,6

Re: [Qemu-devel] [PATCH RFC] KVM: X86: save and load PVCLOCK_TSC_UNSTABLE_BIT when migration

2017-06-13 20:00+0800, Jay Zhou: > On 2017/6/13 3:52, Radim Krčmář wrote: > > If you get a timestamp from KVM_GET_CLOCK() and pass that to > > KVM_SET_CLOCK(), then kvmclock should not jump backwards anymore > > (it could before 4.9, but only if the host had stable tsc). >

Re: [Qemu-devel] [PATCH RFC] migration: kvmclock: save and load the PVCLOCK_TSC_UNSTABLE_BIT flag when migration

2017-06-12 21:30+0800, Jay Zhou: > Guest using kvmclock will be hanged when migrating from unstable > tsc host to stable tsc host occasionally. > Sometimes, the tsc timestamp saved at the source side will be > backward when the guest stopped, and this value is transferred > to the destination

Re: [Qemu-devel] [PATCH RFC] KVM: X86: save and load PVCLOCK_TSC_UNSTABLE_BIT when migration

2017-06-12 21:23+0800, Jay Zhou: > Guest using kvmclock will be hanged when migrating from unstable > tsc host to stable tsc host occasionally. > Sometimes, the tsc timestamp saved at the source side will be > backward when the guest stopped, and this value is transferred > to the destination

Re: [Qemu-devel] [PATCH v3] KVM: x86: Fix nmi injection failure when vcpu got blocked

2017-05-26 13:16+0800, Zhuangyanying: > From: ZhuangYanying > > When spin_lock_irqsave() deadlock occurs inside the guest, vcpu threads, > other than the lock-holding one, would enter into S state because of > pvspinlock. Then inject NMI via libvirt API

Re: [Qemu-devel] [PATCH] Fix nmi injection failure when vcpu got blocked

Please use tags in patches. We usually begin the subject with "KVM: x86:" when touching arch/x86/kvm/x86.c. 2017-05-24 13:48+0800, Zhuangyanying: > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > @@ -8394,7 +8394,8 @@ static inline bool kvm_vcpu_has_events(struct kvm_vcpu > *vcpu) >

Re: [Qemu-devel] [PATCH v5 untested] kvm: better MWAIT emulation for guests

[Cc qemu-devel as we've gone off-topic] 2017-04-04 15:15+0200, Alexander Graf: > On 04/04/2017 03:13 PM, Radim Krčmář wrote: >> 2017-04-04 14:51+0200, Alexander Graf: >> > Please see my patch to force enable CPUID bits ;). >> Nice. MWAIT could also use setting of arbit

Re: [Qemu-devel] [PATCH] pc: q35: bump max_cpus to INT32_MAX

2017-03-22 18:06+0200, Michael S. Tsirkin: > On Wed, Mar 22, 2017 at 04:59:06PM +0100, Radim Krčmář wrote: >> QEMU does not allocate based on machine's max_cpus, but only uses it to >> limit the maximum selected by user and the actual limit of VCPUs is >> enfoced by other comp

[Qemu-devel] [PATCH] pc: q35: bump max_cpus to INT32_MAX

billion VCPU won't be needed for a while, so we can ignore possible bugs by using signed max. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- Should the 2.9 machine type still have 288? --- hw/i386/pc_q35.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/h

Re: [Qemu-devel] [kvm-unit-tests PATCH 2/2] run_tests: allow run tests in parallel

2017-01-05 10:35+0800, Peter Xu: > On Wed, Jan 04, 2017 at 03:55:42PM +0100, Radim Krčmář wrote: >> > I didn't notice the "-n" parameter for "wait", otherwise I won't >> > bother using SIGUSR1 at all. :) >> >> (Btw. why couldn't you use

Re: [Qemu-devel] [kvm-unit-tests PATCH v2 2/2] run_tests: allow run tests in parallel

2017-01-05 11:07+0800, Peter Xu: > On Wed, Jan 04, 2017 at 04:09:39PM +0100, Radim Krčmář wrote: >> 2017-01-03 18:10+0800, Peter Xu: >> > run_task.sh is getting slow. This patch is trying to make it faster by >> > running the tests concurrently. >> >

Re: [Qemu-devel] [kvm-unit-tests PATCH v2 2/2] run_tests: allow run tests in parallel

sh | 75s | >| run_test.sh -j8 | 27s | >|-----+---| > > Suggested-by: Radim Krčmář <rkrc...@redhat.com> > Signed-off-by: Peter Xu <pet...@redhat.com> > --- > run_tests.sh | 12 ++-- > scripts/functions.bash |

Re: [Qemu-devel] [kvm-unit-tests PATCH 2/2] run_tests: allow run tests in parallel

2017-01-03 10:45+0800, Peter Xu: > On Mon, Jan 02, 2017 at 09:18:24PM +0100, Radim Krčmář wrote: >> 2017-01-01 18:34+0800, Peter Xu: >> > diff --git a/scripts/functions.bash b/scripts/functions.bash >> Couldn't the queue be much simpler ... >> >> > +

Re: [Qemu-devel] [kvm-unit-tests PATCH 0/2] run_tests: support concurrent test execution

2017-01-02 18:07+0100, Paolo Bonzini: > On 01/01/2017 11:34, Peter Xu wrote: >> run_tests.sh is getting slower. Maybe it's time to let it run faster. >> An obvious issue is that, we were running the tests sequentially in >> the past. >> >> This series provides another new "-j" parameter. "-j 8"

Re: [Qemu-devel] [kvm-unit-tests PATCH 2/2] run_tests: allow run tests in parallel

2017-01-01 18:34+0800, Peter Xu: > run_task.sh is getting slow. This patch is trying to make it faster by > running the tests concurrently. > > First of all, we provide a new parameter "-j" for the run_tests.sh, > which can be used to specify how many run queues we want for the tests. > When "-j"

Re: [Qemu-devel] [kvm-unit-tests PATCH] configure: honour $ARCH and $CROSS_COMPILE

2016-11-21 18:22+, Andre Przywara: > Both environment variables seem to be standard in cross-compilation > environments, especially with Linux. > Let the configure script take those into account when setting the default > values for --arch and --cross-prefix. Explicitly specifying the latter >

Re: [Qemu-devel] [QEMU PATCH] kvmclock: advance clock by time window between vm_stop and pre_save

2016-11-04 16:29-0200, Marcelo Tosatti: > On Fri, Nov 04, 2016 at 06:34:20PM +0100, Radim Krčmář wrote: >> 2016-11-04 14:24-0200, Marcelo Tosatti: >> > On Fri, Nov 04, 2016 at 04:48:28PM +0100, Radim Krčmář wrote: >> >> 2016-11-04 16:33+0100, Paolo Bonzini: >

Re: [Qemu-devel] [QEMU PATCH] kvmclock: advance clock by time window between vm_stop and pre_save

2016-11-04 15:07-0200, Marcelo Tosatti: > On Fri, Nov 04, 2016 at 04:25:23PM +0100, Radim Krčmář wrote: >> > +/* >> > + * Transition from VM-running to VM-stopped via migration? >> > + * Record when the VM was stopped. >> > +

Re: [Qemu-devel] [QEMU PATCH] kvmclock: advance clock by time window between vm_stop and pre_save

2016-11-04 14:24-0200, Marcelo Tosatti: > On Fri, Nov 04, 2016 at 04:48:28PM +0100, Radim Krčmář wrote: >> 2016-11-04 16:33+0100, Paolo Bonzini: >> > On 04/11/2016 16:25, Radim Krčmář wrote: >> >>> > >> >>> > +if (s->advance_

Re: [Qemu-devel] [QEMU PATCH] kvmclock: advance clock by time window between vm_stop and pre_save

2016-11-04 16:57+0100, Paolo Bonzini: > On 04/11/2016 16:48, Radim Krčmář wrote: >> 2016-11-04 16:33+0100, Paolo Bonzini: >>> On 04/11/2016 16:25, Radim Krčmář wrote: >>>>>> >>>>>> +if (s->advance_clock && s->clock +

Re: [Qemu-devel] [QEMU PATCH] kvmclock: advance clock by time window between vm_stop and pre_save

2016-11-04 16:33+0100, Paolo Bonzini: > On 04/11/2016 16:25, Radim Krčmář wrote: >>> > >>> > +if (s->advance_clock && s->clock + s->advance_clock > s->clock) { >>> > +s->clock += s->advance_clock

Re: [Qemu-devel] [QEMU PATCH] kvmclock: advance clock by time window between vm_stop and pre_save

2016-11-04 07:43-0200, Marcelo Tosatti: > This patch, relative to pre-copy migration codepath, > measures the time between vm_stop() and pre_save(), > which includes copying the remaining RAM to destination, > and advances the clock by that amount. > > In a VM with 5 seconds downtime, this

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-19 11:55-0200, Eduardo Habkost: > On Wed, Oct 19, 2016 at 03:27:52PM +0200, Radim Krčmář wrote: >> 2016-10-18 19:05-0200, Eduardo Habkost: >> > On Tue, Oct 18, 2016 at 10:52:14PM +0200, Radim Krčmář wrote: >> > [...] >> >> The main problem is

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-18 19:05-0200, Eduardo Habkost: > On Tue, Oct 18, 2016 at 10:52:14PM +0200, Radim Krčmář wrote: > [...] >> The main problem is that QEMU changes virtual_tsc_khz when migrating >> without hardware scaling, so KVM is forced to get nanoseconds wrong ... >> >>

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-18 15:09-0200, Marcelo Tosatti: > On Tue, Oct 18, 2016 at 03:41:03PM +0200, Paolo Bonzini wrote: >> On 18/10/2016 01:58, Marcelo Tosatti wrote: >> > > We should also blacklist the TSC deadline timer when invtsc is not >> > > available. >> > >> > Actually, a nicer fix would be to check the

Re: [Qemu-devel] [PATCH v4 09/13] pc: kvm_apic: pass APIC ID depending on xAPIC/x2APIC mode

2016-10-18 12:56-0200, Eduardo Habkost: > On Fri, Oct 14, 2016 at 01:21:55PM +0200, Igor Mammedov wrote: >> Signed-off-by: Igor Mammedov >> --- >> v4: >> - restore kvm_has_x2apic_api() and use it to avoid side-effects >>of kvm_enable_x2apic(). x2APIC API will be enabled

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-17 21:58-0200, Marcelo Tosatti: > On Mon, Oct 17, 2016 at 07:11:01PM -0200, Eduardo Habkost wrote: >> On Mon, Oct 17, 2016 at 06:24:38PM +0200, Paolo Bonzini wrote: >> > On 17/10/2016 16:50, Radim Krčmář wrote: >> > > 2016-10-17 07:47-0200, Marcelo Tosatti

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-17 18:24+0200, Paolo Bonzini: > On 17/10/2016 16:50, Radim Krčmář wrote: >> 2016-10-17 07:47-0200, Marcelo Tosatti: >>> On Fri, Oct 14, 2016 at 06:20:31PM -0300, Eduardo Habkost wrote: >>>> I have been wondering: should we allow live migration with the &g

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-18 15:36+0200, Radim Krčmář: > 2016-10-17 18:24+0200, Paolo Bonzini: >> We should also blacklist the TSC deadline timer when invtsc is not >> available. > > True. > > I was thinking that with Wanpeng's VMX preemption patches, we might not > need the TSC

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-17 15:20-0200, Marcelo Tosatti: > On Mon, Oct 17, 2016 at 04:50:09PM +0200, Radim Krčmář wrote: >> 2016-10-17 07:47-0200, Marcelo Tosatti: >> > On Fri, Oct 14, 2016 at 06:20:31PM -0300, Eduardo Habkost wrote: >> >> I have been wondering: should we allow live m

Re: [Qemu-devel] invtsc + migration + TSC scaling

2016-10-17 07:47-0200, Marcelo Tosatti: > On Fri, Oct 14, 2016 at 06:20:31PM -0300, Eduardo Habkost wrote: >> I have been wondering: should we allow live migration with the >> invtsc flag enabled, if TSC scaling is available on the >> destination? > > TSC scaling and invtsc flag, yes. Yes, if we

Re: [Qemu-devel] [PATCH v4 09/13] pc: kvm_apic: pass APIC ID depending on xAPIC/x2APIC mode

2016-10-14 13:21+0200, Igor Mammedov: > Signed-off-by: Igor Mammedov <imamm...@redhat.com> > --- Reviewed-by: Radim Krčmář <rkrc...@redhat.com> > v4: > - restore kvm_has_x2apic_api() and use it to avoid side-effects >of kvm_enable_x2apic(). x2APIC API will be en

Re: [Qemu-devel] [PATCH v3 08/13] pc: apic_common: reset APIC ID to initial ID when switching into x2APIC mode

;imamm...@redhat.com> > --- Reviewed-by: Radim Krčmář <rkrc...@redhat.com> > hw/intc/apic_common.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c > index ea3c8ca..d78c885 100644 > --- a/hw/intc/ap

Re: [Qemu-devel] [PATCH v3 09/13] pc: kvm_apic: pass APIC ID depending on xAPIC/x2APIC mode

2016-10-13 11:52+0200, Igor Mammedov: > Signed-off-by: Igor Mammedov <imamm...@redhat.com> > --- > v4: > - drop kvm_has_x2apic_api() and reuse kvm_enable_x2apic() instead > --- Reviewed-by: Radim Krčmář <rkrc...@redhat.com> > hw/i386/kvm/apic.c | 12

Re: [Qemu-devel] [PATCH v3 13/13] pc: require IRQ remapping and EIM if there could be x2APIC CPUs

2016-10-13 11:52+0200, Igor Mammedov: > it would prevent starting guest with incorrect configs > where interrupts couldn't be delivered to CPUs with > APIC IDs > 254. off-by-one. > Signed-off-by: Igor Mammedov <imamm...@redhat.com> > --- Reviewed-by: Radim Krčmář <

Re: [Qemu-devel] [PATCH v3 14/13] pc: q35: bump max_cpus to 288

2016-10-13 15:24+0200, Igor Mammedov: > along with it for machine versions 2.7 and older keep > it at 255. > > Signed-off-by: Igor Mammedov <imamm...@redhat.com> > --- Seems nicer than touching max_cpus in pc_machine_class_init(), Reviewed-by: Radim Krčmář <rkrc.

[Qemu-devel] [PATCH v5 6/7] intel_iommu: reject broken EIM

, and make it the default for old machine types. A user can enable the buggy mode it with "x-buggy-eim=on". Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5: * squash with the patch that added compat property: v5: rename property to x-buggy-eim [Eduardo and Michael] v4:

[Qemu-devel] [PATCH v5 1/7] apic: add global apic_get_class()

-by: Eduardo Habkost <ehabk...@redhat.com> Reviewed-by: Eduardo Habkost <ehabk...@redhat.com> Reviewed-by: Peter Xu <pet...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5: r-b Eduardo and Peter v4: do not use private class attribute [Eduardo] v3: complete

[Qemu-devel] [PATCH v5 7/7] target-i386/kvm: cache the return value of kvm_enable_x2apic()

Assume that KVM would have returned the same on subsequent runs. Abstract the memoizaiton pattern into macros and call it memorize as adding the r makes it less obscure. Reviewed-by: Igor Mammedov <imamm...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5:

[Qemu-devel] [PATCH v5 2/7] apic: add send_msi() to APICCommonClass

; Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5: r-b Peter v4: r-b Igor v2: change apic_send_msi() to accept MSIMessage [Igor] --- hw/i386/kvm/apic.c | 19 +-- hw/i386/xen/xen_apic.c | 6 ++ hw/intc/apic.c | 8 ++-

[Qemu-devel] [PATCH v5 0/7] intel_iommu: fix EIM

v4: http://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg00698.html v5 is one patch shorter as it merged two patches from v4 into [6/7]. The x2APIC mode works on >=2.8 machine types with this series and <2.7 remain compatible (aka broken). Radim Krčmář (7): apic: add

[Qemu-devel] [PATCH v5 4/7] intel_iommu: redo configuraton check in realize

edhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5: r-b Peter v4: r-b Igor v3: * use error_setg [Paolo] * create a new function [Peter] --- hw/i386/intel_iommu.c | 26 ++ 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/hw/i386/intel

[Qemu-devel] [PATCH v5 5/7] intel_iommu: add OnOffAuto intr_eim as "eim" property

The default (auto) emulates the current behavior. A user can now control EIM like -device intel-iommu,intremap=on,eim=off Reviewed-by: Igor Mammedov <imamm...@redhat.com> Reviewed-by: Peter Xu <pet...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5: r-b Pet

[Qemu-devel] [PATCH v5 3/7] intel_iommu: pass whole remapped addresses to apic

. Reviewed-by: Peter Xu <pet...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v5: added r-b Peter, removed r-b Igor (added by mistake) v4: r-b Igor v2: fix build with enabled DEBUG_INTEL_IOMMU [Peter] --- hw/i386/intel_iommu.c | 21 + 1 fil

Re: [Qemu-devel] [PATCH v4 6/8] intel_iommu: reject broken EIM

2016-10-08 15:21+0800, Peter Xu: > On Wed, Oct 05, 2016 at 03:06:55PM +0200, Radim Krčmář wrote: > > [...] > >> @@ -2472,10 +2473,22 @@ static bool vtd_decide_config(IntelIOMMUState *s, >> Error **errp) >> } >> >> if (s->intr_eim =

Re: [Qemu-devel] [PATCH v4 2/8] apic: add send_msi() to APICCommonClass

2016-10-08 14:37+0800, Peter Xu: > On Wed, Oct 05, 2016 at 03:06:51PM +0200, Radim Krčmář wrote: >> The MMIO based interface to APIC doesn't work well with MSIs that have >> upper address bits set (remapped x2APIC MSIs). A specialized interface >> is a quick and dirty way to

Re: [Qemu-devel] [PATCH] KVM: x86: handle KVM_SET_VCPU_EVENTS/KVM_VCPUEVENT_VALID_SMM properly

2016-10-08 11:31+0800, Herongguang (Stephen): > On 2016/9/23 12:59, herongguang wrote: >> From: He Rongguang >> >> handle KVM_VCPUEVENT_VALID_SMM properly, or kvm-kmod/kernel will crash >> in migration destination in gfn_to_rmap() since kvm_memslots_for_spte_role >> is

Re: [Qemu-devel] [PATCH v4 3/8] intel_iommu: pass whole remapped addresses to apic

2016-10-07 15:05+0200, Igor Mammedov: > On Wed, 5 Oct 2016 15:06:52 +0200 > Radim Krčmář <rkrc...@redhat.com> wrote: > >> The MMIO interface to APIC only allowed 8 bit addresses, which is not >> enough for 32 bit addresses from EIM remapping. >> Intel stored uppe

Re: [Qemu-devel] [PATCH v4 7/8] intel_iommu: keep buggy EIM enabled in 2.7 machine type

2016-10-06 11:51-0300, Eduardo Habkost: > On Wed, Oct 05, 2016 at 03:06:56PM +0200, Radim Krčmář wrote: >> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> >> --- >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c >> @@ -2015,6 +2015,7

Re: [Qemu-devel] [PATCH v4 7/8] intel_iommu: keep buggy EIM enabled in 2.7 machine type

2016-10-06 18:33+0300, Michael S. Tsirkin: > On Thu, Oct 06, 2016 at 11:51:42AM -0300, Eduardo Habkost wrote: >> On Wed, Oct 05, 2016 at 03:06:56PM +0200, Radim Krčmář wrote: >> > QEMU 2.7 allowed EIM even in configurations that were forbidden in the >> > last patch be

Re: [Qemu-devel] [PATCH 0/2] qom+coccinelle: add and use object_new_with_class()

2016-10-05 15:35+0200, Radim Krčmář: > This series performs a simple replacement of > object_new(object_class_get_name(class)) by object_new_with_class(class) > in the spirit of existing object_new_with_type(). This series applies after recently posted [PATCH v4 1/8] apic: a

[Qemu-devel] [PATCH 0/2] qom+coccinelle: add and use object_new_with_class()

Habkost <ehabk...@redhat.com> Cc: Alexander Graf <ag...@suse.de> Cc: Max Filippov <jcmvb...@gmail.com> Cc: qemu-...@nongnu.org Radim Krčmář (2): qom: add object_new_with_class() coccinelle: use object_new_with_class() in obvious cases hw/arm/exynos4210.c

[Qemu-devel] [PATCH 1/2] qom: add object_new_with_class()

object_new_with_object_class() was a close contender for the name, but it is longer, the type system will catch possible errors, and the only reasonable replacement would be a polymorphic function that would not break existing users. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- i

[Qemu-devel] [PATCH 2/2] coccinelle: use object_new_with_class() in obvious cases

object_new_with_class(class) does a better job than object_new(object_class_get_name(class)), because object_class_get_name() lost the class->type and object_new() looked it up again from the name. Manually changed vl.c to fit into 80 character line. Signed-off-by: Radim Krčmář &l

[Qemu-devel] [PATCH v4 3/8] intel_iommu: pass whole remapped addresses to apic

. Reviewed-by: Igor Mammedov <imamm...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v4: r-b Igor v2: fix build with enabled DEBUG_INTEL_IOMMU [Peter] --- hw/i386/intel_iommu.c | 21 + 1 file changed, 9 insertions(+), 12 deletions(-) diff --g

[Qemu-devel] [PATCH v4 7/8] intel_iommu: keep buggy EIM enabled in 2.7 machine type

can enable the buggy mode it with "buggy_eim=on", which is weird, but I don't know how to add a private property. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v4: * use a device property [Igor] * clarify the last sentence of the commit message v3: shorten the code [Pet

[Qemu-devel] [PATCH v4 8/8] target-i386/kvm: cache the return value of kvm_enable_x2apic()

Assume that KVM would have returned the same on subsequent runs. Abstract the memoizaiton pattern into macros and call it memorize as adding the r makes it less obscure. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v4: * changed the name to memorize [Igor] * remove useless under

[Qemu-devel] [PATCH v4 1/8] apic: add global apic_get_class()

-by: Eduardo Habkost <ehabk...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v4: do not use private class attribute [Eduardo] v3: completely rewrite the mechanism [Eduardo] v2: assert() instead of error_report() and exit() [Peter] It still looks horrible, so I'll be

[Qemu-devel] [PATCH v4 4/8] intel_iommu: redo configuraton check in realize

* there no point in configuring the device if realization is going to fail, so move the check to the beginning, * create a separate function for the check, * use error_setg() instead error_report(). Reviewed-by: Igor Mammedov <imamm...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@r

[Qemu-devel] [PATCH v4 5/8] intel_iommu: add OnOffAuto intr_eim as "eim" property

The default (auto) emulates the current behavior. A user can now control EIM like -device intel-iommu,intremap=on,eim=off Reviewed-by: Igor Mammedov <imamm...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v4: * r-b Igor * added an example to the commit messag

[Qemu-devel] [PATCH v4 6/8] intel_iommu: reject broken EIM

to aliasing so interrupts were being delivered to incorrect VCPUs. KVM_X2APIC_API is the feature that allows us to enable eim for KVM. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v4: be more specific in the comment [Igor] v3: * use error_setg [Paolo] * shorten the code [Peter] v2: *

[Qemu-devel] [PATCH v4 0/8] intel_iommu: fix EIM

ection breaker; see the discussion under [v2 7/7] for details (http://lists.nongnu.org/archive/html/qemu-devel/2016-09/msg07795.html). Radim Krčmář (8): apic: add global apic_get_class() apic: add send_msi() to APICCommonClass intel_iommu: pass whole remapped addresses to apic intel_iommu

[Qemu-devel] [PATCH v4 2/8] apic: add send_msi() to APICCommonClass

The MMIO based interface to APIC doesn't work well with MSIs that have upper address bits set (remapped x2APIC MSIs). A specialized interface is a quick and dirty way to avoid the shortcoming. Reviewed-by: Igor Mammedov <imamm...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@r

Re: [Qemu-devel] [PATCH v3 1/8] apic: add global apic_get_class()

2016-10-03 13:03-0300, Eduardo Habkost: > On Fri, Sep 30, 2016 at 06:10:06PM +0200, Radim Krčmář wrote: >> Every configuration has only up to one APIC class and we'll be extending >> the class with a function that can be called without an instanced >> object, so a direc

Re: [Qemu-devel] [PATCH v3 7/8] intel_iommu: keep buggy EIM enabled in 2.7 machine type

2016-10-04 14:18+0200, Igor Mammedov: > On Fri, 30 Sep 2016 18:10:12 +0200 > Radim Krčmář <rkrc...@redhat.com> wrote: >> QEMU 2.7 allowed EIM even in configurations that were forbidden in the >> last patch because they were not working, like old KVM or userspace >> AP

Re: [Qemu-devel] [PATCH v3 8/8] target-i386/kvm: cache the return value of kvm_enable_x2apic()

2016-10-04 13:33+0200, Igor Mammedov: > On Fri, 30 Sep 2016 18:10:13 +0200 > Radim Krčmář <rkrc...@redhat.com> wrote: >> Assume that KVM would have returned the same on subsequent runs. >> Abstract the memoizaiton pattern into macros. > s/memoi/memori/i > Through

[Qemu-devel] [PATCH v3 6/8] intel_iommu: reject broken EIM

it enabled only for the KVM APIC; unconditionally, because making the option depend on KVM version would be a maintanance burden. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v3: * use error_setg [Paolo] * shorten the code [Peter] v2: * adapt to new intr_eim parameter * provide first

[Qemu-devel] [PATCH v3 2/8] apic: add send_msi() to APICCommonClass

The MMIO based interface to APIC doesn't work well with MSIs that have upper address bits set (remapped x2APIC MSIs). A specialized interface is a quick and dirty way to avoid the shortcoming. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: change apic_send_msi() to accept MSIM

[Qemu-devel] [PATCH v3 8/8] target-i386/kvm: cache the return value of kvm_enable_x2apic()

Assume that KVM would have returned the same on subsequent runs. Abstract the memoizaiton pattern into macros. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- target-i386/kvm.c | 21 +++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/target-i386/k

[Qemu-devel] [PATCH v3 5/8] intel_iommu: add OnOffAuto intr_eim as "eim" property

The default (auto) emulates the current behavior. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v3: * use error_setg [Paolo] * shorten the code [Peter] --- hw/i386/intel_iommu.c | 24 +--- include/hw/i386/intel_iommu.h | 1 + 2 files changed, 22 inse

[Qemu-devel] [PATCH v3 1/8] apic: add global apic_get_class()

-by: Eduardo Habkost <ehabk...@redhat.com> Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: assert() instead of error_report() and exit() [Peter] v3: completely rewrite the mechanism [Eduardo] It still looks horrible, so I'll be glad for any advice. And what is CONFIG_USER_ONLY?

[Qemu-devel] [PATCH v3 3/8] intel_iommu: pass whole remapped addresses to apic

. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: fix build with enabled DEBUG_INTEL_IOMMU [Peter] --- hw/i386/intel_iommu.c | 21 + 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 9f4e64

[Qemu-devel] [PATCH v3 7/8] intel_iommu: keep buggy EIM enabled in 2.7 machine type

QEMU 2.7 allowed EIM even in configurations that were forbidden in the last patch because they were not working, like old KVM or userspace APIC. In order to keep backward compatibility, we again allow guests to misbehave in non-obvious ways, and make it the default. Signed-off-by: Radim Krčmář

[Qemu-devel] [PATCH v3 4/8] intel_iommu: redo configuraton check in realize

* there no point in configuring the device if realization is going to fail, so move the check to the beginning, * create a separate function for the check, * use error_setg() instead error_report(). Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v3: * use error_setg [Paolo] * create

[Qemu-devel] [PATCH v3 0/8] intel_iommu: fix EIM

ection breaker; see the discussion under [v2 7/7] for details (http://lists.nongnu.org/archive/html/qemu-devel/2016-09/msg07795.html). Radim Krčmář (8): apic: add global apic_get_class() apic: add send_msi() to APICCommonClass intel_iommu: pass whole remapped addresses to apic intel_iommu

Re: [Qemu-devel] [PATCH v2 5/7] intel-iommu: add OnOffAuto intr_eim as "eim" property

2016-09-30 13:13+0800, Peter Xu: > On Thu, Sep 29, 2016 at 01:23:27PM +0200, Radim Krčmář wrote: >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c >> @@ -2466,6 +2472,18 @@ static void vtd_realize(DeviceState *dev, Error >> **errp) >> exit(1); &

Re: [Qemu-devel] [PATCH v2 7/7] intel-iommu: keep buggy EIM enabled in 2.7 machine type

2016-09-30 13:40+0800, Peter Xu: > On Thu, Sep 29, 2016 at 01:23:29PM +0200, Radim Krčmář wrote: > > [...] > >> @@ -2481,11 +2482,14 @@ static void vtd_realize(DeviceState *dev, Error >> **errp) >> if (s->intr_eim == ON_OFF_AUTO_AUTO && !x86_iommu-&

Re: [Qemu-devel] [PATCH v2 6/7] intel_iommu: reject broken EIM

2016-09-29 18:06+0200, Igor Mammedov: > On Thu, 29 Sep 2016 15:18:36 +0200 > Paolo Bonzini <pbonz...@redhat.com> wrote: >> On 29/09/2016 13:23, Radim Krčmář wrote: >> > Cluster x2APIC cannot work without KVM's x2apic API when the maximal >> > APIC ID is gre

Re: [Qemu-devel] [PATCH v2 7/7] intel-iommu: keep buggy EIM enabled in 2.7 machine type

2016-09-29 15:19+0200, Paolo Bonzini: > On 29/09/2016 13:23, Radim Krčmář wrote: >> QEMU 2.7 allowed EIM even in configurations that were forbidden in the >> last patch because they were not working, like old KVM or userspace >> APIC. In order to keep backward compatibility,

Re: [Qemu-devel] [PATCH v2 1/7] apic: add global apic_get_class()

2016-09-29 11:53-0300, Eduardo Habkost: > On Thu, Sep 29, 2016 at 01:23:23PM +0200, Radim Krčmář wrote: >> Every configuration has only up to one APIC class and we'll be extending >> the class with a function that can be called without an instanced >> object, so a direc

[Qemu-devel] [PATCH v2 6/7] intel_iommu: reject broken EIM

it enabled only for the KVM APIC; unconditionally, because making the option depend on KVM version would be a maintanance burden. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: * adapt to new intr_eim parameter * provide first linux version that has x2apic api * disable QEMU's

[Qemu-devel] [PATCH v2 5/7] intel-iommu: add OnOffAuto intr_eim as "eim" property

The default (auto) emulates the current behavior. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- hw/i386/intel_iommu.c | 20 +++- include/hw/i386/intel_iommu.h | 1 + 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/h

[Qemu-devel] [PATCH v2 7/7] intel-iommu: keep buggy EIM enabled in 2.7 machine type

QEMU 2.7 allowed EIM even in configurations that were forbidden in the last patch because they were not working, like old KVM or userspace APIC. In order to keep backward compatibility, we again allow guests to misbehave in non-obvious ways, and make it the default. Signed-off-by: Radim Krčmář

[Qemu-devel] [PATCH v2 4/7] intel-iommu: exit on invalid configuraton earlier

No point in configuring the device if realization is going to fail. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- hw/i386/intel_iommu.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index c39b62

[Qemu-devel] [PATCH v2 2/7] apic: add send_msi() to APICCommonClass

The MMIO based interface to APIC doesn't work well with MSIs that have upper address bits set (remapped x2APIC MSIs). A specialized interface is a quick and dirty way to avoid the shortcoming. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: change apic_send_msi() to accept MSIM

[Qemu-devel] [PATCH v2 3/7] intel_iommu: pass whole remapped addresses to apic

. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: fix build with enabled DEBUG_INTEL_IOMMU [Peter] --- hw/i386/intel_iommu.c | 21 + 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 9f4e64

[Qemu-devel] [PATCH v2 0/7] intel_iommu: fix EIM

v1: http://lists.nongnu.org/archive/html/qemu-devel/2016-09/msg05960.html The x2APIC mode works on >=2.8 machine types with this series and <2.7 remain compatible (aka broken). [4/7] and [5/7] can be squished. Radim Krčmář (7): apic: add global apic_get_class() apic: add se

[Qemu-devel] [PATCH v2 1/7] apic: add global apic_get_class()

Every configuration has only up to one APIC class and we'll be extending the class with a function that can be called without an instanced object, so a direct access to the class is convenient. Signed-off-by: Radim Krčmář <rkrc...@redhat.com> --- v2: assert() instead of error_report() an

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