Hi Cedric,
On 4/21/21 12:01 PM, Cédric Le Goater wrote:
On 4/21/21 8:20 AM, Ravi Bangoria wrote:
Hi David,
On 4/19/21 10:23 AM, David Gibson wrote:
On Mon, Apr 12, 2021 at 05:14:33PM +0530, Ravi Bangoria wrote:
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability
Hi David,
On 4/19/21 10:23 AM, David Gibson wrote:
On Mon, Apr 12, 2021 at 05:14:33PM +0530, Ravi Bangoria wrote:
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Use
Update against Linux 5.12-rc3
Signed-off-by: Ravi Bangoria
---
include/standard-headers/drm/drm_fourcc.h | 23 -
include/standard-headers/linux/input.h| 2 +-
.../standard-headers/rdma/vmw_pvrdma-abi.h| 7 ++
linux-headers/asm-generic/unistd.h| 4 +-
linux
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria
Reviewed
patch. (Sync
headers from v5.12-rc3)
[1] https://git.kernel.org/torvalds/c/bd1de1a0e6eff
Ravi Bangoria (3):
Linux headers: update from 5.12-rc3
ppc: Rename current DAWR macros and variables
ppc: Enable 2nd DAWR support on p10
hw/ppc/spapr.c| 7 +-
hw/ppc/
bit in guest DT using cap-dawr1 machine
capability. Though, watchpoint on powerpc TCG guest is not supported
and thus 2nd DAWR is not enabled for TCG mode.
Signed-off-by: Ravi Bangoria
Reviewed-by: Greg Kurz
---
hw/ppc/spapr.c | 7 ++-
hw/ppc/spapr_caps.c | 32
+static void cap_dawr1_apply(SpaprMachineState *spapr, uint8_t val,
+ Error **errp)
+{
+ERRP_GUARD();
+if (!val) {
+return; /* Disable by default */
+}
+
+if (tcg_enabled()) {
+error_setg(errp, "DAWR1 not supported in TCG.");
+
bit in guest DT using cap-dawr1 machine
capability. Though, watchpoint on powerpc TCG guest is not supported
and thus 2nd DAWR is not enabled for TCG mode.
Signed-off-by: Ravi Bangoria
---
hw/ppc/spapr.c | 7 ++-
hw/ppc/spapr_caps.c | 32
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria
Reviewed
Update against Linux 5.12-rc3
Signed-off-by: Ravi Bangoria
---
include/standard-headers/drm/drm_fourcc.h | 23 -
include/standard-headers/linux/input.h| 2 +-
.../standard-headers/rdma/vmw_pvrdma-abi.h| 7 ++
linux-headers/asm-generic/unistd.h| 4 +-
linux
when host kvm supports it. User has to manually enable it
with -machine cap-dawr1=on if he wishes to use it.
- Split the header file changes into separate patch. (Sync
headers from v5.12-rc3)
[1] https://git.kernel.org/torvalds/c/bd1de1a0e6eff
Ravi Bangoria (3):
Linux headers: up
On 3/31/21 5:06 AM, David Gibson wrote:
On Tue, Mar 30, 2021 at 06:48:38PM +0200, Greg Kurz wrote:
On Tue, 30 Mar 2021 15:23:50 +0530
Ravi Bangoria wrote:
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
Update against Linux 5.12-rc3
Signed-off-by: Ravi Bangoria
---
include/standard-headers/drm/drm_fourcc.h | 23 -
include/standard-headers/linux/input.h| 2 +-
.../standard-headers/rdma/vmw_pvrdma-abi.h| 7 ++
linux-headers/asm-generic/unistd.h| 4 +-
linux
bit in guest DT using cap-dawr1 machine
capability. Though, watchpoint on powerpc TCG guest is not supported
and thus 2nd DAWR is not enabled for TCG mode.
Signed-off-by: Ravi Bangoria
---
hw/ppc/spapr.c | 11 ++-
hw/ppc/spapr_caps.c | 32
s from v5.12-rc3)
[1] https://git.kernel.org/torvalds/c/bd1de1a0e6eff
Ravi Bangoria (3):
Linux headers: update from 5.12-rc3
ppc: Rename current DAWR macros and variables
ppc: Enable 2nd DAWR support on p10
hw/ppc/spapr.c| 11 ++-
hw/ppc/spapr_
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria
Hi David,
@@ -241,6 +241,31 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr,
/* 60: NM atomic, 62: RNG */
0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
};
+uint8_t pa_features_310[] = { 66, 0,
+/* 0: MMU|FPU|SLB|RUN|DABR|NX, 1:
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria
Update against Linux 5.12-rc3
Signed-off-by: Ravi Bangoria
---
include/standard-headers/drm/drm_fourcc.h | 23 ++-
include/standard-headers/linux/input.h | 2 +-
include/standard-headers/rdma/vmw_pvrdma-abi.h | 7 ++
linux-headers/asm-generic/unistd.h | 4
bit in guest DT using cap-dawr1 machine
capability.
Signed-off-by: Ravi Bangoria
---
hw/ppc/spapr.c | 34 ++
hw/ppc/spapr_caps.c | 32
include/hw/ppc/spapr.h | 6 +-
target/ppc/cpu.h
ges into separate patch. (Sync
headers from v5.12-rc3)
[1] https://git.kernel.org/torvalds/c/bd1de1a0e6eff
Ravi Bangoria (3):
Linux headers: update from 5.12-rc3
ppc: Rename current DAWR macros and variables
ppc: Enable 2nd DAWR support on p10
hw/ppc/spap
This series enables 2nd DAWR support on p10 qemu/kvm guest. This
series depends on kernel patches:
https://lore.kernel.org/linuxppc-dev/20200723102058.312282-1-ravi.bango...@linux.ibm.com
Patches apply fine on qemu/master branch (c8004fe6bbfc)
Ravi Bangoria (2):
ppc: Rename current DAWR macros
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros.
Signed-off-by: Ravi Bangoria
---
include/hw/ppc/spapr.h | 2 +-
linux-headers/asm-powerpc/kvm.h | 4 ++--
target/ppc/cpu.h| 4 ++--
target/ppc/translate_init.inc.c
so the guest kernel can support 2nd
DAWR.
Signed-off-by: Ravi Bangoria
---
hw/ppc/spapr.c | 33 +
include/hw/ppc/spapr.h | 1 +
linux-headers/asm-powerpc/kvm.h | 4
linux-headers/linux/kvm.h | 1 +
target/ppc/cpu.h
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