[CXL HDM DECODER PROGRAMMING] - Question: Does Qemu program HDM decoder register of the CXL endpoint?

2022-01-23 Thread Samarth Saxena
endpoint. Regards, [CadenceLogoRed185Regcopy1583174817new51584636989.png]<https://www.cadence.com/en_US/home.html> Samarth Saxena Sr Principal Software Engineer T: 911204308300 [UIcorrectsize1583179003.png]<https://www.cadence.com/en_US/

RE: [CXL volatile MEM] - Qemu command to turn on HMAT and NUMA fails with assertion

2021-08-15 Thread Samarth Saxena
Thanks Ben ! Does this command support volatile memory too? We are looking to run Volatile memory. Regards, Samarth -Original Message- From: Ben Widawsky Sent: Tuesday, August 10, 2021 11:43 PM To: Samarth Saxena Cc: Dr. David Alan Gilbert ; qemu-devel@nongnu.org Subject: Re: [CXL

RE: [CXL volatile MEM] - Qemu command to turn on HMAT and NUMA fails with assertion

2021-08-10 Thread Samarth Saxena
Thanks Dave, The Qemu version is qemu-6.0.50. I am trying to capture the stack and will place it ASAP. Regards, Samarth -Original Message- From: Dr. David Alan Gilbert Sent: Tuesday, August 10, 2021 4:58 PM To: Samarth Saxena ; ben.widaw...@intel.com Cc: qemu-devel@nongnu.org

[CXL volatile MEM] - Qemu command to turn on HMAT and NUMA fails with assertion

2021-08-09 Thread Samarth Saxena
/en_US/home.html> Samarth Saxena Sr Principal Software Engineer T: +911204308300 [UIcorrectsize1583179003.png]<https://www.cadence.com/en_US/home.html> [16066EmailSignatureFortune100Best2021White92x1271617625037.png]<https://www.cadence.com/en_US/home/company/careers.html>

[CXL Volatile MEM]: How to change the CXL persistent memory device to a volatile memory

2021-08-07 Thread Samarth Saxena
chassis=0,slot=0 -device cxl-type3,bus=rp0,memdev=cxl-mem1,id=cxl-pmem0,size=256M,lsa=cxl-lsa Regards, [CadenceLogoRed185Regcopy1583174817new51584636989.png]<https://www.cadence.com/en_US/home.html> Samarth Saxena Sr Principal Software Engineer T: +911204308300 [UIcorrectsize1583179003.png]&l