Hi,
I've been investigating why some of my code failed on qemu, but
succeeded in bochs and on real hardware. In particular, it turns out
that qemu would reset the FS/GS_BASE_MSR whenever I did iret from ring
0 to 3.
I traced it down to this bit of code (in target-i386/op_helper.c):
static
machine, violating this
constraint results in a #GP. From experience, qemu will not enforce
this alignment constraint.
Kind regards,
Vegard Nossum
On Nov 17, 2007 8:46 PM, Ben Taylor [EMAIL PROTECTED] wrote:
Vegard Nossum [EMAIL PROTECTED] wrote:
Hi,
I experience the following problem: Setting the trap flag (TF) of the
EFLAGS register correctly calls the debug exception DE. However, the
DR6 register does not have the single
