the firmware blobs whenever they fire
up their VMs.
Regards
Bibo, Mao
在 2023/3/30 22:06, WANG Xuerui 写道:
Hi,
Recently there are reportedly increased general interest in trying out
LoongArch on top of QEMU, among both end users and organizations; and the EDK2
firmware port is fully
0644
host/include/loongarch64/host/load-extract-al16-al8.h
create mode 100644 host/include/loongarch64/host/store-insert-al16.h
create mode 100644 util/cpuinfo-loongarch.c
Sorry for the delay; I've skimmed through the series and tested on
Loongson 3C5000L hardware, so
Reviewed-by: WANG Xuerui
Hi,
On 2023/8/7 17:45, Jiajie Chen wrote:
Add la132 as a loongarch32 cpu type and allow virt machine to be used
with la132 instead of la464.
Signed-off-by: Jiajie Chen
---
hw/loongarch/virt.c| 5 -
target/loongarch/cpu.c | 41 +
Hi,
On 2023/5/3 15:06, Richard Henderson wrote:
This should be true of all server class loongarch64.
And desktop-class (i.e. all Loongson-3 series).
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 6 ++
1 file changed, 6 insertions(+)
diff --git
Hi,
Recently there are reportedly increased general interest in trying out
LoongArch on top of QEMU, among both end users and organizations; and
the EDK2 firmware port is fully upstreamed since the stable202211
version, and a build suitable for QEMU is already possible with
From: WANG Xuerui
This patch adds a "loongarch64ow-linux-user" target and a
corresponding "qemu-loongarch64ow" binary, for supporting user-mode
emulation of old-world LoongArch applications in the wild.
Although the old-world LoongArch is already being (slowly) phased ou
On 1/23/23 18:47, Peter Maydell wrote:
On Mon, 23 Jan 2023 at 10:27, WANG Xuerui wrote:
From: WANG Xuerui
This patch adds a "loongarch64ow-linux-user" target and a
corresponding "qemu-loongarch64ow" binary, for supporting user-mode
emulation of old-world LoongArch appl
| 72 ++--
2 files changed, 33 insertions(+), 46 deletions(-)
I've tested this on my 3A5000 box and things seem to work, thanks.
Reviewed-by: WANG Xuerui
Henderson
---
tcg/loongarch64/tcg-target.c.inc | 165 +--
1 file changed, 115 insertions(+), 50 deletions(-)
Reviewed-by: WANG Xuerui
Thanks!
.
Reviewed-by: WANG Xuerui
.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
+
loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
target_arch += {'loongarch': loongarch_ss}
Apart from the minor suggestion above,
Reviewed-by: WANG Xuerui
Thanks!
Hi,
On 1/18/23 09:11, Richard Henderson wrote:
Based-on: 20230117231051.35-1-richard.hender...@linaro.org
("[PULL 00/22] tcg patch queue")
Includes:
* Disassembler from target/loongarch/.
* Improvements to movi by Rui Wang, with minor tweaks.
* Improvements to setcond.
*
t sk16)
+{
+tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
+}
+
/* Emits the `lu12i.w d, sj20` instruction. */
static void __attribute__((unused))
tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20)
Reviewed-by: WANG Xuerui
deletions(-)
Reviewed-by: WANG Xuerui
c | 35 +++-
1 file changed, 12 insertions(+), 23 deletions(-)
Reviewed-by: WANG Xuerui
Thanks!
... . ..... @rr_offs16
Reviewed-by: WANG Xuerui
Thanks for the catch!
, 0, 12);
if (offset != imm12) {
-intptr_t diff = offset - (uintptr_t)s->code_ptr;
+intptr_t diff = tcg_pcrel_diff(s, (void *)offset);
if (addr == TCG_REG_ZERO && diff == (int32_t)diff) {
imm12 = sextreg(diff, 0, 12);
Reviewed-by:
(-)
Reviewed-by: WANG Xuerui
Thanks!
On 12/15/22 23:51, Richard Henderson wrote:
On 12/14/22 23:50, Philippe Mathieu-Daudé wrote:
On 6/12/22 05:40, Richard Henderson wrote:
Regenerate with ADDU16I included.
Signed-off-by: Richard Henderson
---
tcg/loongarch64/tcg-insn-defs.c.inc | 10 +-
1 file changed, 9
On October 21, 2022 6:42:58 AM GMT+08:00, Richard Henderson
wrote:
>Fixed a minor nit:
>
>> +void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx,
>> + uintptr_t jmp_rw, uintptr_t addr)
>> +{
>> +tcg_insn_unit i1, i2;
>> +ptrdiff_t upper,
ne TCG_TARGET_HAS_mulsh_i641
-/* not defined -- call should be eliminated at compile time */
void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
#define TCG_TARGET_DEFAULT_MO (0)
With the nits addressed,
Reviewed-by: WANG Xuerui
single "B offset" plus a nop
will be used by "tb_target_set_jump_target".
Cc: Richard Henderson
Signed-off-by: Qi Hu
---
Changes since v3:
- Fix the offset check error which is pointed by WANG Xuerui.
- Use TMP0 instead of T0.
- Remove useless block due to direct jump
On 2022/10/12 19:34, WANG Xuerui wrote:
+ tcg_insn_unit i1, i2;
+
+ ptrdiff_t offset = addr - jmp_rx;
+
+ if (offset == sextreg(offset, 0, 28)) {
+ i1 = OPC_B | ((offset >> 18) & 0x3ff) | ((offset << 8) &
0x3fffc00);
Use encode_sd10k16_insn instead. No nee
Hi,
Thanks for the improvement! Some room for improvement though...
On 2022/10/12 17:13, Qi Hu wrote:
Similar to the ARM64, LoongArch has PC-relative instructions such as
PCADDU18I. These instructions can be used to support direct jump for
LoongArch. Additionally, if instruction "B offset" can
Hi,
On 2022/10/12 17:13, Qi Hu wrote:
Signed-off-by: Qi Hu
---
tcg/loongarch64/tcg-target.c.inc | 9 +
tcg/loongarch64/tcg-target.h | 4 ++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
emerging several packages within a Gentoo loong
stage3 chroot, emulated on amd64 with help of static qemu-loongarch64.
Reported-by: Andreas K. Hüttel
Signed-off-by: WANG Xuerui
---
linux-user/strace.list | 3 +++
linux-user/syscall.c | 9 +
2 files changed, 12 insertions(+)
diff
fore the fix, note the messed layout:
//
// f_type = 0x10009123683e
// f_bsize = 723302085239504896
// f_blocks = 168355058
// f_bfree = 2250817541779750912
// f_bavail = 1099229433104
```
Fixes: 1f63019632 ("linux-user: Add LoongArch syscall support")
Signed-off-by: WANG Xuerui
Cc: Song Ga
cks = 268435456
// f_bfree = 168406890
// f_bavail = 168355058
// Output before the fix, note the messed layout:
//
// f_type = 0x10009123683e
// f_bsize = 723302085239504896
// f_blocks = 168355058
// f_bfree = 2250817541779750912
// f_bavail = 1099229433104
```
Fixes: 1f63019632 ("linux-user: Add
excluding TARGET_ABI_MIPSN32 from various TARGET_ABI_BITS == 32 checks.
Closes: https://gitlab.com/qemu-project/qemu/-/issues/1238
Signed-off-by: WANG Xuerui
Cc: Philippe Mathieu-Daudé
Cc: Jiaxun Yang
Cc: Andreas K. Hüttel
Cc: Joshua Kinard
---
Note: I can't reproduce the crash with neither MIPS n
Hi,
On 2022/9/26 21:46, Alex Bennée wrote:
His blog confirms he is not affiliated with Longsoon.
It's spelled "Loongson" ;-)
Signed-off-by: Alex Bennée
Cc: WANG Xuerui
---
contrib/gitdm/group-map-individuals | 1 +
1 file changed, 1 insertion(+)
diff --git a/contrib/gitdm
On 2022/8/17 21:26, Richard Henderson wrote:
On 8/17/22 04:10, WANG Xuerui wrote:
From my own experiences, different use cases care about different
aspects of the CPU, and that IMO is an argument in favor of providing
both (high-fidelity models named after actual product model names
On 2022/8/17 16:11, gaosong wrote:
在 2022/8/17 上午10:36, chen huacai 写道:
Hi, Richard and Xuerui,
On Mon, Aug 15, 2022 at 4:54 AM Richard Henderson
wrote:
On 8/14/22 09:55, WANG Xuerui wrote:
From: WANG Xuerui
The only LoongArch CPU implemented is modeled after the Loongson
3A5000
implementation details yet.
Anyway, since the "new world" ecosystem isn't expected to mature and
attract lots of users very soon, it could be acceptable to just punt
this to 7.2, and issue incompatible change notices as usual. I
personally would be fine with either.
WANG Xuerui (4):
target
From: WANG Xuerui
Also add a header and indentation for each entry, while at it.
Signed-off-by: WANG Xuerui
---
target/loongarch/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index dc233ee209..4663539443 100644
From: WANG Xuerui
Much information is already outdated in its current form, not to mention
the hard-to-understand Chinglish. Rewrite to hopefully de-duplicate and
re-organize things, and reflect the latest status of LoongArch at
upstream.
Signed-off-by: WANG Xuerui
---
docs/system/loongarch
From: WANG Xuerui
The only LoongArch CPU implemented is modeled after the Loongson 3A5000,
but it is not the real thing, and at least one feature [1] is missing
that actually made the model incompatible with the real 3A5000. What's
more, the model is currently named "la464",
From: WANG Xuerui
Previously both "foo" and "foo-loongarch-cpu" are accepted for the -cpu
command-line option, the latter of which being excessively long and
redundant, hence unwanted. Remove support for consistency with other
targets and simpler code.
Signed-off-by: WANG
for loongarch64-linux-user
+TARGET_ARCH=loongarch64
+TARGET_BASE_ARCH=loongarch
Simple enough.
Reviewed-by: WANG Xuerui
helper_rdtime_d(CPULoongArchState *env)
{
uint64_t plv;
@@ -131,3 +142,4 @@ void helper_idle(CPULoongArchState *env)
cs->halted = 1;
do_raise_exception(env, EXCP_HLT, 0);
}
+#endif
The other parts seem to be good.
With the rdtime[lh].w bug fixed:
Reviewed-by: WANG Xuerui
On 2022/6/9 10:42, Song Gao wrote:
We should disable '__BITS_PER_LONG' at [1] before run gensyscalls.sh
[1] arch/loongarch/include/uapi/asm/bitsperlong.h
I'm not sure why this is necessary, is this for building on 32-bit where
__BITS_PER_LONG are (incorrectly) reflecting the host bitness?
.
Reviewed-by: WANG Xuerui
by the EF_MIPS_ABI2 (0x20) bit in the
e_flags field of the ELF header (a 4-byte value at offset 0x24 for
the here applicable ELFCLASS32).
See-also: ace3d65459
Signed-off-by: Andreas K. Hüttel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: WANG Xuerui
v5 changes are too different from v4
, or the n32 user emulation will
happily hand out memory ranges beyond the 31-bit limit and crash.
Confirmed to make the minimal reproducing example in the linked issue
behave.
Closes: https://gitlab.com/qemu-project/qemu/-/issues/939
Signed-off-by: WANG Xuerui
Cc: Philippe Mathieu-Daudé
Cc
-by: Andreas K. Hüttel
---
scripts/qemu-binfmt-conf.sh | 16
1 file changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: WANG Xuerui
I have tested this myself, but I'd prefer others to take a look too.
--
WANG Xuerui
xe...@gentoo.org
Gentoo Linux developer
PGP: 7C52 19E3
amily=mips
mipsn32_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08'
[1]:
https://github.com/bminor/binutils-gdb/blob/binutils-2_38/bfd/elfxx-mips.c#L16691-L16739
--
WANG Xuerui
xe...@gentoo.org
Gentoo Linux developer
PGP: 7C52 19E3 26A0 7311 3EA3 8806 C01F 7214 BC93 1414
, or the n32 user emulation will
happily hand out memory ranges beyond the 31-bit limit and crash.
Confirmed to make the minimal reproducing example in the linked issue
behave.
Closes: https://gitlab.com/qemu-project/qemu/-/issues/939
Signed-off-by: WANG Xuerui
Cc: Philippe Mathieu-Daudé
Cc
verified with my own-built Gentoo n32 sysroot. (Depending on
the exact ISA used, one may have to explicitly specify QEMU_CPU, which
is the case for my chroot.)
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/909
Signed-off-by: WANG Xuerui
Cc: Laurent Vivier
Cc: Philippe Mathieu-Daudé
Cc: Jiax
From: WANG Xuerui
Apparently we were left behind; just renaming MO_Q to MO_UQ is enough.
Fixes: fc313c64345453c7 ("exec/memop: Adding signedness to quad definitions")
Signed-off-by: WANG Xuerui
---
tcg/loongarch64/tcg-target.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Hi,
On 2022/1/12 18:17, gaosong wrote:
>
> Hi,
>
> On 2022/1/12 下午5:28, gaosong wrote:
+ data = FIELD_DP32(data, CPUCFG16, L3_IUUNIFY, 1);
+ data = FIELD_DP32(data, CPUCFG16, L3_IUINCL, 1);
+ env->cpucfg[16] = data;
+
+ data = 0;
+ data =
Hi,
On 1/10/22 20:34, gaosong wrote:
Hi,
On 2022/1/10 上午2:49, Richard Henderson wrote:
+static bool loongarch_cpu_has_work(CPUState *cs)
+{
+ return true;
Note: this is only applicable to CONFIG_USER_ONLY, and needs to be
changed in the following commits adding system emulation. To
Hi,
On 1/10/22 21:00, gaosong wrote:
Hi,
On 2022/1/9 下午5:25, WANG Xuerui wrote:
+
+const char * const fregnames[32] = {
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
+ "f8", "f9",
On 1/8/22 17:13, Xiaojuan Yang wrote:
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 8 ++
target/loongarch/cpu.h | 4 +
target/loongarch/disas.c
Hi Xiaojuan,
I've just finished reviewing the first part (target modifications) as
I'm not familiar with QEMU device emulation. You may have to revise the
target part carefully, and re-organize at the series level to accelerate
upstreaming though, as Richard pointed out in the other patch
On 1/8/22 17:13, Xiaojuan Yang wrote:
This patch introduce vmstate_loongarch_cpu
Again, pointless commit message.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 3 ++
target/loongarch/internals.h | 4 ++
On 1/8/22 17:13, Xiaojuan Yang wrote:
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 17 +
target/loongarch/helper.h| 12 +
On 1/8/22 17:14, Xiaojuan Yang wrote:
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
configs/targets/loongarch64-softmmu.mak | 1 +
gdb-xml/loongarch-base64.xml| 43 +++
gdb-xml/loongarch-fpu64.xml | 57 +++
target/loongarch/cpu.c
On 1/8/22 17:13, Xiaojuan Yang wrote:
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/constant_timer.c | 63 +++
target/loongarch/cpu.c| 9 +
target/loongarch/cpu.h| 10 +
target/loongarch/meson.build
GSList *list;
+
+list = object_class_get_list(TYPE_LOONGARCH_CPU, false);
+g_slist_foreach(list, loongarch_cpu_add_definition, _list);
+g_slist_free(list);
+
+return cpu_list;
+}
After removing the commit message body:
Reviewed-by: WANG Xuerui
On 1/8/22 17:13, Xiaojuan Yang wrote:
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h | 88 +
target/loongarch/csr_helper.c| 112 +
On 1/8/22 17:13, Xiaojuan Yang wrote:
This patch introduces basic TLB interfaces.
Same comment regarding commit messages adding little information.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 32
On 1/8/22 17:13, Xiaojuan Yang wrote:
1.Define All the CSR registers and its field.
2.Set some default csr values.
Unnecessary explanation; the code addition itself should be obvious
enough as to its intention.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
On 1/8/22 17:13, Xiaojuan Yang wrote:
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Okay, now I got that the word "core" actually meant "privileged"... so
please adjust all occurrences of that word.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h
n="-mv67 -O2 -static"}
+: ${cross_cc_loongarch64="loongarch64-unknown-linux-gnu-gcc"}
: ${cross_cc_hppa="hppa-linux-gnu-gcc"}
: ${cross_cc_i386="i686-linux-gnu-gcc"}
: ${cross_cc_cflags_i386="-m32"}
Reviewed-by: WANG Xuerui
On 1/6/22 17:41, Song Gao wrote:
This patch adds build loongarch-linux-user target support.
Chinglish... You may just say "target: Add the loongarch target_arch"
and remove this sentence.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by:
On 1/8/22 17:14, Xiaojuan Yang wrote:
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 1 +
target/loongarch/insn_trans/trans_extra.c.inc | 32 +++
target/loongarch/op_helper.c
On 1/6/22 17:41, Song Gao wrote:
We should disable '__BITS_PER_LONG' at [1] before run gensyscalls.sh
[1] arch/loongarch/include/uapi/asm/bitsperlong.h
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
On 1/8/22 17:13, Xiaojuan Yang wrote:
Mainly introduce how to run the softmmu
This sentence serves little purpose and is broken English, so it is
better removed.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/README | 25 +
1 file
On 1/6/22 17:41, Song Gao wrote:
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
linux-user/loongarch64/signal.c| 198 +
linux-user/loongarch64/target_signal.h | 13 ++
2 files changed, 211 insertions(+)
create mode 100644
On 1/8/22 17:14, Xiaojuan Yang wrote:
1.This patch Add loongarch interrupt and exception handle.
2.Rename the user excp to the exccode from the csr defintions.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
linux-user/loongarch64/cpu_loop.c | 8 +-
for loongson64-linux-user
"loongarch64-linux-user"?
+TARGET_ARCH=loongarch64
+TARGET_BASE_ARCH=loongarch
With that fixed:
Reviewed-by: WANG Xuerui
On 1/6/22 17:41, Song Gao wrote:
This patch gives an introduction to the LoongArch target.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
MAINTAINERS | 5 +++
target/loongarch/README | 77 +
2
On 1/6/22 17:41, Song Gao wrote:
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
configure | 3 +
linux-user/loongarch64/cpu_loop.c | 94 +
linux-user/loongarch64/target_cpu.h | 34 +++
On 1/6/22 17:41, Song Gao wrote:
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
linux-user/elfload.c| 53 +
linux-user/loongarch64/target_elf.h | 12 +++
2 files
e code in qemu_get_family to recognize "loongarch*" from
uname output as "loongarch" family (you can even understand it as I
missed this change in my TCG port series...), but otherwise this looks OK.
I can add the host CPU family recognition myself; for this patch,
Reviewed-by: WANG Xuerui
On 1/6/22 17:41, Song Gao wrote:
This patch adds support for disassembling via option '-d in_asm'.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
include/disas/dis-asm.h | 2 +
meson.build | 1 +
target/loongarch/disas.c | 612
On 1/6/22 17:41, Song Gao wrote:
This patch adds main translation routines and
basic functions for translation.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h| 6 ++
target/loongarch/op_helper.c | 21 +
On 1/6/22 17:41, Song Gao wrote:
This patch adds target state header, target definitions
and initialization routines.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/loongarch/cpu-param.h | 18 ++
Hi,
On 1/7/22 15:59, gaosong wrote:
Hi Richard.
On 2022/1/7 下午1:01, Richard Henderson wrote:
On 1/6/22 1:41 AM, Song Gao wrote:
Based-on:<20220106074740.1754661-1-gaos...@loongson.cn>
Hi all,
This series only support linux-user emulation.
More about LoongArch at:https://github.com/loongson/
Based-on: <20220104021543.396571-1-richard.hender...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off-by: WANG Xuerui
---
v2 -> v1:
- Dropped assert and added comment documenting reason to choose
bstrpick.d over andi for the masking operation
- Collected R-b tag
tcg/loonga
Based-on: <20220104021543.396571-1-richard.hender...@linaro.org>
Signed-off-by: WANG Xuerui
---
tcg/loongarch64/tcg-target.c.inc | 66 +++-
tcg/loongarch64/tcg-target.h | 2 -
2 files changed, 64 insertions(+), 4 deletions(-)
diff --git a/tcg/loongarch
witch (sel) {
> +switch ((insn >> 15) & 0b111) {
> case 0b010: /* stx.b */
> case 0b0101000: /* stx.h */
> case 0b011: /* stx.w */
the fix is obvious enough, doesn't harm readability, and solves a real
proble
Hi Richard,
On 1/4/22 10:15, Richard Henderson wrote:
Version 3 was way back in August:
https://lore.kernel.org/qemu-devel/20210818191920.390759-1-richard.hender...@linaro.org/
Quite a few of the patches in there have been merged, but not all.
Based-on:
Hi,
On 12/30/21 11:11, gaosong wrote:
HI,
On 2021/12/21 下午1:41, WANG Xuerui wrote:
+case 0b001110: /* indexed, atomic, bounds-checking memory operations */
+uint32_t sel = (insn >> 15) & 0b111;
+
+switch (sel) {
+case 0b010
Hi Richard,
On 12/22/21 05:25, Richard Henderson wrote:
Version 2: Dropped patch 31, the gitlab-ci change:
Found errors in your .gitlab-ci.yml:
'cross-loongarch64-system' job needs 'loongarch64-cross-container' job
but 'loongarch64-cross-container' is not in any previous stage
with the rest of LoongArch TCG
patches, I forgot to make the dependency to the container build job
optional, thus CI was passing in my own fork but broke upstream. Fixed
for a 2nd take, and I also took the chance to update base image versions
and such.)
Signed-off-by: WANG Xuerui
---
(Note to CI maintainers
Hi Alexandre,
On 12/17/21 17:38, Alexandre Ratchov wrote:
sndio is the native API used by OpenBSD, although it has been ported to
other *BSD's and Linux (packages for Ubuntu, Debian, Void, Arch, etc.).
Signed-off-by: Brad Smith
Signed-off-by: Alexandre Ratchov
---
Thank you for the reviews
settles down.
As a reference, the image takes about 25 minutes to rebuild on a
Threadripper 3990X system with Docker operating on HDD; YMMV but it
probably wouldn't become significantly shorter, as everything needs to
be built from source in our case.
Signed-off-by: WANG Xuerui
Reviewed
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
linux-user/host/loongarch64/host-signal.h | 87 +++
1 file changed, 87 insertions(+)
create mode 100644 linux-user/host/loongarch64/host-signal.h
diff --git a/linux-user/host
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 19 +++
1 file changed, 19 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 0b7d6458c5..92a30b791a 100644
--- a/tcg/loongarch64
rtunately.
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
configure | 5 +
meson.build | 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index 8ccfe51673..9724631609 100755
--- a/configure
+++ b/conf
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
.../host/loongarch64/safe-syscall.inc.S | 90 +++
1 file changed, 90 insertions(+)
create mode 100644 common-user/host/loongarch64/safe-syscall.inc.S
diff --git a/common-user/host/loongarch64/safe
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 92a30b791a..19bfc135f6 100644
--- a/tcg
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 68
1 file changed, 68 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index f67d5fa110..0b7d6458c5 100644
--- a/tcg
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 44
1 file changed, 44 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 19bfc135f6..9cd46c9be3 100644
--- a/tcg
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 131 +++
2 files changed, 132 insertions(+)
diff --git a/tcg/loongarch64/tcg-target
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 53
2 files changed, 54 insertions(+)
diff --git a/tcg/loongarch64/tcg-target-con
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 2 +
tcg/loongarch64/tcg-target.c.inc | 353 +++
2 files changed, 355 insertions(+)
diff --git a/tcg/loongarch64/tcg-target-con-set.h
b/tcg/loongarch64/tcg-target
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 69
2 files changed, 70 insertions(+)
diff --git a/tcg/loongarch64/tcg-target-con-set.h
b/tcg/loongarch64/tcg-target
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 42
tcg/loongarch64/tcg-target.h | 8 +++---
3 files changed, 47 insertions(+), 4 deletions(-)
diff --git
Signed-off-by: WANG Xuerui
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 91
tcg/loongarch64/tcg-target.h | 4 +-
3 files changed, 94 insertions
1 - 100 of 493 matches
Mail list logo
