not see a relevant code in
git master.
This may be a little late, but yes, please cc to Lluís to ask him
opinion.
Regards,
chenwj
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);
...
}
---
The address of pde and pte should be (guest) physical address, right?
If so, then target_ulong should be replaced with target_phys_addr_t.
The other clue is the type of ldq_phys's parameter is target_phys_addr_t.
Regards,
chenwj
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if you make it align.
Regards,
chenwj
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On Fri, Aug 17, 2012 at 03:57:55PM +0400, Max Filippov wrote:
On Fri, Aug 17, 2012 at 3:14 PM, 陳韋任 (Wei-Ren Chen)
che...@iis.sinica.edu.tw wrote:
On Thu, Aug 16, 2012 at 7:49 PM, Steven wangwangk...@gmail.com wrote:
[...]
I want to get the guest memory address in the instruction mov
d_reclen;
- chard_name[256]; /* We must not include limits.h! */
+ chard_name[257];/* We must not include limits.h! */
+ /* 257 = NAME_MAX + '\0' + d_type */
};
struct target_dirent64 {
--
ldv
--
Wei-Ren Chen (陳韋任
? In other words, (guest) ebx might not be the value you
saw here. This is just my opinion.
Regards,
chenwj
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code in the code cache, perhaps modifying tcg_out_tlb_load
to log value of addrlo (see comments above tcg_out_tlb_load).
HTH,
chenwj
[1] http://lists.gnu.org/archive/html/qemu-devel/2012-08/msg03060.html
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, something like
float VFP_helper(float a, float b) {
...
}
But I am wrong, it acutally does this, right?
float64 VFP_HELPER(sqrt, d)(float64 a, CPUARMState *env)
{
return float64_sqrt(a, env-vfp.fp_status);
}
And float64_sqrt is implemented in fpu/* .
Regards,
chenwj
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Wei-Ren Chen (陳韋任
, it'll call qemu_ld_helpers which are actually
functions synthesized by macro in files softmmu_*.h. Note that what I am
describing above is for QEMU system mode. Good luck!
HTH,
chenwj
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Tel
I would like to is there any function that could log the register
content of the guest machine, like info registers in the qemu
monitor mode.
Why not check how info registes be implemented in QEMU? ;)
I guess you just have to log env-regs or something like that.
Regards,
chenwj
--
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Hi Peter,
On Wed, Aug 08, 2012 at 09:05:18AM +0100, Peter Maydell wrote:
On 8 August 2012 08:38, 陳韋任 (Wei-Ren Chen) che...@iis.sinica.edu.tw wrote:
Just for research, we are studying if we can leave the guest page
table walk to underlying hardware rather than using software emulation
still haven't find a good way to know when
the guest OS is modifying guest page table entry.
Any idea is welcomed. Thanks.
Regards,
chenwj
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On Wed, Aug 08, 2012 at 09:05:18AM +0100, Peter Maydell wrote:
On 8 August 2012 08:38, 陳韋任 (Wei-Ren Chen) che...@iis.sinica.edu.tw wrote:
Just for research, we are studying if we can leave the guest page
table walk to underlying hardware rather than using software emulation
(like current
I propose we use gcc builtins. We get automatic architecture support,
and tuning for newer processors if the user so chooses.
http://gcc.gnu.org/onlinedocs/gcc-4.1.2/gcc/Atomic-Builtins.html
In May 2031 we can switch to C11 atomics.
Maybe 2013?
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Wei-Ren Chen (陳韋任
a little bit about what notdirty and watch_mem does? Googleing
doesn't help much...
Thanks!
Regards,
chenwj
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is my info.
QEMU 0.10 is really old. Have you ever considered using current
release?
Regards,
chenwj
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In any case, 3 settings clearly don't encompass the whole of
QEMU's coding style. The relevant bit of my .emacs tweaks about
20 different settings...
Just leave the coding style checking to checkpatch.pl, I think?
Regards,
chenwj
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it .
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should
I start counting.
Thanks.
Regards,
chenwj
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Tested-by: Wei-Ren Chen
On Fri, Jul 13, 2012 at 02:55:13AM -0400, Catalin Patulea wrote:
Not all tests pass, but at least they can be run using 'make test'.
To build individual tests:
$ cd $BUILD_PATH/tests/tcg
$ SRC_PATH=path/to/qemu make target
[snip]
Regards,
chenwj
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supports the ?: gcc extension this patch doesn't
move us any further in that direction.
Let's get AVOID_PASS_ARGV0 patch done. ;)
Regards,
chenwj
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Homepage
.
Regards,
chenwj
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/139/
The cost is quite high, ~800 cycles.
Regards,
chenwj
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Also, please line wrap your commit messages.
I didn't know the line wrap rule of commit message. Is the rule included
in checkpatch.pl? Let me check it.
I guess it's 80 char length rule?
Regards,
chenwj
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,
8aca521512a14c439624191bd0a891c52f91b401
Regards,
chenwj
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to review your patch before. :-)
Regards,
chenwj
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before.
Should be For example?
Regards,
chenwj
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folder/file(s) in the source code where I can add
code for profiling?
target-arm/* would be the place since you're running ARM binary, tcg/ARCH/*
could be another place depends on what machine you're running QEMU on.
Regards,
chenwj
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/* OpenRISC pic handler */
static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
{
OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
^^
Do we need casting before assigning opaque to cpu?
Regards,
chenwj
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Computer
Bluestacks uses to run ARM apps. Perform a binary analysis,
and you will see it is in fact Qemu.
That might give you a hint. ;)
Regards,
chenwj
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Tel:886-2-2788-3799 #1667
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-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
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Hi Liu,
You might find this thread interesting,
http://lists.gnu.org/archive/html/qemu-devel/2012-06/msg04351.html
Regards,
chenwj
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not be trusted (like cloud computing), but who knows the future?
Is it proper to print such information to monitor? by using monitor_printf().
What if user doesn't open a monitor?
Regards,
chenwj
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Computer Systems Lab, Institute of Information Science,
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of the (usually 32-bit truncated) address. Passing in g2h(address) makes the
guest process a lot happier.
Passing g2h or h2g? From the context and code, I think h2g should make more
sense.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute
?
When guest VM (with KVM enabled) fetch instructions from its memory,
does it also have the same issue?
Regards,
chenwj
[1] http://www.mail-archive.com/qemu-devel@nongnu.org/msg117254.html
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+ * OpenRISC simulator for use as an ISS.
^^^
Shoudld be IIS?
Regards,
chenwj
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Homepage: http
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THRESHOLD 50
if (t1 THRESHOLD) { ... }
Regards,
chenwj
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that is confusing it, but yes, just ignore the error.
Should this be added to http://wiki.qemu.org/Contribute/SubmitAPatch
as an example? I remember someone else had the same problem before.
Regards,
chenwj
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Academia
CC'ed to the mailing list.
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---BeginMessage---
On 06/19/2012 11:49 AM, 陳韋任 (Wei-Ren Chen) wrote:
Mind me CC
On Tue, Jun 19, 2012 at 01:08:47PM +0100, Peter Maydell wrote:
On 19 June 2012 12:54, 陳韋任 (Wei-Ren Chen) che...@iis.sinica.edu.tw wrote:
If you only have one CPU then using first_cpu-some_field1 should be
almost as easy. :)
I am afraid first_cpu (CPUArchState) is got poisoned, too
Does this pass scripts/checkpatch.pl? These should become
if (cop != 0) {
goto unrecognized;
}
Thanks for pointing it out, and sorry for that.
I will correct it in next version.
You can run scripts/checkpatch.pl before you submit the patch.
Regards,
chenwj
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into the TLB (IIUC). I don't
see much differences here.
Regards,
chenwj
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-some_field1
// print env-some_field2
}
---
If we can access env in vl.c directly, it would make the task easier.
Regards,
chenwj
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use in this
function)
---
Any thought on what I am missing? Thanks.
Regards,
chenwj
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: call MMU helper
(6) ... (next code)
Do you mean we directly call MMU helper ing step 2?
Regards,
chenwj
[1] http://www.mail-archive.com/qemu-devel@nongnu.org/msg91294.html
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Tel:886
Yes.
But how to do that. I can't find the upload location or someone who
receives the image.
Perhaps someone can open a wiki account for you, so that you can upload
an image.
Regards,
chenwj
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;
but it's not very convenient if we have many field of CPUState want to access.
Is
there a better way to do so? Thanks!
Regards,
chenwj
[1]
http://stackoverflow.com/questions/9461625/gcc-error-message-attempt-to-use-poisoned-target-i386
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Hi Li Zhang,
Perhaps you miss [PATCH v3 1/2] in the subject?
Regards,
chenwj
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this go to libvirt mailing list?
http://libvirt.org/contact.html
Regards,
chenwj
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void do_ldst_ir(CPUUniCore32State *env, DisasContext *s, uint32_t
insn)
{
-unsigned int i;
+unsigned int mmuindex;
I would suggest you to rename it to mmu_idx or something like that. :)
Regards,
chenwj
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linux kernel
boot and busybox run in initramfs.
Do you plan put disk image on http://wiki.qemu.org/Testing ?
Regards,
chenwj
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fd? */
}
---
I think KVM_CREATE_VCPU should return VCPU fd, right? AFAIK, in KVM
world, kvm_fd usually means the fd we get after opening /dev/kvm.
Just want to make sure I understand the code correcly. Thanks.
Regards,
chenwj
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Computer Systems Lab, Institute of Information
. Don't know rename it or add a comment to indicate
it's a VCPU fd is a good idea. ;)
Regards,
chenwj
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On Wed, Jun 13, 2012 at 12:43:28PM +0200, Laurent Desnogues wrote:
On Wed, Jun 13, 2012 at 5:14 AM, 陳韋任 (Wei-Ren Chen)
che...@iis.sinica.edu.tw wrote:
Hi all,
I suspect that guest memory access (qemu_ld/qemu_st) account for the major
of
time spent in system mode. I would like to know
Unfortunately, I had the bad idea of rebasing all my series on top of the
latest
makefile changes, and I'll have to go through each patch to check it's still
working (I'm sure some of them broke).
Need some help? :)
Regards,
chenwj
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the others?
Regards,
chenwj
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/tcg-target.c? Or there is a better way to know
how much time QEMU spend on handling guest memory access?
Any suggestion/comment is welcomed. Thanks!
Regards,
chenwj
[1] https://perf.wiki.kernel.org/index.php/Main_Page
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||
tb-flags != flags)) {
tb = tb_find_slow(env, pc, cs_base, flags);
}
---
If current flags (flags) is not match the flags while translating the tb
(tb-flags), then the translated tb will be discarded.
Regards,
chenwj
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Computer Systems Lab, Institute
I don't know why, with kvm it say:
KVM not supported for this target
No accelerator found!
Unless you're running on ARM with a patched kernel you can't get KVM for
ARM guests. That's no error.
Linux/ARM starts to support kvm?
Regards,
chenwj
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Computer Systems
exceptions via
an out-of-line handler.
^^^
I guess you mean helper function?
Regards,
chenwj
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(register state), shadow memory(from?pmemsave) and shadow
.img file (disk).
Why doesn't the savevm command provide the snapshotting you need?
It sounds like you're trying to do VM snapshots yourself.
Does `savevm` and reply do the same thing? :)
Regards,
chenwj
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://en.wikipedia.org/wiki/Function_prologue
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on QEMU flush the entire tlb. So it could flush
particular tlb entry in tlb_flush_entry?
Regards,
chenwj
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On Wed, May 30, 2012 at 09:53:20AM +0200, Alexander Graf wrote:
Mind to elaborate (in the patch description maybe) why we need a CPU specific
TLB flush callback that merely calls the globally visible tlb_flush? :)
For future extension? ;)
Regards,
chenwj
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helper_invlpg function in the target-i386/op_helper.c to see
how it is implemented.
FWIW. Currently, QEMU just flush the entire tlb (env-tlb_table).
Regards,
chenwj
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Tel:886-2-2788-3799 #1667
On Tue, May 29, 2012 at 12:25:51AM -0400, Yue Chen wrote:
Do you know how to use that? When I use log(-d) exec and log(-d) pcall,
the
qemu.log is always empty.
`qemu -d in_asm,exec` will do.
Regards,
chenwj
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Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science
the guest CR3, we need to trap into the kernel as kvm does.
I read stuff about Intel NPT again. Is gCR3 a field of VMCS, then loaded into
CR3 at runtime? Thanks!
Regards,
chenwj
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. And a
much sweeter one (KVM makes it pretty fast :) ).
Running it in QEMU/KVM? If we want to run a ARM image, we can't use KVM,
right?
Regards,
chenwj
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Tel:886-2-2788-3799 #1667
Homepage
not available
anymore. User document now is hosted on http://qemu.weilnetz.de/qemu-doc.html;.
Regards,
chenwj
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Tel:886-2-2788-3799 #1667
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On Wed, May 30, 2012 at 04:54:26AM +0100, Peter Maydell wrote:
On 30 May 2012 04:51, 陳韋任 (Wei-Ren Chen) che...@iis.sinica.edu.tw wrote:
diff --git a/hw/bt-sdp.c b/hw/bt-sdp.c
index 3e390ab..c0431d1 100644
--- a/hw/bt-sdp.c
+++ b/hw/bt-sdp.c
@@ -834,7 +834,7 @@ SERVICE(hid
O.K., the first thing you need to know is llvm-gcc uses GCC as it's
frontend to parse your source code, and uses LLVM as it's backend to
generate binary. In order to support global register correctly, not only
the frontend has to be able to recognize the global register syntax, but
also the LLVM
You can try to configure QEMU to use TCI (interpreter) rather then TCG
(jitter). IIRC, TCI doesn't use global register.
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https://bugs.launchpad.net/bugs/996303
Title:
does not work
`../qemu/configure --enable-tcg-interpreter` will use TCI not TCG. You
can use `configure --help` to see what options it provides.
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https://bugs.launchpad.net/bugs/996303
Title:
does
You can send launchpad a bug report talking about this. ;-)
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https://bugs.launchpad.net/bugs/996303
Title:
does not work with clang
Status in QEMU:
New
Bug description:
Frozen
So O.K. to close? :-)
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https://bugs.launchpad.net/bugs/996303
Title:
does not work with clang
Status in QEMU:
New
Bug description:
Frozen on start.
CPU: dual-core 64-bit
IIRC, clang doesn't support global register yet. Do you configure QEMU
to use TCI? What's the version of Clang and QEMU you're using?
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https://bugs.launchpad.net/bugs/996303
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