From: Zhuocheng Ding
After i386 supports module level, it's time to add the test for module
level's parsing.
Signed-off-by: Zhuocheng Ding
Co-developed-by: Zhao Liu
Signed-off-by: Zhao Liu
Reviewed-by: Yanan Wang
Tested-by: Babu Moger
Tested-by: Yongwei Ma
Acked-by: Michael S. Tsirkin
be also generated from cpu topology, and before i386
supports "clusters" in smp, the default "clusters per die" is only 1,
thus the module_id generated in this way is 0, so that it will not
conflict with the module_id generated by APIC ID.
Signed-off-by: Zhuocheng Ding
Co-de
From: Zhao Liu
For i-cache and d-cache, current QEMU hardcodes the maximum IDs for CPUs
sharing cache (CPUID.04H.00H:EAX[bits 25:14] and CPUID.04H.01H:EAX[bits
25:14]) to 0, and this means i-cache and d-cache are shared in the SMT
level.
This is correct if there's single thread per core
IC ID, which can be calculated by
"apicid_bitwidth_for_count(topo_info->modules_per_die)", is always 0
for now, so we can directly add APIC ID related helpers to support
module level parsing.
In addition, update topology structure in test-x86-topo.c.
Signed-off-by: Zhuocheng Ding
Co-developed-by
From: Zhao Liu
Currently, by default, the cache topology is encoded as:
1. i/d cache is shared in one core.
2. L2 cache is shared in one core.
3. L3 cache is shared in one die.
This default general setting has caused a misunderstanding, that is, the
cache topology is completely equated
From: Zhao Liu
Refer to the fixes of cache_info_passthrough ([1], [2]) and SDM, the
CPUID.04H:EAX[bits 25:14] and CPUID.04H:EAX[bits 31:26] should use the
nearest power-of-2 integer.
The nearest power-of-2 integer can be calculated by pow2ceil() or by
using APIC ID offset (like L3 topology
From: Zhao Liu
Hi list,
This is the our v7 patch series, rebased on the master branch at the
commit d328fef93ae7 ("Merge tag 'pull-20231230' of
https://gitlab.com/rth7680/qemu into staging").
No more change since v6 [1] exclude the comment nit update.
Welcome your comments!
PS: Si
le level
of x86.
[1]: 864c3b5c32f0 ("hw/core/machine: Introduce CPU cluster topology support")
[2]: Yanan's comment about "cluster",
https://lists.gnu.org/archive/html/qemu-devel/2023-02/msg04051.html
[3]: SDM, vol.3, ch.9, 9.9.1 Hierarchical Mapping of Shared Resources.
From: Zhao Liu
At present, the subleaf 0x02 of CPUID[0x1F] is bound to the "die" level.
In fact, the specific topology level exposed in 0x1F depends on the
platform's support for extension levels (module, tile and die).
To help expose "module" level in 0x1F, decouple
From: Zhao Liu
CPUID[0xB] defines SMT, Core and Invalid types, and this leaf is shared
by Intel and AMD CPUs.
But for extended topology levels, Intel CPU (in CPUID[0x1F]) and AMD CPU
(in CPUID[0x8026]) have the different definitions with different
enumeration values.
Though CPUID
From: Zhao Liu
In cpu_x86_cpuid(), there are many variables in representing the cpu
topology, e.g., topo_info, cs->nr_cores/cs->nr_threads.
Since the names of cs->nr_cores/cs->nr_threads does not accurately
represent its meaning, the use of cs->nr_cores/cs->nr_threads is
From: Zhao Liu
Add two spelling check options (--codespell and --codespellfile) to
enhance spelling check through dictionary, which copied the Linux
kernel's implementation in checkpatch.pl.
This check uses the dictionary at "/usr/share/codespell/dictionary.txt"
-
> 1 file changed, 18 insertions(+), 18 deletions(-)
Reviewed-by: Zhao Liu
le.rst | 2 +-
> docs/system/devices/can.rst | 6 +++---
> 3 files changed, 5 insertions(+), 5 deletions(-)
>
Reviewed-by: Zhao Liu
V-ES support unavailable
> qemu-system-x86_64: failed to initialize kvm: Operation not permitted
>
> While at it, also fix two more locations.
>
> Reviewed-by: Nikunj A Dadhania
> Signed-off-by: Srikanth Aithal
> ---
> target/i386/sev.c | 9 +----
> 1 file changed,
Hi Samuel,
On Wed, Jan 03, 2024 at 03:36:59PM +0100, Samuel Tardieu wrote:
> Date: Wed, 03 Jan 2024 15:36:59 +0100
> From: Samuel Tardieu
> Subject: Re: [PATCH v2] scripts/checkpatch: Support codespell checking
>
> > + --codespellUse the codespell dictionary for
> >
the only software
Eduardo wanted to describe is libvirt.
Do you know of any other software that has the similar timeout mechanism?
If there is no other software, the description of "trigger timeouts on
software ..." in the comment could be deleted as well.
Otherwis
rror message:
>
> qemu-system-x86_64: -chardev spice,id=foo: Parameter 'driver' expects an
> abstract device type
>
> while in fact the meaning is in reverse, -chardev expects
> a non-abstract device type.
>
> Signed-off-by: Michael Tokarev
> Fixes: 777357d758d9 &q
On Tue, Nov 28, 2023 at 11:02:00AM +0100, Philippe Mathieu-Daudé wrote:
> Date: Tue, 28 Nov 2023 11:02:00 +0100
> From: Philippe Mathieu-Daudé
> Subject: Re: [PATCH 2/2] hw/cpu/cluster: Cleanup unused included header in
> cluster.c
>
> On 27/11/23 15:56, Zhao Liu wrote:
Hi maintainers,
Just a kindly ping for review. :-)
Thanks,
Zhao
On Fri, Dec 15, 2023 at 06:34:48PM +0800, Zhao Liu wrote:
> Date: Fri, 15 Dec 2023 18:34:48 +0800
> From: Zhao Liu
> Subject: [PATCH v2] scripts/checkpatch: Support codespell checking
> X-Mailer: git-send-email 2.34
Hi Philippe,
On Tue, Dec 26, 2023 at 04:04:41PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Tue, 26 Dec 2023 16:04:41 +0100
> From: Philippe Mathieu-Daudé
> Subject: [PATCH] docs/devel: Document conventional file prefixes and
> suffixes
> X-Mailer: git-send-email 2.41.0
>
> Some header and
rved bit when FRED
> is exposed to guests, otherwise it is still a reserved bit.
>
> Tested-by: Shan Kang
> Signed-off-by: Xin Li
> ---
Reviewed-by: Zhao Liu
> target/i386/cpu.h | 12 +++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/target/i386
On Fri, Dec 22, 2023 at 03:34:02PM +0800, Zhao Liu wrote:
> Date: Fri, 22 Dec 2023 15:34:02 +0800
> From: Zhao Liu
> Subject: Re: [PATCH v3A 1/6] target/i386: add support for FRED in CPUID
> enumeration
>
> On Thu, Dec 21, 2023 at 07:03:36PM -0800, Xin Li wrote:
> > Date
flag CPUID.(EAX=7,ECX=1):EAX[18] enumerates LKGS, and
> the CPUID feature flag CPUID.(EAX=7,ECX=1):EAX[19] enumerates WRMSRNS.
>
> Add CPUID definitions for FRED/LKGS/WRMSRNS, and expose them to KVM guests.
>
> Because FRED relies on LKGS and WRMSRNS, add that to feature dependency
igned-off-by: Richard Henderson
> ---
Reviewed-by: Zhao Liu
> cpu-target.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/cpu-target.c b/cpu-target.c
> index 508013e23d..430dc53566 100644
> --- a/cpu-target.c
> +++ b/cpu-target.c
> @
On Thu, Dec 21, 2023 at 02:16:12PM +1100, Richard Henderson wrote:
> Date: Thu, 21 Dec 2023 14:16:12 +1100
> From: Richard Henderson
> Subject: [PATCH v2 31/71] hw/i386: Constify VMState
> X-Mailer: git-send-email 2.34.1
>
> Signed-off-by: Richard Henderson
> ---
Reviewed
n
> ---
Reviewed-by: Zhao Liu
> target/i386/machine.c | 128 +-
> 1 file changed, 64 insertions(+), 64 deletions(-)
>
> diff --git a/target/i386/machine.c b/target/i386/machine.c
> index a1041ef828..c3ae320814 100644
> --- a/target/i386/
On Thu, Dec 21, 2023 at 04:29:31PM -0500, Eric Farman wrote:
> Date: Thu, 21 Dec 2023 16:29:31 -0500
> From: Eric Farman
> Subject: Re: [PATCH 0/2] hw/s390x/ccw: Cleanup basename() and dirname()
>
> On Fri, 2023-12-22 at 01:19 +0800, Zhao Liu wrote:
> > From: Zhao Li
From: Zhao Liu
g_path_get_basename() is a portable utility function that has the
advantage of not modifing the string argument, so it should be
preferred over basename().
And also to avoid potential compile breakage with the Musl C library
similar to [1], replace basename
From: Zhao Liu
As commit 3e015d815b3f ("use g_path_get_basename instead of basename")
said, g_path_get_basename() and g_path_get_dirname() should be preferred
over basename() and dirname(), since g_path_get_basename() and
g_path_get_dirname() are portable utility functions
From: Zhao Liu
As commit 3e015d815b3f ("use g_path_get_basename instead of basename")
said, g_path_get_dirname() should be preferred over dirname() since
the former is a portable utility function that has the advantage of not
modifing the string argument.
Repla
Hi Markus,
On Wed, Dec 20, 2023 at 08:53:21AM +0100, Markus Armbruster wrote:
> Date: Wed, 20 Dec 2023 08:53:21 +0100
> From: Markus Armbruster
> Subject: Re: [PATCH v2] qdev: Report an error for machine without
> HotplugHandler
>
> Akihiko Odaki writes:
>
> > On 2023/12/18 23:02, Markus
j
> Signed-off-by: Cédric Le Goater
> ---
Reviewed-by: Zhao Liu
Just one additional question, I understand that QEMU should replace all
basename() with g_path_get_basename(), right?
I find hw/s390x/s390-ccw.c also uses basename(). Maybe I can clean it up
to avoid potentially similar issue.
From: Zhao Liu
Add two spelling check options (--codespell and --codespellfile) to
enhance spelling check through dictionary, which copied the Linux
kernel's implementation in checkpatch.pl.
This check uses the dictionary at "/usr/share/codespell/dictionary.txt"
reset" is only possible with system emulation.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Reviewed-by: Warner Losh
> Reviewed-by: Song Gao
> ---
Reviewed-by: Zhao Liu
> target/i386/cpu.c | 2 +-
> target/loongarch/cpu.c | 2 ++
> 2 files changed, 3 insertions(+),
On Thu, Dec 14, 2023 at 11:53:18PM +0100, Samuel Tardieu wrote:
> Date: Thu, 14 Dec 2023 23:53:18 +0100
> From: Samuel Tardieu
> Subject: [PATCH] docs: fix typo
> X-Mailer: git-send-email 2.42.0
>
> Signed-off-by: Samuel Tardieu
> ---
Reviewed-by: Zhao Liu
> doc
* If true present the old cache topology information
> */
> bool legacy_cache;
> +bool legacy_multi_node;
This property deserves a comment, as does legacy_cache above.
>
> /* Compatibility bits for old machine types: */
> bool enable_cpuid_0xb;
> --
> 2.34.1
>
Just the above nit, otherwise,
Reviewed-by: Zhao Liu
Hi Philippe,
On Mon, Dec 11, 2023 at 08:04:28PM +0100, Philippe Mathieu-Daudé wrote:
> Date: Mon, 11 Dec 2023 20:04:28 +0100
> From: Philippe Mathieu-Daudé
> Subject: Re: QEMU developers fortnightly conference call for agenda for
> 2023-12-12
>
> Hi Zhao,
>
[snip]
>
> FYI I have your
conference? Or if time is too tight,
could we have a chance to discuss this topic at next year's conference?
[1]:
https://lore.kernel.org/qemu-devel/20231130144203.2307629-1-zhao1@linux.intel.com/
Thanks and Best Regards,
Zhao
On Mon, Dec 11, 2023 at 09:29:24PM +0800, Zhao Liu wrote:
> Date: Mon,
Hi maintainers,
Just a ping. Welcome your feedbacks!
We wonder if the current RFC is an appropriate attempt towards the final
hybrid topology.
Thanks,
Zhao
On Thu, Nov 30, 2023 at 10:41:22PM +0800, Zhao Liu wrote:
> Date: Thu, 30 Nov 2023 22:41:22 +0800
> From: Zhao Liu
> Subject: [
Hi Juan,
On Tue, Dec 05, 2023 at 01:47:52PM +, Juan Quintela wrote:
> Date: Tue, 05 Dec 2023 13:47:52 +
> From: Juan Quintela
> Subject: QEMU developers fortnightly conference call for agenda for
> 2023-12-12
>
> Hi If you have any topics for the last qemu conference call of the year,
Hi Salil,
On Mon, Nov 13, 2023 at 08:12:31PM +, Salil Mehta via wrote:
> Date: Mon, 13 Nov 2023 20:12:31 +
> From: Salil Mehta via
> Subject: [PATCH V7 3/8] hw/acpi: Update ACPI GED framework to support vCPU
> Hotplug
> X-Mailer: git-send-email 2.8.3
>
[snip]
> @@ -400,6 +411,12 @@
warning:
> warning: host doesn't support requested feature: MSR(10AH).taa-no
> [bit 8]
>
> just don't include TAA_NO in SierraForest CPU model.
>
> Currently LAM and LASS are not enabled in KVM mainline yet, will add
> them after merged.
>
> Signed-off-by: Tao Su
> ---
Reviewed-by: Zhao Liu
Hi maintainers,
Just a friendly ping. Do I need to refresh another version?
Thanks,
Zhao
On Fri, Nov 17, 2023 at 03:50:50PM +0800, Zhao Liu wrote:
> Date: Fri, 17 Nov 2023 15:50:50 +0800
> From: Zhao Liu
> Subject: [PATCH v6 00/16] Support smp.clusters for x86 in QEMU
> X-Mail
Hi Thomas,
On Mon, Dec 04, 2023 at 10:07:12AM +0100, Thomas Huth wrote:
> Date: Mon, 4 Dec 2023 10:07:12 +0100
> From: Thomas Huth
> Subject: Re: [RFC 1/3] scripts/checkpatch: Check common spelling be default
>
> On 04/12/2023 09.29, Zhao Liu wrote:
> > From: Zhao Liu
&
From: Zhao Liu
Add the check for common spelling mistakes for QEMU, which stole
selling.txt from Linux kernel and referenced the Linux kernel's
implementation in checkpatch.pl.
This check covers common spelling mistakes, and can be updated/
extended as per QEMU's realities.
Signed-off-by: Zhao
From: Zhao Liu
Select the typos in commits from 7.0.0 to 8.2.0-rc2 that were typed more
than three times to add to the default dictionary selling.txt.
The typos were counted by (Referenced Kees' command in Linux kernel's
commit 66b47b4a9dad00):
$ git log --format='%H' v7.0.0..v8.2.0-rc2
From: Zhao Liu
Add two spelling check options (--codespell and --codespellfile) to
enhance spelling check through dictionary, which copied the Linux
kernel's implementation in checkpatch.pl.
Signed-off-by: Zhao Liu
---
scripts/checkpatch.pl | 66 ++-
1
From: Zhao Liu
Inspired by Linux's spelling check, QEMU could also add the similar
support in checkpatch.pl to help ease the burden on trivial's
maintainers ;-).
QEMU's checkpatch.pl is mainly based on an older version of Linux's
checkpatch.pl, so this RFC ports Linux's codespell-related
From: Zhao Liu
Maintain the cores queue at cpu-slot to facilitate direct traversal
of all cores.
Signed-off-by: Zhao Liu
---
hw/core/cpu-slot.c | 43 ++
include/hw/core/cpu-slot.h | 9
include/hw/cpu/core.h | 2 ++
3 files changed
From: Zhao Liu
For QOM topology, these 2 helpers are needed for hotplugged CPU to
verify its topology sub indexes and then search its parent core.
Signed-off-by: Zhao Liu
---
hw/i386/x86.c | 173 --
1 file changed, 96 insertions(+), 77 deletions
From: Zhao Liu
QOM topology needs to search parent cpu-core for hotplugged CPU to
create topology child<> property in qdev_set_id().
This process is before x86_cpu_pre_plug(), thus place 2 helpers
x86_cpu_assign_apic_id() and x86_cpu_assign_topo_id() in
x86_cpu_search_parent_pre_plug() t
From: Zhao Liu
Support user-child for topology devices.
This will affect these 2 aspects:
1. For the basic topology device (with DEVICE_CATEGORY_CPU_DEF
category), user could specify "parent" to build the topology
relationship from cli. And cpu-slot will collect all topology
From: Zhao Liu
Update the comment to make the cpu-cluster description more general for
both TCG and accel cases.
Signed-off-by: Zhao Liu
---
hw/cpu/cluster.c | 2 +-
include/hw/cpu/cluster.h | 20 +++-
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/hw
From: Zhao Liu
For QOM topology, CPU should be inserted under its parent core.
Extend x86_cpu_new() to allow caller to specify topology parent.
Signed-off-by: Zhao Liu
---
hw/i386/x86.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/hw/i386/x86.c b/hw
From: Zhao Liu
Set MachineClass.smp_props.possible_cpus_qom_granu and
TopoClass.search_parent_pre_plug for i386.
So far, the i386 topology is based on the QOM topology.
Signed-off-by: Zhao Liu
---
hw/i386/x86.c | 1 +
target/i386/cpu.c | 4
2 files changed, 5 insertions(+)
diff
From: Zhao Liu
Convert cpu-core to topology device then user could create core level
topology from cli and later the cpu-cores could be added into topology
tree.
In addition, mark the common cpu-core as DEVICE_CATEGORY_CPU_DEF
category to indicate it belongs to the basic CPU definition
From: Zhao Liu
Abstract the root of topology tree as a special topology device
"cpu-slot".
Signed-off-by: Zhao Liu
---
MAINTAINERS| 2 ++
hw/core/cpu-slot.c | 48 ++
hw/core/meson.build| 1 +
include/hw/core/cpu-s
From: Zhao Liu
QOM topology allows user to create topology tree from cli without -smp,
in this case, validate the topology tree to meet the smp requirement.
Currently, for compatibility with MachineState.smp, initialize
MachineState.smp from topology tree in this case.
Signed-off-by: Zhao Liu
From: Zhao Liu
Abstract drawer level as a topology device "cpu-drawer" to allow user to
create drawer level topology from cli and later the cpu-drawers could be
added into topology tree.
In addition, mark the cpu-drawer as DEVICE_CATEGORY_CPU_DEF category to
indicate it belongs to the
From: Zhao Liu
After i386 supports QOM topology, drop original topology logic.
Signed-off-by: Zhao Liu
---
hw/i386/x86.c | 52 +++
1 file changed, 11 insertions(+), 41 deletions(-)
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 99f6c502de43
From: Zhao Liu
Implement CPUTopoClass.check_topo_child() in cpu-slot to be compatible
with the limitations of the current smp topology.
Signed-off-by: Zhao Liu
---
hw/core/cpu-slot.c | 37 +
hw/core/cpu-topo.c | 2 +-
include/hw/core/cpu
From: Zhao Liu
Convert CPU to topology device then its parent topology devices could
count the number of CPUs when new CPUs are added into topology tree.
Note since CPUs are created from *_init_cpus() in MachineClass.init() or
added from hotplug way, it depends on board initialization. Thus CPU
From: Zhao Liu
Topology devices are used to define CPUs and need to be created and
realized before the board initialization.
Use this new catogory to identify such special devices.
Signed-off-by: Zhao Liu
---
include/hw/qdev-core.h | 1 +
system/qdev-monitor.c | 1 +
2 files changed, 2
From: Zhao Liu
Abstract die level as a topology device "cpu-die" to allow user to
create die level topology from cli and later the cpu-dies could be added
into topology tree.
In addition, mark the cpu-die as DEVICE_CATEGORY_CPU_DEF category to
indicate it belongs to the basic CPU
From: Zhao Liu
For the architecture supports QOM topology (the field
MachineClass.possible_cpus_qom_granu is set), implement smp QOM topology
tree from MachineState.smp.
Signed-off-by: Zhao Liu
---
hw/core/cpu-slot.c | 217 +
hw/core/machine-smp.c
From: Zhao Liu
x86_cpu_new() is only invoked in x86.c. Declear it as static in x86.c.
Signed-off-by: Zhao Liu
---
hw/i386/x86.c | 3 ++-
include/hw/i386/x86.h | 2 --
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index b3d054889bba
From: Zhao Liu
Topology relationship is based on child<> property, therefore introduce
a new user-child interface to help bus-less devices create child<>
property from cli.
User-child interface works in qdev_set_id(), where the child<> property
is created for cli devices.
Wi
From: Zhao Liu
When a new topology device is inserted into the topology tree,
its'parents (including non-direct parent) need to update topology
information.
Add the virtual method to help parents on topology tree update
topology information statistics.
Signed-off-by: Zhao Liu
---
hw/core/cpu
From: Zhao Liu
Add a cpu-slot in machine as the root of topology tree to maintain the
QOM topology.
Signed-off-by: Zhao Liu
---
hw/core/cpu-slot.c | 31 +++
include/hw/boards.h| 2 ++
include/hw/core/cpu-slot.h | 7 +++
system/vl.c
From: Zhao Liu
Currenltly cpu-cluster is used in TCG case to organize CPUs with the
same type.
Wrap 2 things into TCG specific areas:
1. cluster-id:
The cluster-id in TCG case is global, since no higher topology
container above cluster. To simplify the logic of cluster topology
From: Zhao Liu
Abstract socket level as a topology device "cpu-socket" to allow user to
create socket level topology from cli and later the cpu-sockets could be
added into topology tree.
In addition, mark the cpu-socket as DEVICE_CATEGORY_CPU_DEF category to
indicate it belongs to the
From: Zhao Liu
For QOM topology, maximum number of CPUs and the number of plugged CPUs
are configured in core level.
Iterate through all the cpu-cores to determine how many CPUs should be
created in each cpu-core.
Signed-off-by: Zhao Liu
---
hw/i386/x86.c | 32
From: Zhao Liu
Convert cpu-cluster to topology device then user could create cluster
level topology from cli and later the cpu-clusters could be added into
topology tree.
In addition, mark the cpu-cluster as DEVICE_CATEGORY_CPU_DEF category to
indicate it belongs to the basic CPU definition
From: Zhao Liu
Abstract book level as a topology device "cpu-book" to allow user to
create book level topology from cli and later the cpu-books could be
added into topology tree.
In addition, mark the cpu-book as DEVICE_CATEGORY_CPU_DEF category to
indicate it belongs to the
From: Zhao Liu
The CPU slot, as the root of the topology tree, is responsible for
global topology information collection and updates.
When a new topology device is added to/deleted from the topology tree,
update the corresponding information in the slot.
Signed-off-by: Zhao Liu
---
hw/core
From: Zhao Liu
The topology devices will be organized as a topology tree. Each topology
device may have many topology children with lower topology level.
Add the helpers to traverse the CPU topology tree.
Signed-off-by: Zhao Liu
---
hw/core/cpu-topo.c | 41
From: Zhao Liu
Hi list,
This series is our latest attempt after the previous RFC [1] about
hybrid topology support, which is based on the commit 4705fc0c8511
("Merge tag 'pull-for-8.2-fixes-231123-1' of https://gitlab.com/
stsquad/qemu into staging") with our previous cleanup (pa
From: Zhao Liu
Topology index is used to identify the topology child under the same
parent topology device.
This field corresponds to the topology sub index (e.g., socket-id/
core-id/thread-id) used for addressing.
Signed-off-by: Zhao Liu
---
hw/core/cpu-topo.c | 77
From: Zhao Liu
Since we will extend cpu-cluster to build CPU topology in virtualization
case via -device, remove the original limitition.
Signed-off-by: Zhao Liu
---
hw/cpu/cluster.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c
index 27ab9e25a265
From: Zhao Liu
When we support child<> property creation from cli, the peripheral
container (/machine/peripheral) may not be the direct parent of the
devices created from cli.
For this case, add a helper to resolve path from non-direct parent.
Signed-off-by: Zhao Liu
---
include/qom/ob
From: Zhao Liu
Currently, the devices added by "-device" are linked via bus, and are
set the parent as peripheral-anon or peripheral containers of the
machine.
But this is not enough for building CPU topology hierarchies as:
1. The relationship between different CPU hierarchie
From: Zhao Liu
When the core abstraction is applied for the architecture support CPU
hotplug, the plugged CPUs and unplugged CPUs are distributed among the
cores created in the topology tree.
Add plugged_threads field to help cpu-core decide to how many CPUs to
create.
Signed-off-by: Zhao Liu
From: Zhao Liu
To keep the same naming style as cpu-core, rename CPUClusterState to
CPUCluster.
Signed-off-by: Zhao Liu
---
gdbstub/system.c | 2 +-
hw/cpu/cluster.c | 8
include/hw/arm/armsse.h| 2 +-
include/hw/arm/xlnx-versal.h
From: Zhao Liu
PPC (spapr) supports hotplugs at the core granularity (spapr core) and
treats core-id as the global id for all cores.
But other architectures that support hotplugging at CPU granularity,
use core-id as the local id to indicate the core within the parent
topology container instand
From: Zhao Liu
Topology devices need to be created and realized before board
initialization.
Allow qdev_device_add() to specify category to help create topology
devices early.
Signed-off-by: Zhao Liu
---
hw/net/virtio-net.c| 2 +-
hw/usb/xen-usb.c | 3 ++-
include/monitor/qdev.h
From: Zhao Liu
PPC supports CPU hotplug at core granularity, thus ppc-core only accepts
all CPUs in a core are plugged.
Check if plugged_threads and nr_threads are equal when ppc-core
realizes.
Signed-off-by: Zhao Liu
---
hw/ppc/ppc_core.c | 18 ++
include/hw/ppc
From: Zhao Liu
When a new topology child is to be inserted into the topology tree, its
parents (including non-direct parents) need to check if this child is
supported.
Add the virtual method to allow topology device to check the support for
their topology children.
Signed-off-by: Zhao Liu
From: Zhao Liu
To create more flexible CPU topologies (both symmetric and
heterogeneous) via the "-device" interface, it is necessary to convert
the current CPU topology hierarchies into the special CPU topology
devices.
The CPU topology will be built as a tree, and
From: Zhao Liu
The properties setting does not conflict with the creation of child<>
property.
Pre-setting the device's properties can help the device's parent
selection. Some topology devices (e.g., CPUs that support hotplug)
usually define topology sub indexes as properties, and the sel
From: Zhao Liu
Topology devices are required to complete CPU topology building before
*_init_cpus() in MachineClass.init().
Add a qemu_create_cli_base_devices() before board initialization to
help create and realize topology devices from cli early.
Signed-off-by: Zhao Liu
---
system/vl.c
From: Zhao Liu
In fact, type4-count, core-count, core-count2, thread-count and
thread-count2 are tested with KVM not TCG.
Rename these test functions to reflect KVM base instead of TCG.
Signed-off-by: Zhao Liu
---
tests/qtest/bios-tables-test.c | 20 ++--
1 file changed, 10
From: Zhao Liu
Remove unused header in core.c and cluster.c, and reorder the remaining
header files (except qemu/osdep.h) in alphabetical order.
Tested by "./configure" and then "make".
---
Zhao Liu (2):
hw/cpu/core: Cleanup unused included header in core.c
hw/cpu/clu
From: Zhao Liu
Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu
---
hw/cpu/cluster.c | 5 ++--
From: Zhao Liu
Remove unused header (qemu/module.h and sysemu/cpus.h) in core.c,
and reorder the remaining header files (except qemu/osdep.h) in
alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu
---
hw/cpu/core.c | 7 +++
1 file c
From: Zhao Liu
>From s390_possible_cpu_arch_ids() in hw/s390x/s390-virtio-ccw.c, the
"core-id" is the index of possible_cpus->cpus[], so it should only be
less than possible_cpus->len, which is equal to ms->smp.max_cpus.
Fix the wrong "core-id" 112, becaus
Hi Nina,
On Mon, Nov 27, 2023 at 01:58:32PM +0100, Nina Schoetterl-Glausch wrote:
> Date: Mon, 27 Nov 2023 13:58:32 +0100
> From: Nina Schoetterl-Glausch
> Subject: Re: [RFC] docs/s390: Fix wrong command example in
> s390-cpu-topology.rst
>
> On Mon, 2023-11-27 at 17:39 +08
From: Zhao Liu
>From s390_possible_cpu_arch_ids() in hw/s390x/s390-virtio-ccw.c, the
"core-id" is the index of pssible_cpus->cpus[], so it should only be
less than possible_cpus->len, which is equal to ms->smp.max_cpus.
Fix the wrong "core-id" 112 because it is g
Hi Ewan,
On Thu, Nov 23, 2023 at 10:01:42PM -0500, Ewan Hai wrote:
> Date: Thu, 23 Nov 2023 22:01:42 -0500
> From: Ewan Hai
> Subject: PING: VMX controls setting patch for backward compatibility
>
> Hi Zhao Liu and QEMU/KVM Community,
>
> I hope this email finds y
>
> Hi Zhao,
>
> since I found last email contains non-plain-text content,
> and...@vger.kernel.org
> rejected to receive my mail, so just re-send last mail here, to follow the
> rule of qemu
> /kvm community.
>
> On 10/25/23 23:20, Zhao Liu wrote:
> > On Mon,
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