Re: [PATCH] or1k: Fix compilation hiccup

2020-06-08 Thread Eric Blake
On 6/8/20 4:15 AM, Markus Armbruster wrote: Yes: openrisc_sim_machine_init() sets mc->max_cpus = 2. My suggestion of adding an assert() is essentially telling the compiler that indeed smp_cpus must always be in the range [1,2], which we can tell but it can't. Do we have a proper patch for

Re: [PATCH] or1k: Fix compilation hiccup

2020-06-08 Thread Markus Armbruster
Philippe Mathieu-Daudé writes: > On 6/8/20 8:03 AM, Markus Armbruster wrote: >> Markus Armbruster writes: >> >>> Peter Maydell writes: >>> On Fri, 29 May 2020 at 17:23, Christophe de Dinechin wrote: > On 2020-05-26 at 20:51 CEST, Eric Blake wrote... >> diff --git

Re: [PATCH] or1k: Fix compilation hiccup

2020-06-08 Thread Philippe Mathieu-Daudé
On 6/8/20 8:03 AM, Markus Armbruster wrote: > Markus Armbruster writes: > >> Peter Maydell writes: >> >>> On Fri, 29 May 2020 at 17:23, Christophe de Dinechin >>> wrote: On 2020-05-26 at 20:51 CEST, Eric Blake wrote... > diff --git a/hw/openrisc/openrisc_sim.c

Re: [PATCH] or1k: Fix compilation hiccup

2020-06-08 Thread Markus Armbruster
Markus Armbruster writes: > Peter Maydell writes: > >> On Fri, 29 May 2020 at 17:23, Christophe de Dinechin >> wrote: >>> On 2020-05-26 at 20:51 CEST, Eric Blake wrote... >>> > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c >>> > index d08ce6181199..95011a8015b4 100644

Re: [PATCH] or1k: Fix compilation hiccup

2020-06-02 Thread Markus Armbruster
Peter Maydell writes: > On Fri, 29 May 2020 at 17:23, Christophe de Dinechin > wrote: >> On 2020-05-26 at 20:51 CEST, Eric Blake wrote... >> > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c >> > index d08ce6181199..95011a8015b4 100644 >> > --- a/hw/openrisc/openrisc_sim.c

Re: [PATCH] or1k: Fix compilation hiccup

2020-05-29 Thread Peter Maydell
On Fri, 29 May 2020 at 17:23, Christophe de Dinechin wrote: > On 2020-05-26 at 20:51 CEST, Eric Blake wrote... > > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c > > index d08ce6181199..95011a8015b4 100644 > > --- a/hw/openrisc/openrisc_sim.c > > +++

Re: [PATCH] or1k: Fix compilation hiccup

2020-05-29 Thread Christophe de Dinechin
On 2020-05-26 at 20:51 CEST, Eric Blake wrote... > On my Fedora 32 machine, gcc 10.1.1 at -O2 (the default for a bare > './configure') has a false-positive complaint: > > CC or1k-softmmu/hw/openrisc/openrisc_sim.o > /home/eblake/qemu/hw/openrisc/openrisc_sim.c: In function

Re: [PATCH] or1k: Fix compilation hiccup

2020-05-27 Thread Philippe Mathieu-Daudé
On 5/26/20 8:51 PM, Eric Blake wrote: > On my Fedora 32 machine, gcc 10.1.1 at -O2 (the default for a bare > './configure') has a false-positive complaint: > > CC or1k-softmmu/hw/openrisc/openrisc_sim.o > /home/eblake/qemu/hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’: >

Re: [PATCH] or1k: Fix compilation hiccup

2020-05-26 Thread Thomas Huth
On 26/05/2020 20.51, Eric Blake wrote: > On my Fedora 32 machine, gcc 10.1.1 at -O2 (the default for a bare > './configure') has a false-positive complaint: > > CC or1k-softmmu/hw/openrisc/openrisc_sim.o > /home/eblake/qemu/hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’: >

Re: [PATCH] or1k: Fix compilation hiccup

2020-05-26 Thread Eric Blake
On 5/26/20 6:21 PM, no-re...@patchew.org wrote: Patchew URL: https://patchew.org/QEMU/20200526185132.1652355-1-ebl...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: === OUTPUT BEGIN === ERROR: spaces required around that '*'

Re: [PATCH] or1k: Fix compilation hiccup

2020-05-26 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20200526185132.1652355-1-ebl...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20200526185132.1652355-1-ebl...@redhat.com Subject: [PATCH] or1k: Fix compilation hiccup Type: series

[PATCH] or1k: Fix compilation hiccup

2020-05-26 Thread Eric Blake
On my Fedora 32 machine, gcc 10.1.1 at -O2 (the default for a bare './configure') has a false-positive complaint: CC or1k-softmmu/hw/openrisc/openrisc_sim.o /home/eblake/qemu/hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’: /home/eblake/qemu/hw/openrisc/openrisc_sim.c:87:42: