On 4/20/20 1:42 PM, Stephen Long wrote:
> +static bool trans_ST1_zprz_sve2(DisasContext *s, arg_ST1_zprz_sve2 *a)
> +{
> +gen_helper_gvec_mem_scatter *fn;
> +bool be = s->be_data == MO_BE;
> +bool mte = s->mte_active[0];
> +
> +if (!dc_isar_feature(aa64_sve2, s) || a->esz < a->msz
Add decoding logic for SVE2 64-bit/32-bit scatter non-temporal store
insns.
64-bit
* STNT1B (vector plus scalar)
* STNT1H (vector plus scalar)
* STNT1W (vector plus scalar)
* STNT1D (vector plus scalar)
32-bit
* STNT1B (vector plus scalar)
* STNT1H (vector plus scalar)
* STNT1W (vector plus
