Re: [PATCH 04/55] target/arm: Add handling for PSR.ECI/ICI

2021-06-10 Thread Richard Henderson
On 6/10/21 3:17 AM, Peter Maydell wrote: Can't use tcg_constant_i32() because store_cpu_field() wants to tcg_temp_free_i32() its argument. Yes you can. I thought I documented somewhere that constant is silently ignored by free. Oh dear, now I see that I have conflicting docs -- will fix.

Re: [PATCH 04/55] target/arm: Add handling for PSR.ECI/ICI

2021-06-10 Thread Peter Maydell
On Tue, 8 Jun 2021 at 00:33, Richard Henderson wrote: > > On 6/7/21 9:57 AM, Peter Maydell wrote: > > +void clear_eci_state(DisasContext *s) > > +{ > > +/* > > + * Clear any ECI/ICI state: used when a load multiple/store > > + * multiple insn executes. > > + */ > > +if

Re: [PATCH 04/55] target/arm: Add handling for PSR.ECI/ICI

2021-06-07 Thread Richard Henderson
On 6/7/21 9:57 AM, Peter Maydell wrote: +void clear_eci_state(DisasContext *s) +{ +/* + * Clear any ECI/ICI state: used when a load multiple/store + * multiple insn executes. + */ +if (s->eci) { +TCGv_i32 tmp = tcg_temp_new_i32(); +tcg_gen_movi_i32(tmp, 0);

[PATCH 04/55] target/arm: Add handling for PSR.ECI/ICI

2021-06-07 Thread Peter Maydell
On A-profile, PSR bits [15:10][26:25] are always the IT state bits. On M-profile, some of the reserved encodings of the IT state are used to instead indicate partial progress through instructions that were interrupted partway through by an exception and can be resumed. These resumable