Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-03-06 Thread Palmer Dabbelt
On Wed, 26 Feb 2020 09:55:34 PST (-0800), alistai...@gmail.com wrote: On Wed, Feb 26, 2020 at 12:54 AM Rajnesh Kanwal wrote: Here is the link to the patch https://lists.nongnu.org/archive/html/qemu-riscv/2020-01/msg00191.html Ah, it doesn't look like it made it to the QEMU-devel list. Can yo

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-26 Thread Alistair Francis
On Wed, Feb 26, 2020 at 12:54 AM Rajnesh Kanwal wrote: > > Here is the link to the patch > https://lists.nongnu.org/archive/html/qemu-riscv/2020-01/msg00191.html Ah, it doesn't look like it made it to the QEMU-devel list. Can you re-send it to QEMU-devel? Alistair > > -Rajnesh > > On Tue, Feb 2

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-26 Thread Rajnesh Kanwal
Here is the link to the patch https://lists.nongnu.org/archive/html/qemu-riscv/2020-01/msg00191.html -Rajnesh On Tue, Feb 25, 2020 at 12:06 AM Alistair Francis wrote: > On Sun, Feb 23, 2020 at 11:23 AM Jose Martins > wrote: > > > > Hello rajnesh, > > > > I had already submitted almost this exa

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-24 Thread Alistair Francis
On Sun, Feb 23, 2020 at 11:23 AM Jose Martins wrote: > > Hello rajnesh, > > I had already submitted almost this exact patch a few weeks ago. To QEMU? I don't see the patch. Alistair > > Jose > > On Sun, 23 Feb 2020 at 13:51, wrote: > > > > From: Rajnesh Kanwal > > > > Currently riscv_cpu_loca

RE: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-24 Thread Anup Patel
. Regards, Anup From: Qemu-riscv On Behalf Of Rajnesh Kanwal Sent: Monday, February 24, 2020 3:44 PM To: Jose Martins Cc: Alistair Francis ; palmerdabb...@google.com; qemu-ri...@nongnu.org; qemu-devel@nongnu.org Subject: Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding. Nice catch

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-24 Thread Rajnesh Kanwal
Nice catch. You are right. I was a bit confused after looking at current xvisor and KVM port. They are delegating S mode interrupts to VS mode, as per my understanding after looking at https://github.com/kvm-riscv/linux/blob/riscv_kvm_master/arch/riscv/kvm/main.c line no. 34. I will see if there is

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-23 Thread Jose Martins
No problem. But I'm failing to see what you mean. My reasoning was: the specification mandates that only VS mode interrupt bits are writable in hideleg, all the others must be hardwired to zero. This means the hypervisor can't really delegate S mode interrupts as you are saying. So, if this is impl

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-23 Thread Jose Martins
Hello rajnesh, I had already submitted almost this exact patch a few weeks ago. Jose On Sun, 23 Feb 2020 at 13:51, wrote: > > From: Rajnesh Kanwal > > Currently riscv_cpu_local_irq_pending is used to find out pending > interrupt and VS mode interrupts are being shifted to represent > S mode in

Re: [PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-23 Thread Rajnesh Kanwal
Hello Jose, Sorry I didn't see that as it hadn't became a part of the port. I don't know how they proceed with same patches. Just to add, there is a minor problem with your patch. The cause value should only be decremented by one for VS mode interrupts. In case if hypervisor has delegated S mode

[PATCH 1/1] target/riscv: Fix VS mode interrupts forwarding.

2020-02-23 Thread rajnesh . kanwal49
From: Rajnesh Kanwal Currently riscv_cpu_local_irq_pending is used to find out pending interrupt and VS mode interrupts are being shifted to represent S mode interrupts in this function. So when the cause returned by this function is passed to riscv_cpu_do_interrupt to actually forward the interr