On 26/11/2021 10:09, Cédric Le Goater wrote:
On 11/16/21 18:01, Frederic Barrat wrote:
The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
Interrupt Pin register in the config space so that the model matches
the hardware.
If we don't, then we inherit from the default pcie
On Fri, Nov 26, 2021 at 06:08:30PM +0100, Cédric Le Goater wrote:
> [ Adding Alfredo the thread ]
>
> On 11/26/21 10:09, Cédric Le Goater wrote:
> > On 11/16/21 18:01, Frederic Barrat wrote:
> > > The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
> > > Interrupt Pin register
[ Adding Alfredo the thread ]
On 11/26/21 10:09, Cédric Le Goater wrote:
On 11/16/21 18:01, Frederic Barrat wrote:
The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
Interrupt Pin register in the config space so that the model matches
the hardware.
If we don't, then we
On 11/16/21 18:01, Frederic Barrat wrote:
The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
Interrupt Pin register in the config space so that the model matches
the hardware.
If we don't, then we inherit from the default pcie root bridge, which
requests a LSI. And because
On 11/16/21 18:01, Frederic Barrat wrote:
The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
Interrupt Pin register in the config space so that the model matches
the hardware.
If we don't, then we inherit from the default pcie root bridge, which
requests a LSI. And because
The PHB v4 found on POWER9 doesn't request any LSI, so let's clear the
Interrupt Pin register in the config space so that the model matches
the hardware.
If we don't, then we inherit from the default pcie root bridge, which
requests a LSI. And because we don't map it correctly in the device
tree,
