Re: [PATCH 1/6] target/arm: Restric the Address Translate write operation to TCG accel

2020-04-21 Thread Richard Henderson
On 4/21/20 6:19 AM, Philippe Mathieu-Daudé wrote: > Under KVM these registers are written by the hardware. > Restrict the writefn handlers to TCG to avoid when building > without TCG: > > LINKaarch64-softmmu/qemu-system-aarch64 > target/arm/helper.o: In function `do_ats_write': >

[PATCH 1/6] target/arm: Restric the Address Translate write operation to TCG accel

2020-04-21 Thread Philippe Mathieu-Daudé
Under KVM these registers are written by the hardware. Restrict the writefn handlers to TCG to avoid when building without TCG: LINKaarch64-softmmu/qemu-system-aarch64 target/arm/helper.o: In function `do_ats_write': target/arm/helper.c:3524: undefined reference to