Re: [PATCH 15/18] target/riscv: Allow debugger to access sstc CSRs

On 2023/2/14 12:12, Bin Meng wrote: At present with a debugger attached sstc CSRs can only be accssed when CPU is in M-mode, or configured correctly. Fix it by adjusting their predicate() routine logic so that the static config check comes before the run-time check, as well as addding a debugg

[PATCH 15/18] target/riscv: Allow debugger to access sstc CSRs

At present with a debugger attached sstc CSRs can only be accssed when CPU is in M-mode, or configured correctly. Fix it by adjusting their predicate() routine logic so that the static config check comes before the run-time check, as well as addding a debugger check. Signed-off-by: Bin Meng ---