Re: [PATCH 3/6] target/riscv: Add pointer masking tb flags

2023-12-22 Thread Alexey Baturo
Hi Richard, Thanks for the suggestion. If it's ok to consume another bit(3 bits total) for Pointer Masking flags, I'll do it. >so that the translator can see the true width of the address I guess I'll need a helper to calculate the exact number of bits to shift(0, 7 or 16) based on those 2 extract

Re: [PATCH 3/6] target/riscv: Add pointer masking tb flags

2023-12-21 Thread Richard Henderson
On 12/21/23 21:40, Alexey Baturo wrote: From: Alexey Baturo Signed-off-by: Alexey Baturo --- target/riscv/cpu.h| 19 +-- target/riscv/cpu_helper.c | 4 target/riscv/translate.c | 10 ++ 3 files changed, 27 insertions(+), 6 deletions(-) diff --git a/

[PATCH 3/6] target/riscv: Add pointer masking tb flags

2023-12-21 Thread Alexey Baturo
From: Alexey Baturo Signed-off-by: Alexey Baturo --- target/riscv/cpu.h| 19 +-- target/riscv/cpu_helper.c | 4 target/riscv/translate.c | 10 ++ 3 files changed, 27 insertions(+), 6 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index