Re: [PATCH 4/9] disas/riscv: Make rv_op_illegal a shared enum value

2023-06-12 Thread LIU Zhiwei
On 2023/5/30 21:18, Christoph Muellner wrote: From: Christoph Müllner The enum value 'rv_op_illegal' does not represent an instruction, but is a catch-all value in case we have no match in the decoder. Let's make the value a shared one, so that other compile units can reuse it.

Re: [PATCH 4/9] disas/riscv: Make rv_op_illegal a shared enum value

2023-06-11 Thread Alistair Francis
On Tue, May 30, 2023 at 11:22 PM Christoph Muellner wrote: > > From: Christoph Müllner > > The enum value 'rv_op_illegal' does not represent an > instruction, but is a catch-all value in case we have > no match in the decoder. Let's make the value a shared > one, so that other compile units can

[PATCH 4/9] disas/riscv: Make rv_op_illegal a shared enum value

2023-05-30 Thread Christoph Muellner
From: Christoph Müllner The enum value 'rv_op_illegal' does not represent an instruction, but is a catch-all value in case we have no match in the decoder. Let's make the value a shared one, so that other compile units can reuse it. Signed-off-by: Christoph Müllner --- disas/riscv.c | 2 +-